Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
fpga: dfl: add id_table for dfl private feature driver
This patch adds id_table for each dfl private feature driver,
it allows to reuse same private feature driver to match and support
multiple dfl private features.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Moritz Fischer <mdf@kernel.org>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Link: https://lore.kernel.org/r/1564914022-3710-6-git-send-email-hao.wu@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
authored by
Wu Hao
and committed by
Greg Kroah-Hartman
15bbb300
d2ad5ac1
+59
-15
+12
-2
drivers/fpga/dfl-afu-main.c
+12
-2
drivers/fpga/dfl-afu-main.c
···
323
323
return ret;
324
324
}
325
325
326
+
static const struct dfl_feature_id port_hdr_id_table[] = {
327
+
{.id = PORT_FEATURE_ID_HEADER,},
328
+
{0,}
329
+
};
330
+
326
331
static const struct dfl_feature_ops port_hdr_ops = {
327
332
.init = port_hdr_init,
328
333
.uinit = port_hdr_uinit,
···
389
384
device_remove_groups(&pdev->dev, port_afu_groups);
390
385
}
391
386
387
+
static const struct dfl_feature_id port_afu_id_table[] = {
388
+
{.id = PORT_FEATURE_ID_AFU,},
389
+
{0,}
390
+
};
391
+
392
392
static const struct dfl_feature_ops port_afu_ops = {
393
393
.init = port_afu_init,
394
394
.uinit = port_afu_uinit,
···
401
391
402
392
static struct dfl_feature_driver port_feature_drvs[] = {
403
393
{
404
-
.id = PORT_FEATURE_ID_HEADER,
394
+
.id_table = port_hdr_id_table,
405
395
.ops = &port_hdr_ops,
406
396
},
407
397
{
408
-
.id = PORT_FEATURE_ID_AFU,
398
+
.id_table = port_afu_id_table,
409
399
.ops = &port_afu_ops,
410
400
},
411
401
{
+8
-3
drivers/fpga/dfl-fme-main.c
+8
-3
drivers/fpga/dfl-fme-main.c
···
145
145
return -ENODEV;
146
146
}
147
147
148
+
static const struct dfl_feature_id fme_hdr_id_table[] = {
149
+
{.id = FME_FEATURE_ID_HEADER,},
150
+
{0,}
151
+
};
152
+
148
153
static const struct dfl_feature_ops fme_hdr_ops = {
149
154
.init = fme_hdr_init,
150
155
.uinit = fme_hdr_uinit,
···
158
153
159
154
static struct dfl_feature_driver fme_feature_drvs[] = {
160
155
{
161
-
.id = FME_FEATURE_ID_HEADER,
156
+
.id_table = fme_hdr_id_table,
162
157
.ops = &fme_hdr_ops,
163
158
},
164
159
{
165
-
.id = FME_FEATURE_ID_PR_MGMT,
166
-
.ops = &pr_mgmt_ops,
160
+
.id_table = fme_pr_mgmt_id_table,
161
+
.ops = &fme_pr_mgmt_ops,
167
162
},
168
163
{
169
164
.ops = NULL,
+6
-1
drivers/fpga/dfl-fme-pr.c
+6
-1
drivers/fpga/dfl-fme-pr.c
···
470
470
return ret;
471
471
}
472
472
473
-
const struct dfl_feature_ops pr_mgmt_ops = {
473
+
const struct dfl_feature_id fme_pr_mgmt_id_table[] = {
474
+
{.id = FME_FEATURE_ID_PR_MGMT,},
475
+
{0}
476
+
};
477
+
478
+
const struct dfl_feature_ops fme_pr_mgmt_ops = {
474
479
.init = pr_mgmt_init,
475
480
.uinit = pr_mgmt_uinit,
476
481
.ioctl = fme_pr_ioctl,
+2
-1
drivers/fpga/dfl-fme.h
+2
-1
drivers/fpga/dfl-fme.h
+16
-2
drivers/fpga/dfl.c
+16
-2
drivers/fpga/dfl.c
···
281
281
return ret;
282
282
}
283
283
284
+
static bool dfl_feature_drv_match(struct dfl_feature *feature,
285
+
struct dfl_feature_driver *driver)
286
+
{
287
+
const struct dfl_feature_id *ids = driver->id_table;
288
+
289
+
if (ids) {
290
+
while (ids->id) {
291
+
if (ids->id == feature->id)
292
+
return true;
293
+
ids++;
294
+
}
295
+
}
296
+
return false;
297
+
}
298
+
284
299
/**
285
300
* dfl_fpga_dev_feature_init - init for sub features of dfl feature device
286
301
* @pdev: feature device.
···
316
301
317
302
while (drv->ops) {
318
303
dfl_fpga_dev_for_each_feature(pdata, feature) {
319
-
/* match feature and drv using id */
320
-
if (feature->id == drv->id) {
304
+
if (dfl_feature_drv_match(feature, drv)) {
321
305
ret = dfl_feature_instance_init(pdev, pdata,
322
306
feature, drv);
323
307
if (ret)
+15
-6
drivers/fpga/dfl.h
+15
-6
drivers/fpga/dfl.h
···
30
30
/* plus one for fme device */
31
31
#define MAX_DFL_FEATURE_DEV_NUM (MAX_DFL_FPGA_PORT_NUM + 1)
32
32
33
-
/* Reserved 0x0 for Header Group Register and 0xff for AFU */
34
-
#define FEATURE_ID_FIU_HEADER 0x0
33
+
/* Reserved 0xfe for Header Group Register and 0xff for AFU */
34
+
#define FEATURE_ID_FIU_HEADER 0xfe
35
35
#define FEATURE_ID_AFU 0xff
36
36
37
37
#define FME_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
···
165
165
int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id);
166
166
167
167
/**
168
-
* struct dfl_feature_driver - sub feature's driver
168
+
* struct dfl_feature_id - dfl private feature id
169
169
*
170
-
* @id: sub feature id.
171
-
* @ops: ops of this sub feature.
170
+
* @id: unique dfl private feature id.
171
+
*/
172
+
struct dfl_feature_id {
173
+
u64 id;
174
+
};
175
+
176
+
/**
177
+
* struct dfl_feature_driver - dfl private feature driver
178
+
*
179
+
* @id_table: id_table for dfl private features supported by this driver.
180
+
* @ops: ops of this dfl private feature driver.
172
181
*/
173
182
struct dfl_feature_driver {
174
-
u64 id;
183
+
const struct dfl_feature_id *id_table;
175
184
const struct dfl_feature_ops *ops;
176
185
};
177
186