Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'usb-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB / Thunderbolt updates from Greg KH:
"Here is the "big" set of USB and Thunderbolt driver updates for
7.0-rc1. Overall more lines were removed than added, thanks to
dropping the obsolete isp1362 USB host controller driver, always a
nice change.
Other than that, nothing major happening here, highlights are:
- lots of dwc3 driver updates and new hardware support added
- usb gadget function driver updates
- usb phy driver updates
- typec driver updates and additions
- USB rust binding updates for syntax and formatting changes
- more usb serial device ids added
- other smaller USB core and driver updates and additions
All of these have been in linux-next for a long time, with no reported
problems"
* tag 'usb-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (77 commits)
usb: typec: ucsi: Add Thunderbolt alternate mode support
usb: typec: hd3ss3220: Check if regulator needs to be switched
usb: phy: tegra: parametrize PORTSC1 register offset
usb: phy: tegra: parametrize HSIC PTS value
usb: phy: tegra: return error value from utmi_wait_register
usb: phy: tegra: cosmetic fixes
dt-bindings: usb: renesas,usbhs: Add RZ/G3E SoC support
usb: dwc2: fix resume failure if dr_mode is host
usb: cdns3: fix role switching during resume
usb: dwc3: gadget: Move vbus draw to workqueue context
USB: serial: option: add Telit FN920C04 RNDIS compositions
usb: dwc3: Log dwc3 address in traces
usb: gadget: tegra-xudc: Add handling for BLCG_COREPLL_PWRDN
usb: phy: tegra: add HSIC support
usb: phy: tegra: use phy type directly
usb: typec: ucsi: Enforce mode selection for cros_ec_ucsi
usb: typec: ucsi: Support mode selection to activate altmodes
usb: typec: Introduce mode_selection bit
usb: typec: Implement mode selection
usb: typec: Expose alternate mode priority via sysfs
...
+3494
-4594
+9
-8
Documentation/ABI/testing/configfs-usb-gadget-midi
+9
-8
Documentation/ABI/testing/configfs-usb-gadget-midi
···
4
4
Description:
5
5
The attributes:
6
6
7
-
========== ====================================
8
-
index index value for the USB MIDI adapter
9
-
id ID string for the USB MIDI adapter
10
-
buflen MIDI buffer length
11
-
qlen USB read request queue length
12
-
in_ports number of MIDI input ports
13
-
out_ports number of MIDI output ports
14
-
========== ====================================
7
+
================ ====================================
8
+
index index value for the USB MIDI adapter
9
+
id ID string for the USB MIDI adapter
10
+
buflen MIDI buffer length
11
+
qlen USB read request queue length
12
+
in_ports number of MIDI input ports
13
+
out_ports number of MIDI output ports
14
+
interface_string USB AudioControl interface string
15
+
================ ====================================
+42
Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd
+42
Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd
···
85
85
up to 5000. The default value is 64 ms.
86
86
This polling interval is used while DbC is enabled but has no
87
87
active data transfers.
88
+
89
+
What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_serial
90
+
Date: January 2026
91
+
Contact: Łukasz Bartosik <ukaszb@chromium.org>
92
+
Description:
93
+
The dbc_serial attribute allows to change the serial number
94
+
string descriptor presented by the debug device when a host
95
+
requests a string descriptor with iSerialNumber index.
96
+
Index is found in the iSerialNumber field in the device
97
+
descriptor.
98
+
Value can only be changed while debug capability (DbC) is in
99
+
disabled state to prevent USB device descriptor change while
100
+
connected to a USB host.
101
+
The default value is "0001".
102
+
The field length can be from 1 to 126 characters.
103
+
104
+
What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_product
105
+
Date: January 2026
106
+
Contact: Łukasz Bartosik <ukaszb@chromium.org>
107
+
Description:
108
+
The dbc_product attribute allows to change the product string
109
+
descriptor presented by the debug device when a host requests
110
+
a string descriptor with iProduct index.
111
+
Index is found in the iProduct field in the device descriptor.
112
+
Value can only be changed while debug capability (DbC) is in
113
+
disabled state to prevent USB device descriptor change while
114
+
connected to a USB host.
115
+
The default value is "Linux USB Debug Target".
116
+
The field length can be from 1 to 126 characters.
117
+
118
+
What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_manufacturer
119
+
Date: January 2026
120
+
Contact: Łukasz Bartosik <ukaszb@chromium.org>
121
+
Description:
122
+
The dbc_manufacturer attribute allows to change the manufacturer
123
+
string descriptor presented by the debug device when a host
124
+
requests a string descriptor with iManufacturer index.
125
+
Value can only be changed while debug capability (DbC) is in
126
+
disabled state to prevent USB device descriptor change while
127
+
connected to a USB host.
128
+
The default value is "Linux Foundation".
129
+
The field length can be from 1 to 126 characters.
+11
Documentation/ABI/testing/sysfs-class-typec
+11
Documentation/ABI/testing/sysfs-class-typec
···
162
162
- usb3 (USB 3.2)
163
163
- usb4 (USB4)
164
164
165
+
What: /sys/class/typec/<port>/<alt-mode>/priority
166
+
Date: July 2025
167
+
Contact: Andrei Kuchynski <akuchynski@chromium.org>
168
+
Description:
169
+
Displays and allows setting the priority for a specific alternate mode.
170
+
The priority is an integer in the range 0-255. A lower numerical value
171
+
indicates a higher priority (0 is the highest).
172
+
If the new value is already in use by another mode, the priority of the
173
+
conflicting mode and any subsequent modes will be incremented until they
174
+
are all unique.
175
+
165
176
USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)
166
177
167
178
What: /sys/class/typec/<port>-partner/accessory_mode
+1
-1
Documentation/admin-guide/thunderbolt.rst
+1
-1
Documentation/admin-guide/thunderbolt.rst
···
370
370
371
371
The driver will create one virtual ethernet interface per Thunderbolt
372
372
port which are named like ``thunderbolt0`` and so on. From this point
373
-
you can either use standard userspace tools like ``ifconfig`` to
373
+
you can either use standard userspace tools like ``ip`` to
374
374
configure the interface or let your GUI handle it automatically.
375
375
376
376
Forcing power
+20
-2
Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml
+20
-2
Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml
···
17
17
18
18
Supported number of devices and endpoints vary depending on hardware
19
19
revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices
20
-
and 15 generic endpoints, while AST2600 Virtual Hub supports 7 downstream
21
-
devices and 21 generic endpoints.
20
+
and 15 generic endpoints, while AST2600 and AST2700 Virtual Hub supports
21
+
7 downstream devices and 21 generic endpoints.
22
22
23
23
properties:
24
24
compatible:
···
26
26
- aspeed,ast2400-usb-vhub
27
27
- aspeed,ast2500-usb-vhub
28
28
- aspeed,ast2600-usb-vhub
29
+
- aspeed,ast2700-usb-vhub
29
30
30
31
reg:
31
32
maxItems: 1
32
33
33
34
clocks:
35
+
maxItems: 1
36
+
37
+
resets:
34
38
maxItems: 1
35
39
36
40
interrupts:
···
110
106
- interrupts
111
107
- aspeed,vhub-downstream-ports
112
108
- aspeed,vhub-generic-endpoints
109
+
110
+
if:
111
+
properties:
112
+
compatible:
113
+
contains:
114
+
const: aspeed,ast2700-usb-vhub
115
+
116
+
then:
117
+
required:
118
+
- resets
119
+
120
+
else:
121
+
properties:
122
+
resets: false
113
123
114
124
additionalProperties: false
115
125
+2
Documentation/devicetree/bindings/usb/generic-ehci.yaml
+2
Documentation/devicetree/bindings/usb/generic-ehci.yaml
+2
Documentation/devicetree/bindings/usb/generic-ohci.yaml
+2
Documentation/devicetree/bindings/usb/generic-ohci.yaml
+140
Documentation/devicetree/bindings/usb/google,lga-dwc3.yaml
+140
Documentation/devicetree/bindings/usb/google,lga-dwc3.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
# Copyright (c) 2025, Google LLC
3
+
%YAML 1.2
4
+
---
5
+
$id: http://devicetree.org/schemas/usb/google,lga-dwc3.yaml#
6
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
7
+
8
+
title: Google Tensor Series G5 (Laguna) DWC3 USB SoC Controller
9
+
10
+
maintainers:
11
+
- Roy Luo <royluo@google.com>
12
+
13
+
description:
14
+
Describes the DWC3 USB controller block implemented on Google Tensor SoCs,
15
+
starting with the G5 generation (laguna). Based on Synopsys DWC3 IP, the
16
+
controller features Dual-Role Device single port with hibernation add-on.
17
+
18
+
properties:
19
+
compatible:
20
+
const: google,lga-dwc3
21
+
22
+
reg:
23
+
items:
24
+
- description: Core DWC3 IP registers.
25
+
26
+
interrupts:
27
+
items:
28
+
- description: Core DWC3 interrupt.
29
+
- description: High speed power management event for remote wakeup.
30
+
- description: Super speed power management event for remote wakeup.
31
+
32
+
interrupt-names:
33
+
items:
34
+
- const: core
35
+
- const: hs_pme
36
+
- const: ss_pme
37
+
38
+
clocks:
39
+
items:
40
+
- description: Non-sticky module clock.
41
+
- description: Sticky module clock.
42
+
43
+
clock-names:
44
+
items:
45
+
- const: non_sticky
46
+
- const: sticky
47
+
48
+
resets:
49
+
items:
50
+
- description: Non-sticky module reset.
51
+
- description: Sticky module reset.
52
+
- description: DRD bus reset.
53
+
- description: Top-level reset.
54
+
55
+
reset-names:
56
+
items:
57
+
- const: non_sticky
58
+
- const: sticky
59
+
- const: drd_bus
60
+
- const: top
61
+
62
+
power-domains:
63
+
items:
64
+
- description: Power switchable domain, the child of top domain.
65
+
Turning it on puts the controller into full power state,
66
+
turning it off puts the controller into power gated state.
67
+
- description: Top domain, the parent of power switchable domain.
68
+
Turning it on puts the controller into power gated state,
69
+
turning it off completely shuts off the controller.
70
+
71
+
power-domain-names:
72
+
items:
73
+
- const: psw
74
+
- const: top
75
+
76
+
iommus:
77
+
maxItems: 1
78
+
79
+
google,usb-cfg-csr:
80
+
description:
81
+
A phandle to a syscon node used to access the USB configuration
82
+
registers. These registers are the top-level wrapper of the USB
83
+
subsystem and provide control and status for the integrated USB
84
+
controller and USB PHY.
85
+
$ref: /schemas/types.yaml#/definitions/phandle-array
86
+
items:
87
+
- items:
88
+
- description: phandle to the syscon node.
89
+
- description: USB host controller configuration register offset.
90
+
- description: USB custom interrrupts control register offset.
91
+
92
+
required:
93
+
- compatible
94
+
- reg
95
+
- interrupts
96
+
- interrupt-names
97
+
- clocks
98
+
- clock-names
99
+
- resets
100
+
- reset-names
101
+
- power-domains
102
+
- power-domain-names
103
+
- google,usb-cfg-csr
104
+
105
+
allOf:
106
+
- $ref: snps,dwc3-common.yaml#
107
+
108
+
unevaluatedProperties: false
109
+
110
+
examples:
111
+
- |
112
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
113
+
#include <dt-bindings/interrupt-controller/irq.h>
114
+
soc {
115
+
#address-cells = <2>;
116
+
#size-cells = <2>;
117
+
118
+
usb@c400000 {
119
+
compatible = "google,lga-dwc3";
120
+
reg = <0 0x0c400000 0 0xd060>;
121
+
interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH 0>,
122
+
<GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH 0>,
123
+
<GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH 0>;
124
+
interrupt-names = "core", "hs_pme", "ss_pme";
125
+
clocks = <&hsion_usbc_non_sticky_clk>, <&hsion_usbc_sticky_clk>;
126
+
clock-names = "non_sticky", "sticky";
127
+
resets = <&hsion_resets_usbc_non_sticky>, <&hsion_resets_usbc_sticky>,
128
+
<&hsion_resets_usb_drd_bus>, <&hsion_resets_usb_top>;
129
+
reset-names = "non_sticky", "sticky", "drd_bus", "top";
130
+
power-domains = <&hsio_n_usb_psw>, <&hsio_n_usb>;
131
+
power-domain-names = "psw", "top";
132
+
phys = <&usb_phy 0>;
133
+
phy-names = "usb2-phy";
134
+
snps,quirk-frame-length-adjustment = <0x20>;
135
+
snps,gfladj-refclk-lpm-sel-quirk;
136
+
snps,incr-burst-type-adjustment = <4>;
137
+
google,usb-cfg-csr = <&usb_cfg_csr 0x0 0x20>;
138
+
};
139
+
};
140
+
...
+66
Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml
+66
Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/microchip,lan9691-dwc3.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Microchip LAN969x SuperSpeed DWC3 USB SoC controller
8
+
9
+
maintainers:
10
+
- Robert Marko <robert.marko@sartura.hr>
11
+
12
+
select:
13
+
properties:
14
+
compatible:
15
+
contains:
16
+
enum:
17
+
- microchip,lan9691-dwc3
18
+
required:
19
+
- compatible
20
+
21
+
properties:
22
+
compatible:
23
+
items:
24
+
- enum:
25
+
- microchip,lan9691-dwc3
26
+
- const: snps,dwc3
27
+
28
+
reg:
29
+
maxItems: 1
30
+
31
+
interrupts:
32
+
maxItems: 1
33
+
34
+
clocks:
35
+
items:
36
+
- description: Gated USB DRD clock
37
+
- description: Controller reference clock
38
+
39
+
clock-names:
40
+
items:
41
+
- const: bus_early
42
+
- const: ref
43
+
44
+
unevaluatedProperties: false
45
+
46
+
required:
47
+
- compatible
48
+
- reg
49
+
- interrupts
50
+
- clocks
51
+
- clock-names
52
+
53
+
allOf:
54
+
- $ref: snps,dwc3.yaml#
55
+
56
+
examples:
57
+
- |
58
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
59
+
60
+
usb@300000 {
61
+
compatible = "microchip,lan9691-dwc3", "snps,dwc3";
62
+
reg = <0x300000 0x80000>;
63
+
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
64
+
clocks = <&clks 12>, <&clks 11>;
65
+
clock-names = "bus_early", "ref";
66
+
};
+1
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml
+1
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml
+89
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
+89
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
8
+
9
+
maintainers:
10
+
- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
11
+
- Masami Hiramatsu <mhiramat@kernel.org>
12
+
13
+
select:
14
+
properties:
15
+
compatible:
16
+
contains:
17
+
const: socionext,uniphier-dwc3
18
+
required:
19
+
- compatible
20
+
21
+
properties:
22
+
compatible:
23
+
items:
24
+
- const: socionext,uniphier-dwc3
25
+
- const: snps,dwc3
26
+
27
+
reg:
28
+
maxItems: 1
29
+
30
+
interrupts:
31
+
minItems: 1
32
+
items:
33
+
- description: Host or single combined interrupt
34
+
- description: Peripheral interrupt
35
+
36
+
interrupt-names:
37
+
minItems: 1
38
+
items:
39
+
- enum:
40
+
- dwc_usb3
41
+
- host
42
+
- const: peripheral
43
+
44
+
clocks:
45
+
maxItems: 3
46
+
47
+
clock-names:
48
+
items:
49
+
- const: ref
50
+
- const: bus_early
51
+
- const: suspend
52
+
53
+
phys:
54
+
description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs
55
+
minItems: 1
56
+
maxItems: 6
57
+
58
+
resets:
59
+
maxItems: 1
60
+
61
+
required:
62
+
- compatible
63
+
- reg
64
+
- interrupts
65
+
- clocks
66
+
- clock-names
67
+
- phys
68
+
69
+
unevaluatedProperties: false
70
+
71
+
allOf:
72
+
- $ref: snps,dwc3.yaml#
73
+
74
+
examples:
75
+
- |
76
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
77
+
78
+
usb@65a00000 {
79
+
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
80
+
reg = <0x65a00000 0xcd00>;
81
+
interrupt-names = "dwc_usb3";
82
+
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
83
+
clock-names = "ref", "bus_early", "suspend";
84
+
clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
85
+
resets = <&usb0_rst 15>;
86
+
phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
87
+
<&usb0_ssphy0>, <&usb0_ssphy1>;
88
+
dr_mode = "host";
89
+
};
+65
Documentation/devicetree/bindings/usb/wch,ch334.yaml
+65
Documentation/devicetree/bindings/usb/wch,ch334.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: WCH CH334/CH335 USB 2.0 Hub Controller
8
+
9
+
maintainers:
10
+
- Chaoyi Chen <kernel@airkyi.com>
11
+
12
+
allOf:
13
+
- $ref: usb-hub.yaml#
14
+
15
+
properties:
16
+
compatible:
17
+
enum:
18
+
- usb1a86,8091
19
+
20
+
reg: true
21
+
22
+
reset-gpios:
23
+
description: GPIO controlling the RESET# pin.
24
+
25
+
vdd33-supply:
26
+
description:
27
+
The regulator that provides 3.3V core power to the hub.
28
+
29
+
v5-supply:
30
+
description:
31
+
The regulator that provides 3.3V or 5V power to the hub.
32
+
33
+
ports:
34
+
$ref: /schemas/graph.yaml#/properties/ports
35
+
36
+
patternProperties:
37
+
'^port@':
38
+
$ref: /schemas/graph.yaml#/properties/port
39
+
40
+
properties:
41
+
reg:
42
+
minimum: 1
43
+
maximum: 4
44
+
45
+
required:
46
+
- compatible
47
+
- reg
48
+
49
+
additionalProperties: false
50
+
51
+
examples:
52
+
- |
53
+
#include <dt-bindings/gpio/gpio.h>
54
+
usb {
55
+
#address-cells = <1>;
56
+
#size-cells = <0>;
57
+
58
+
hub: hub@1 {
59
+
compatible = "usb1a86,8091";
60
+
reg = <1>;
61
+
reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
62
+
v5-supply = <&vcc_3v3>;
63
+
vdd33-supply = <&vcc_3v3>;
64
+
};
65
+
};
+10
-8
Documentation/usb/gadget-testing.rst
+10
-8
Documentation/usb/gadget-testing.rst
···
368
368
The function name to use when creating the function directory is "midi".
369
369
The MIDI function provides these attributes in its function directory:
370
370
371
-
=============== ====================================
372
-
buflen MIDI buffer length
373
-
id ID string for the USB MIDI adapter
374
-
in_ports number of MIDI input ports
375
-
index index value for the USB MIDI adapter
376
-
out_ports number of MIDI output ports
377
-
qlen USB read request queue length
378
-
=============== ====================================
371
+
================ ====================================
372
+
buflen MIDI buffer length
373
+
id ID string for the USB MIDI adapter
374
+
in_ports number of MIDI input ports
375
+
index index value for the USB MIDI adapter
376
+
out_ports number of MIDI output ports
377
+
qlen USB read request queue length
378
+
interface_string USB AudioControl interface string
379
+
================ ====================================
379
380
380
381
Testing the MIDI function
381
382
-------------------------
···
687
686
isoc_mult 0..2 (hs/ss only)
688
687
isoc_maxburst 0..15 (ss only)
689
688
bulk_buflen buffer length
689
+
bulk_maxburst 0..15 (ss only)
690
690
bulk_qlen depth of queue for bulk
691
691
iso_qlen depth of queue for iso
692
692
=============== ==================================
+2
MAINTAINERS
+2
MAINTAINERS
···
10859
10859
C: irc://irc.oftc.net/pixel6-kernel-dev
10860
10860
F: Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
10861
10861
F: Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
10862
+
F: Documentation/devicetree/bindings/usb/google,lga-dwc3.yaml
10862
10863
F: arch/arm64/boot/dts/exynos/google/
10863
10864
F: drivers/clk/samsung/clk-gs101.c
10864
10865
F: drivers/soc/samsung/gs101-pmu.c
10865
10866
F: drivers/phy/samsung/phy-gs101-ufs.c
10867
+
F: drivers/usb/dwc3/dwc3-google.c
10866
10868
F: include/dt-bindings/clock/google,gs101*
10867
10869
K: [gG]oogle.?[tT]ensor
10868
10870
+1
drivers/platform/chrome/cros_ec_typec.c
+1
drivers/platform/chrome/cros_ec_typec.c
+1
-1
drivers/thunderbolt/path.c
+1
-1
drivers/thunderbolt/path.c
-1
drivers/usb/Makefile
-1
drivers/usb/Makefile
···
30
30
obj-$(CONFIG_USB_FHCI_HCD) += host/
31
31
obj-$(CONFIG_USB_XHCI_HCD) += host/
32
32
obj-$(CONFIG_USB_SL811_HCD) += host/
33
-
obj-$(CONFIG_USB_ISP1362_HCD) += host/
34
33
obj-$(CONFIG_USB_R8A66597_HCD) += host/
35
34
obj-$(CONFIG_USB_FSL_USB2) += host/
36
35
obj-$(CONFIG_USB_FOTG210_HCD) += host/
+1
-1
drivers/usb/cdns3/core.c
+1
-1
drivers/usb/cdns3/core.c
+8
-1
drivers/usb/chipidea/ci_hdrc_imx.c
+8
-1
drivers/usb/chipidea/ci_hdrc_imx.c
···
385
385
const struct ci_hdrc_imx_platform_flag *imx_platform_flag;
386
386
struct device_node *np = pdev->dev.of_node;
387
387
struct device *dev = &pdev->dev;
388
+
const char *irq_name;
388
389
389
390
imx_platform_flag = of_device_get_match_data(&pdev->dev);
390
391
···
526
525
527
526
data->wakeup_irq = platform_get_irq_optional(pdev, 1);
528
527
if (data->wakeup_irq > 0) {
528
+
irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s:wakeup", pdata.name);
529
+
if (!irq_name) {
530
+
dev_err_probe(dev, -ENOMEM, "failed to create irq_name\n");
531
+
goto err_clk;
532
+
}
533
+
529
534
ret = devm_request_threaded_irq(dev, data->wakeup_irq,
530
535
NULL, ci_wakeup_irq_handler,
531
536
IRQF_ONESHOT | IRQF_NO_AUTOEN,
532
-
pdata.name, data);
537
+
irq_name, data);
533
538
if (ret)
534
539
goto err_clk;
535
540
}
+7
drivers/usb/chipidea/udc.c
+7
drivers/usb/chipidea/udc.c
···
931
931
list_del_init(&hwreq->queue);
932
932
hwreq->req.status = -ESHUTDOWN;
933
933
934
+
/* Unmap DMA and clean up bounce buffers before giving back */
935
+
usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
936
+
&hwreq->req, hwep->dir);
937
+
938
+
if (hwreq->sgt.sgl)
939
+
sglist_do_debounce(hwreq, false);
940
+
934
941
if (hwreq->req.complete != NULL) {
935
942
spin_unlock(hwep->lock);
936
943
usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
-4
drivers/usb/core/hcd.c
-4
drivers/usb/core/hcd.c
···
77
77
78
78
/*-------------------------------------------------------------------------*/
79
79
80
-
/* Keep track of which host controller drivers are loaded */
81
-
unsigned long usb_hcds_loaded;
82
-
EXPORT_SYMBOL_GPL(usb_hcds_loaded);
83
-
84
80
/* host controllers we manage */
85
81
DEFINE_IDR (usb_bus_idr);
86
82
EXPORT_SYMBOL_GPL (usb_bus_idr);
+1
drivers/usb/dwc2/core.c
+1
drivers/usb/dwc2/core.c
+11
drivers/usb/dwc3/Kconfig
+11
drivers/usb/dwc3/Kconfig
···
211
211
mode on these machines.
212
212
Say 'Y' or 'M' if you have such device.
213
213
214
+
config USB_DWC3_GOOGLE
215
+
tristate "Google Platform"
216
+
help
217
+
Support the DesignWare Core USB3 IP found on Google Tensor SoCs,
218
+
starting with the G5 generation (Laguna). This driver includes
219
+
support for hibernation in host mode.
220
+
Say 'Y' or 'M' if you have one such device.
221
+
222
+
To compile this driver as a module, choose M here: the
223
+
module will be called dwc3-google.ko.
224
+
214
225
endif
+1
drivers/usb/dwc3/Makefile
+1
drivers/usb/dwc3/Makefile
+116
-99
drivers/usb/dwc3/core.c
+116
-99
drivers/usb/dwc3/core.c
···
114
114
int i;
115
115
116
116
for (i = 0; i < dwc->num_usb3_ports; i++) {
117
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i));
117
+
reg = dwc3_readl(dwc, DWC3_GUSB3PIPECTL(i));
118
118
if (enable && !dwc->dis_u3_susphy_quirk)
119
119
reg |= DWC3_GUSB3PIPECTL_SUSPHY;
120
120
else
121
121
reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
122
122
123
-
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg);
123
+
dwc3_writel(dwc, DWC3_GUSB3PIPECTL(i), reg);
124
124
}
125
125
126
126
for (i = 0; i < dwc->num_usb2_ports; i++) {
127
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
127
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(i));
128
128
if (enable && !dwc->dis_u2_susphy_quirk)
129
129
reg |= DWC3_GUSB2PHYCFG_SUSPHY;
130
130
else
131
131
reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
132
132
133
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
133
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(i), reg);
134
134
}
135
135
}
136
136
EXPORT_SYMBOL_GPL(dwc3_enable_susphy);
···
140
140
unsigned int hw_mode;
141
141
u32 reg;
142
142
143
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
143
+
reg = dwc3_readl(dwc, DWC3_GCTL);
144
144
145
145
/*
146
146
* For DRD controllers, GUSB3PIPECTL.SUSPENDENABLE and
···
155
155
156
156
reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG));
157
157
reg |= DWC3_GCTL_PRTCAPDIR(mode);
158
-
dwc3_writel(dwc->regs, DWC3_GCTL, reg);
158
+
dwc3_writel(dwc, DWC3_GCTL, reg);
159
159
160
160
dwc->current_dr_role = mode;
161
-
trace_dwc3_set_prtcap(mode);
161
+
trace_dwc3_set_prtcap(dwc, mode);
162
162
}
163
163
EXPORT_SYMBOL_GPL(dwc3_set_prtcap);
164
164
···
216
216
if (dwc->current_dr_role && ((DWC3_IP_IS(DWC3) ||
217
217
DWC3_VER_IS_PRIOR(DWC31, 190A)) &&
218
218
desired_dr_role != DWC3_GCTL_PRTCAP_OTG)) {
219
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
219
+
reg = dwc3_readl(dwc, DWC3_GCTL);
220
220
reg |= DWC3_GCTL_CORESOFTRESET;
221
-
dwc3_writel(dwc->regs, DWC3_GCTL, reg);
221
+
dwc3_writel(dwc, DWC3_GCTL, reg);
222
222
223
223
/*
224
224
* Wait for internal clocks to synchronized. DWC_usb31 and
···
228
228
*/
229
229
msleep(100);
230
230
231
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
231
+
reg = dwc3_readl(dwc, DWC3_GCTL);
232
232
reg &= ~DWC3_GCTL_CORESOFTRESET;
233
-
dwc3_writel(dwc->regs, DWC3_GCTL, reg);
233
+
dwc3_writel(dwc, DWC3_GCTL, reg);
234
234
}
235
235
236
236
spin_lock_irqsave(&dwc->lock, flags);
···
254
254
phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
255
255
256
256
if (dwc->dis_split_quirk) {
257
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
257
+
reg = dwc3_readl(dwc, DWC3_GUCTL3);
258
258
reg |= DWC3_GUCTL3_SPLITDISABLE;
259
-
dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
259
+
dwc3_writel(dwc, DWC3_GUCTL3, reg);
260
260
}
261
261
}
262
262
break;
···
306
306
struct dwc3 *dwc = dep->dwc;
307
307
u32 reg;
308
308
309
-
dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE,
310
-
DWC3_GDBGFIFOSPACE_NUM(dep->number) |
311
-
DWC3_GDBGFIFOSPACE_TYPE(type));
309
+
dwc3_writel(dwc, DWC3_GDBGFIFOSPACE,
310
+
DWC3_GDBGFIFOSPACE_NUM(dep->number) |
311
+
DWC3_GDBGFIFOSPACE_TYPE(type));
312
312
313
-
reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE);
313
+
reg = dwc3_readl(dwc, DWC3_GDBGFIFOSPACE);
314
314
315
315
return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg);
316
316
}
···
332
332
if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
333
333
return 0;
334
334
335
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
335
+
reg = dwc3_readl(dwc, DWC3_DCTL);
336
336
reg |= DWC3_DCTL_CSFTRST;
337
337
reg &= ~DWC3_DCTL_RUN_STOP;
338
338
dwc3_gadget_dctl_write_safe(dwc, reg);
···
347
347
retries = 10;
348
348
349
349
do {
350
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
350
+
reg = dwc3_readl(dwc, DWC3_DCTL);
351
351
if (!(reg & DWC3_DCTL_CSFTRST))
352
352
goto done;
353
353
···
387
387
if (dwc->fladj == 0)
388
388
return;
389
389
390
-
reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
390
+
reg = dwc3_readl(dwc, DWC3_GFLADJ);
391
391
dft = reg & DWC3_GFLADJ_30MHZ_MASK;
392
392
if (dft != dwc->fladj) {
393
393
reg &= ~DWC3_GFLADJ_30MHZ_MASK;
394
394
reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj;
395
-
dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
395
+
dwc3_writel(dwc, DWC3_GFLADJ, reg);
396
396
}
397
397
}
398
398
···
424
424
return;
425
425
}
426
426
427
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
427
+
reg = dwc3_readl(dwc, DWC3_GUCTL);
428
428
reg &= ~DWC3_GUCTL_REFCLKPER_MASK;
429
429
reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period);
430
-
dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
430
+
dwc3_writel(dwc, DWC3_GUCTL, reg);
431
431
432
432
if (DWC3_VER_IS_PRIOR(DWC3, 250A))
433
433
return;
···
455
455
*/
456
456
decr = 480000000 / rate;
457
457
458
-
reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
458
+
reg = dwc3_readl(dwc, DWC3_GFLADJ);
459
459
reg &= ~DWC3_GFLADJ_REFCLK_FLADJ_MASK
460
460
& ~DWC3_GFLADJ_240MHZDECR
461
461
& ~DWC3_GFLADJ_240MHZDECR_PLS1;
···
466
466
if (dwc->gfladj_refclk_lpm_sel)
467
467
reg |= DWC3_GFLADJ_REFCLK_LPM_SEL;
468
468
469
-
dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
469
+
dwc3_writel(dwc, DWC3_GFLADJ, reg);
470
470
}
471
471
472
472
/**
···
569
569
570
570
evt = dwc->ev_buf;
571
571
evt->lpos = 0;
572
-
dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0),
573
-
lower_32_bits(evt->dma));
574
-
dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0),
575
-
upper_32_bits(evt->dma));
576
-
dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0),
577
-
DWC3_GEVNTSIZ_SIZE(evt->length));
572
+
dwc3_writel(dwc, DWC3_GEVNTADRLO(0),
573
+
lower_32_bits(evt->dma));
574
+
dwc3_writel(dwc, DWC3_GEVNTADRHI(0),
575
+
upper_32_bits(evt->dma));
576
+
dwc3_writel(dwc, DWC3_GEVNTSIZ(0),
577
+
DWC3_GEVNTSIZ_SIZE(evt->length));
578
578
579
579
/* Clear any stale event */
580
-
reg = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
581
-
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), reg);
580
+
reg = dwc3_readl(dwc, DWC3_GEVNTCOUNT(0));
581
+
dwc3_writel(dwc, DWC3_GEVNTCOUNT(0), reg);
582
582
return 0;
583
583
}
584
584
···
593
593
* Exynos platforms may not be able to access event buffer if the
594
594
* controller failed to halt on dwc3_core_exit().
595
595
*/
596
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
596
+
reg = dwc3_readl(dwc, DWC3_DSTS);
597
597
if (!(reg & DWC3_DSTS_DEVCTRLHLT))
598
598
return;
599
599
···
601
601
602
602
evt->lpos = 0;
603
603
604
-
dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0);
605
-
dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0);
606
-
dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK
604
+
dwc3_writel(dwc, DWC3_GEVNTADRLO(0), 0);
605
+
dwc3_writel(dwc, DWC3_GEVNTADRHI(0), 0);
606
+
dwc3_writel(dwc, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK
607
607
| DWC3_GEVNTSIZ_SIZE(0));
608
608
609
609
/* Clear any stale event */
610
-
reg = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
611
-
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), reg);
610
+
reg = dwc3_readl(dwc, DWC3_GEVNTCOUNT(0));
611
+
dwc3_writel(dwc, DWC3_GEVNTCOUNT(0), reg);
612
612
}
613
613
614
614
static void dwc3_core_num_eps(struct dwc3 *dwc)
···
622
622
{
623
623
struct dwc3_hwparams *parms = &dwc->hwparams;
624
624
625
-
parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0);
626
-
parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1);
627
-
parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2);
628
-
parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3);
629
-
parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4);
630
-
parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5);
631
-
parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6);
632
-
parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7);
633
-
parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
625
+
parms->hwparams0 = dwc3_readl(dwc, DWC3_GHWPARAMS0);
626
+
parms->hwparams1 = dwc3_readl(dwc, DWC3_GHWPARAMS1);
627
+
parms->hwparams2 = dwc3_readl(dwc, DWC3_GHWPARAMS2);
628
+
parms->hwparams3 = dwc3_readl(dwc, DWC3_GHWPARAMS3);
629
+
parms->hwparams4 = dwc3_readl(dwc, DWC3_GHWPARAMS4);
630
+
parms->hwparams5 = dwc3_readl(dwc, DWC3_GHWPARAMS5);
631
+
parms->hwparams6 = dwc3_readl(dwc, DWC3_GHWPARAMS6);
632
+
parms->hwparams7 = dwc3_readl(dwc, DWC3_GHWPARAMS7);
633
+
parms->hwparams8 = dwc3_readl(dwc, DWC3_GHWPARAMS8);
634
634
635
635
if (DWC3_IP_IS(DWC32))
636
-
parms->hwparams9 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS9);
636
+
parms->hwparams9 = dwc3_readl(dwc, DWC3_GHWPARAMS9);
637
637
}
638
638
639
639
static void dwc3_config_soc_bus(struct dwc3 *dwc)
···
641
641
if (dwc->gsbuscfg0_reqinfo != DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED) {
642
642
u32 reg;
643
643
644
-
reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
644
+
reg = dwc3_readl(dwc, DWC3_GSBUSCFG0);
645
645
reg &= ~DWC3_GSBUSCFG0_REQINFO(~0);
646
646
reg |= DWC3_GSBUSCFG0_REQINFO(dwc->gsbuscfg0_reqinfo);
647
-
dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg);
647
+
dwc3_writel(dwc, DWC3_GSBUSCFG0, reg);
648
648
}
649
649
}
650
650
···
668
668
{
669
669
u32 reg;
670
670
671
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index));
671
+
reg = dwc3_readl(dwc, DWC3_GUSB3PIPECTL(index));
672
672
673
673
/*
674
674
* Make sure UX_EXIT_PX is cleared as that causes issues with some
···
706
706
if (dwc->dis_del_phy_power_chg_quirk)
707
707
reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;
708
708
709
-
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg);
709
+
dwc3_writel(dwc, DWC3_GUSB3PIPECTL(index), reg);
710
710
711
711
return 0;
712
712
}
···
715
715
{
716
716
u32 reg;
717
717
718
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index));
718
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(index));
719
719
720
720
/* Select the HS PHY interface */
721
721
switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) {
···
727
727
} else if (dwc->hsphy_interface &&
728
728
!strncmp(dwc->hsphy_interface, "ulpi", 4)) {
729
729
reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI;
730
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg);
730
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(index), reg);
731
731
} else {
732
732
/* Relying on default value. */
733
733
if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI))
···
777
777
if (dwc->ulpi_ext_vbus_drv)
778
778
reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV;
779
779
780
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg);
780
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(index), reg);
781
781
782
782
return 0;
783
783
}
···
991
991
{
992
992
u32 reg;
993
993
994
-
reg = dwc3_readl(dwc->regs, DWC3_GSNPSID);
994
+
reg = dwc3_readl(dwc, DWC3_GSNPSID);
995
995
dwc->ip = DWC3_GSNPS_ID(reg);
996
996
if (dwc->ip == DWC4_IP)
997
997
dwc->ip = DWC32_IP;
···
1000
1000
if (DWC3_IP_IS(DWC3)) {
1001
1001
dwc->revision = reg;
1002
1002
} else if (DWC3_IP_IS(DWC31) || DWC3_IP_IS(DWC32)) {
1003
-
dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER);
1004
-
dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE);
1003
+
dwc->revision = dwc3_readl(dwc, DWC3_VER_NUMBER);
1004
+
dwc->version_type = dwc3_readl(dwc, DWC3_VER_TYPE);
1005
1005
} else {
1006
1006
return false;
1007
1007
}
···
1015
1015
unsigned int hw_mode;
1016
1016
u32 reg;
1017
1017
1018
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
1018
+
reg = dwc3_readl(dwc, DWC3_GCTL);
1019
1019
reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
1020
1020
hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
1021
1021
power_opt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1);
···
1093
1093
if (DWC3_VER_IS_PRIOR(DWC3, 190A))
1094
1094
reg |= DWC3_GCTL_U2RSTECN;
1095
1095
1096
-
dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1096
+
dwc3_writel(dwc, DWC3_GCTL, reg);
1097
1097
}
1098
1098
1099
1099
static int dwc3_core_get_phy(struct dwc3 *dwc);
···
1113
1113
int ret;
1114
1114
int i;
1115
1115
1116
-
cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
1116
+
cfg = dwc3_readl(dwc, DWC3_GSBUSCFG0);
1117
1117
1118
1118
/*
1119
1119
* Handle property "snps,incr-burst-type-adjustment".
···
1188
1188
break;
1189
1189
}
1190
1190
1191
-
dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg);
1191
+
dwc3_writel(dwc, DWC3_GSBUSCFG0, cfg);
1192
1192
}
1193
1193
1194
1194
static void dwc3_set_power_down_clk_scale(struct dwc3 *dwc)
···
1213
1213
* (3x or more) to be within the requirement.
1214
1214
*/
1215
1215
scale = DIV_ROUND_UP(clk_get_rate(dwc->susp_clk), 16000);
1216
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
1216
+
reg = dwc3_readl(dwc, DWC3_GCTL);
1217
1217
if ((reg & DWC3_GCTL_PWRDNSCALE_MASK) < DWC3_GCTL_PWRDNSCALE(scale) ||
1218
1218
(reg & DWC3_GCTL_PWRDNSCALE_MASK) > DWC3_GCTL_PWRDNSCALE(scale*3)) {
1219
1219
reg &= ~(DWC3_GCTL_PWRDNSCALE_MASK);
1220
1220
reg |= DWC3_GCTL_PWRDNSCALE(scale);
1221
-
dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1221
+
dwc3_writel(dwc, DWC3_GCTL, reg);
1222
1222
}
1223
1223
}
1224
1224
···
1241
1241
tx_maxburst = dwc->tx_max_burst_prd;
1242
1242
1243
1243
if (rx_thr_num && rx_maxburst) {
1244
-
reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1244
+
reg = dwc3_readl(dwc, DWC3_GRXTHRCFG);
1245
1245
reg |= DWC31_RXTHRNUMPKTSEL_PRD;
1246
1246
1247
1247
reg &= ~DWC31_RXTHRNUMPKT_PRD(~0);
···
1250
1250
reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0);
1251
1251
reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst);
1252
1252
1253
-
dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1253
+
dwc3_writel(dwc, DWC3_GRXTHRCFG, reg);
1254
1254
}
1255
1255
1256
1256
if (tx_thr_num && tx_maxburst) {
1257
-
reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
1257
+
reg = dwc3_readl(dwc, DWC3_GTXTHRCFG);
1258
1258
reg |= DWC31_TXTHRNUMPKTSEL_PRD;
1259
1259
1260
1260
reg &= ~DWC31_TXTHRNUMPKT_PRD(~0);
···
1263
1263
reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0);
1264
1264
reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst);
1265
1265
1266
-
dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
1266
+
dwc3_writel(dwc, DWC3_GTXTHRCFG, reg);
1267
1267
}
1268
1268
}
1269
1269
···
1274
1274
1275
1275
if (DWC3_IP_IS(DWC3)) {
1276
1276
if (rx_thr_num && rx_maxburst) {
1277
-
reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1277
+
reg = dwc3_readl(dwc, DWC3_GRXTHRCFG);
1278
1278
reg |= DWC3_GRXTHRCFG_PKTCNTSEL;
1279
1279
1280
1280
reg &= ~DWC3_GRXTHRCFG_RXPKTCNT(~0);
···
1283
1283
reg &= ~DWC3_GRXTHRCFG_MAXRXBURSTSIZE(~0);
1284
1284
reg |= DWC3_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst);
1285
1285
1286
-
dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1286
+
dwc3_writel(dwc, DWC3_GRXTHRCFG, reg);
1287
1287
}
1288
1288
1289
1289
if (tx_thr_num && tx_maxburst) {
1290
-
reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
1290
+
reg = dwc3_readl(dwc, DWC3_GTXTHRCFG);
1291
1291
reg |= DWC3_GTXTHRCFG_PKTCNTSEL;
1292
1292
1293
1293
reg &= ~DWC3_GTXTHRCFG_TXPKTCNT(~0);
···
1296
1296
reg &= ~DWC3_GTXTHRCFG_MAXTXBURSTSIZE(~0);
1297
1297
reg |= DWC3_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst);
1298
1298
1299
-
dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
1299
+
dwc3_writel(dwc, DWC3_GTXTHRCFG, reg);
1300
1300
}
1301
1301
} else {
1302
1302
if (rx_thr_num && rx_maxburst) {
1303
-
reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1303
+
reg = dwc3_readl(dwc, DWC3_GRXTHRCFG);
1304
1304
reg |= DWC31_GRXTHRCFG_PKTCNTSEL;
1305
1305
1306
1306
reg &= ~DWC31_GRXTHRCFG_RXPKTCNT(~0);
···
1309
1309
reg &= ~DWC31_GRXTHRCFG_MAXRXBURSTSIZE(~0);
1310
1310
reg |= DWC31_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst);
1311
1311
1312
-
dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1312
+
dwc3_writel(dwc, DWC3_GRXTHRCFG, reg);
1313
1313
}
1314
1314
1315
1315
if (tx_thr_num && tx_maxburst) {
1316
-
reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
1316
+
reg = dwc3_readl(dwc, DWC3_GTXTHRCFG);
1317
1317
reg |= DWC31_GTXTHRCFG_PKTCNTSEL;
1318
1318
1319
1319
reg &= ~DWC31_GTXTHRCFG_TXPKTCNT(~0);
···
1322
1322
reg &= ~DWC31_GTXTHRCFG_MAXTXBURSTSIZE(~0);
1323
1323
reg |= DWC31_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst);
1324
1324
1325
-
dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
1325
+
dwc3_writel(dwc, DWC3_GTXTHRCFG, reg);
1326
1326
}
1327
1327
}
1328
1328
}
···
1345
1345
* Write Linux Version Code to our GUID register so it's easy to figure
1346
1346
* out which kernel version a bug was found.
1347
1347
*/
1348
-
dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
1348
+
dwc3_writel(dwc, DWC3_GUID, LINUX_VERSION_CODE);
1349
1349
1350
1350
ret = dwc3_phy_setup(dwc);
1351
1351
if (ret)
···
1410
1410
* DWC_usb31 controller.
1411
1411
*/
1412
1412
if (DWC3_VER_IS_WITHIN(DWC3, 310A, ANY)) {
1413
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL2);
1413
+
reg = dwc3_readl(dwc, DWC3_GUCTL2);
1414
1414
reg |= DWC3_GUCTL2_RST_ACTBITLATER;
1415
-
dwc3_writel(dwc->regs, DWC3_GUCTL2, reg);
1415
+
dwc3_writel(dwc, DWC3_GUCTL2, reg);
1416
1416
}
1417
1417
1418
1418
/*
···
1425
1425
* setting GUCTL2[19] by default; instead, use GUCTL2[19] = 0.
1426
1426
*/
1427
1427
if (DWC3_VER_IS(DWC3, 320A)) {
1428
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL2);
1428
+
reg = dwc3_readl(dwc, DWC3_GUCTL2);
1429
1429
reg &= ~DWC3_GUCTL2_LC_TIMER;
1430
-
dwc3_writel(dwc->regs, DWC3_GUCTL2, reg);
1430
+
dwc3_writel(dwc, DWC3_GUCTL2, reg);
1431
1431
}
1432
1432
1433
1433
/*
···
1440
1440
* legacy ULPI PHYs.
1441
1441
*/
1442
1442
if (dwc->resume_hs_terminations) {
1443
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
1443
+
reg = dwc3_readl(dwc, DWC3_GUCTL1);
1444
1444
reg |= DWC3_GUCTL1_RESUME_OPMODE_HS_HOST;
1445
-
dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
1445
+
dwc3_writel(dwc, DWC3_GUCTL1, reg);
1446
1446
}
1447
1447
1448
1448
if (!DWC3_VER_IS_PRIOR(DWC3, 250A)) {
1449
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
1449
+
reg = dwc3_readl(dwc, DWC3_GUCTL1);
1450
1450
1451
1451
/*
1452
1452
* Enable hardware control of sending remote wakeup
···
1481
1481
reg &= ~DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
1482
1482
}
1483
1483
1484
-
dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
1484
+
dwc3_writel(dwc, DWC3_GUCTL1, reg);
1485
1485
}
1486
1486
1487
1487
dwc3_config_threshold(dwc);
···
1492
1492
int i;
1493
1493
1494
1494
for (i = 0; i < dwc->num_usb3_ports; i++) {
1495
-
reg = dwc3_readl(dwc->regs, DWC3_LLUCTL(i));
1495
+
reg = dwc3_readl(dwc, DWC3_LLUCTL(i));
1496
1496
reg |= DWC3_LLUCTL_FORCE_GEN1;
1497
-
dwc3_writel(dwc->regs, DWC3_LLUCTL(i), reg);
1497
+
dwc3_writel(dwc, DWC3_LLUCTL(i), reg);
1498
1498
}
1499
1499
}
1500
1500
···
1513
1513
* function is available only from version 1.70a.
1514
1514
*/
1515
1515
if (DWC3_VER_IS_WITHIN(DWC31, 170A, 180A)) {
1516
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
1516
+
reg = dwc3_readl(dwc, DWC3_GUCTL3);
1517
1517
reg |= DWC3_GUCTL3_USB20_RETRY_DISABLE;
1518
-
dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
1518
+
dwc3_writel(dwc, DWC3_GUCTL3, reg);
1519
1519
}
1520
1520
1521
1521
return 0;
···
2155
2155
return 0;
2156
2156
}
2157
2157
2158
+
static void dwc3_vbus_draw_work(struct work_struct *work)
2159
+
{
2160
+
struct dwc3 *dwc = container_of(work, struct dwc3, vbus_draw_work);
2161
+
union power_supply_propval val = {0};
2162
+
int ret;
2163
+
2164
+
val.intval = 1000 * (dwc->current_limit);
2165
+
ret = power_supply_set_property(dwc->usb_psy, POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, &val);
2166
+
2167
+
if (ret < 0)
2168
+
dev_dbg(dwc->dev, "Error (%d) setting vbus draw (%d mA)\n",
2169
+
ret, dwc->current_limit);
2170
+
}
2171
+
2158
2172
static struct power_supply *dwc3_get_usb_power_supply(struct dwc3 *dwc)
2159
2173
{
2160
2174
struct power_supply *usb_psy;
···
2183
2169
if (!usb_psy)
2184
2170
return ERR_PTR(-EPROBE_DEFER);
2185
2171
2172
+
INIT_WORK(&dwc->vbus_draw_work, dwc3_vbus_draw_work);
2186
2173
return usb_psy;
2187
2174
}
2188
2175
···
2410
2395
2411
2396
dwc3_free_event_buffers(dwc);
2412
2397
2413
-
if (dwc->usb_psy)
2398
+
if (dwc->usb_psy) {
2399
+
cancel_work_sync(&dwc->vbus_draw_work);
2414
2400
power_supply_put(dwc->usb_psy);
2401
+
}
2415
2402
}
2416
2403
EXPORT_SYMBOL_GPL(dwc3_core_remove);
2417
2404
···
2456
2439
int ret;
2457
2440
2458
2441
if (!pm_runtime_suspended(dwc->dev) && !PMSG_IS_AUTO(msg)) {
2459
-
dwc->susphy_state = (dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)) &
2442
+
dwc->susphy_state = (dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0)) &
2460
2443
DWC3_GUSB2PHYCFG_SUSPHY) ||
2461
-
(dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)) &
2444
+
(dwc3_readl(dwc, DWC3_GUSB3PIPECTL(0)) &
2462
2445
DWC3_GUSB3PIPECTL_SUSPHY);
2463
2446
/*
2464
2447
* TI AM62 platform requires SUSPHY to be
···
2488
2471
if (dwc->dis_u2_susphy_quirk ||
2489
2472
dwc->dis_enblslpm_quirk) {
2490
2473
for (i = 0; i < dwc->num_usb2_ports; i++) {
2491
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
2474
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(i));
2492
2475
reg |= DWC3_GUSB2PHYCFG_ENBLSLPM |
2493
2476
DWC3_GUSB2PHYCFG_SUSPHY;
2494
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
2477
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(i), reg);
2495
2478
}
2496
2479
2497
2480
/* Give some time for USB2 PHY to suspend */
···
2551
2534
}
2552
2535
/* Restore GUSB2PHYCFG bits that were modified in suspend */
2553
2536
for (i = 0; i < dwc->num_usb2_ports; i++) {
2554
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
2537
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(i));
2555
2538
if (dwc->dis_u2_susphy_quirk)
2556
2539
reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
2557
2540
2558
2541
if (dwc->dis_enblslpm_quirk)
2559
2542
reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
2560
2543
2561
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
2544
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(i), reg);
2562
2545
}
2563
2546
2564
2547
for (i = 0; i < dwc->num_usb2_ports; i++)
···
2740
2723
2741
2724
if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST &&
2742
2725
dwc->dis_split_quirk) {
2743
-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
2726
+
reg = dwc3_readl(dwc, DWC3_GUCTL3);
2744
2727
reg |= DWC3_GUCTL3_SPLITDISABLE;
2745
-
dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
2728
+
dwc3_writel(dwc, DWC3_GUCTL3, reg);
2746
2729
}
2747
2730
}
2748
2731
EXPORT_SYMBOL_GPL(dwc3_pm_complete);
+8
-6
drivers/usb/dwc3/core.h
+8
-6
drivers/usb/dwc3/core.h
···
165
165
#define DWC3_DCFG1 0xc740 /* DWC_usb32 only */
166
166
167
167
#define DWC3_DEP_BASE(n) (0xc800 + ((n) * 0x10))
168
-
#define DWC3_DEPCMDPAR2 0x00
169
-
#define DWC3_DEPCMDPAR1 0x04
170
-
#define DWC3_DEPCMDPAR0 0x08
171
-
#define DWC3_DEPCMD 0x0c
168
+
#define DWC3_DEPCMDPAR2(n) (DWC3_DEP_BASE(n) + 0x00)
169
+
#define DWC3_DEPCMDPAR1(n) (DWC3_DEP_BASE(n) + 0x04)
170
+
#define DWC3_DEPCMDPAR0(n) (DWC3_DEP_BASE(n) + 0x08)
171
+
#define DWC3_DEPCMD(n) (DWC3_DEP_BASE(n) + 0x0c)
172
172
173
173
#define DWC3_DEV_IMOD(n) (0xca00 + ((n) * 0x4))
174
174
···
749
749
struct list_head pending_list;
750
750
struct list_head started_list;
751
751
752
-
void __iomem *regs;
753
-
754
752
struct dwc3_trb *trb_pool;
755
753
dma_addr_t trb_pool_dma;
756
754
struct dwc3 *dwc;
···
1058
1060
* @role_switch_default_mode: default operation mode of controller while
1059
1061
* usb role is USB_ROLE_NONE.
1060
1062
* @usb_psy: pointer to power supply interface.
1063
+
* @vbus_draw_work: Work to set the vbus drawing limit
1064
+
* @current_limit: How much current to draw from vbus, in milliAmperes.
1061
1065
* @usb2_phy: pointer to USB2 PHY
1062
1066
* @usb3_phy: pointer to USB3 PHY
1063
1067
* @usb2_generic_phy: pointer to array of USB2 PHYs
···
1246
1246
enum usb_dr_mode role_switch_default_mode;
1247
1247
1248
1248
struct power_supply *usb_psy;
1249
+
struct work_struct vbus_draw_work;
1250
+
unsigned int current_limit;
1249
1251
1250
1252
u32 fladj;
1251
1253
u32 ref_clk_per;
+20
-24
drivers/usb/dwc3/debugfs.c
+20
-24
drivers/usb/dwc3/debugfs.c
···
36
36
#define dump_ep_register_set(n) \
37
37
{ \
38
38
.name = "DEPCMDPAR2("__stringify(n)")", \
39
-
.offset = DWC3_DEP_BASE(n) + \
40
-
DWC3_DEPCMDPAR2, \
39
+
.offset = DWC3_DEPCMDPAR2(n), \
41
40
}, \
42
41
{ \
43
42
.name = "DEPCMDPAR1("__stringify(n)")", \
44
-
.offset = DWC3_DEP_BASE(n) + \
45
-
DWC3_DEPCMDPAR1, \
43
+
.offset = DWC3_DEPCMDPAR1(n), \
46
44
}, \
47
45
{ \
48
46
.name = "DEPCMDPAR0("__stringify(n)")", \
49
-
.offset = DWC3_DEP_BASE(n) + \
50
-
DWC3_DEPCMDPAR0, \
47
+
.offset = DWC3_DEPCMDPAR0(n), \
51
48
}, \
52
49
{ \
53
50
.name = "DEPCMD("__stringify(n)")", \
54
-
.offset = DWC3_DEP_BASE(n) + \
55
-
DWC3_DEPCMD, \
51
+
.offset = DWC3_DEPCMD(n), \
56
52
}
57
53
58
54
···
296
300
297
301
reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel);
298
302
299
-
dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
300
-
val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
303
+
dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg);
304
+
val = dwc3_readl(dwc, DWC3_GDBGLSP);
301
305
seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val);
302
306
303
307
if (dbc_enabled && sel < 256) {
304
308
reg |= DWC3_GDBGLSPMUX_ENDBC;
305
-
dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
306
-
val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
309
+
dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg);
310
+
val = dwc3_readl(dwc, DWC3_GDBGLSP);
307
311
seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val);
308
312
}
309
313
}
···
316
320
317
321
for (i = 0; i < 16; i++) {
318
322
reg = DWC3_GDBGLSPMUX_DEVSELECT(i);
319
-
dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
320
-
reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
323
+
dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg);
324
+
reg = dwc3_readl(dwc, DWC3_GDBGLSP);
321
325
seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg);
322
326
}
323
327
}
···
335
339
return ret;
336
340
337
341
spin_lock_irqsave(&dwc->lock, flags);
338
-
reg = dwc3_readl(dwc->regs, DWC3_GSTS);
342
+
reg = dwc3_readl(dwc, DWC3_GSTS);
339
343
current_mode = DWC3_GSTS_CURMOD(reg);
340
344
341
345
switch (current_mode) {
···
406
410
return ret;
407
411
408
412
spin_lock_irqsave(&dwc->lock, flags);
409
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
413
+
reg = dwc3_readl(dwc, DWC3_GCTL);
410
414
spin_unlock_irqrestore(&dwc->lock, flags);
411
415
412
416
mode = DWC3_GCTL_PRTCAP(reg);
···
478
482
return ret;
479
483
480
484
spin_lock_irqsave(&dwc->lock, flags);
481
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
485
+
reg = dwc3_readl(dwc, DWC3_DCTL);
482
486
reg &= DWC3_DCTL_TSTCTRL_MASK;
483
487
reg >>= 1;
484
488
spin_unlock_irqrestore(&dwc->lock, flags);
···
577
581
return ret;
578
582
579
583
spin_lock_irqsave(&dwc->lock, flags);
580
-
reg = dwc3_readl(dwc->regs, DWC3_GSTS);
584
+
reg = dwc3_readl(dwc, DWC3_GSTS);
581
585
if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
582
586
seq_puts(s, "Not available\n");
583
587
spin_unlock_irqrestore(&dwc->lock, flags);
···
585
589
return 0;
586
590
}
587
591
588
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
592
+
reg = dwc3_readl(dwc, DWC3_DSTS);
589
593
state = DWC3_DSTS_USBLNKST(reg);
590
594
speed = reg & DWC3_DSTS_CONNECTSPD;
591
595
···
639
643
return ret;
640
644
641
645
spin_lock_irqsave(&dwc->lock, flags);
642
-
reg = dwc3_readl(dwc->regs, DWC3_GSTS);
646
+
reg = dwc3_readl(dwc, DWC3_GSTS);
643
647
if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
644
648
spin_unlock_irqrestore(&dwc->lock, flags);
645
649
pm_runtime_put_sync(dwc->dev);
646
650
return -EINVAL;
647
651
}
648
652
649
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
653
+
reg = dwc3_readl(dwc, DWC3_DSTS);
650
654
speed = reg & DWC3_DSTS_CONNECTSPD;
651
655
652
656
if (speed < DWC3_DSTS_SUPERSPEED &&
···
942
946
943
947
spin_lock_irqsave(&dwc->lock, flags);
944
948
reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number);
945
-
dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
949
+
dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg);
946
950
947
-
lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0);
948
-
upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1);
951
+
lower_32_bits = dwc3_readl(dwc, DWC3_GDBGEPINFO0);
952
+
upper_32_bits = dwc3_readl(dwc, DWC3_GDBGEPINFO1);
949
953
950
954
ep_info = ((u64)upper_32_bits << 32) | lower_32_bits;
951
955
seq_printf(s, "0x%016llx\n", ep_info);
+45
-41
drivers/usb/dwc3/drd.c
+45
-41
drivers/usb/dwc3/drd.c
···
18
18
19
19
static void dwc3_otg_disable_events(struct dwc3 *dwc, u32 disable_mask)
20
20
{
21
-
u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN);
21
+
u32 reg = dwc3_readl(dwc, DWC3_OEVTEN);
22
22
23
23
reg &= ~(disable_mask);
24
-
dwc3_writel(dwc->regs, DWC3_OEVTEN, reg);
24
+
dwc3_writel(dwc, DWC3_OEVTEN, reg);
25
25
}
26
26
27
27
static void dwc3_otg_enable_events(struct dwc3 *dwc, u32 enable_mask)
28
28
{
29
-
u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN);
29
+
u32 reg = dwc3_readl(dwc, DWC3_OEVTEN);
30
30
31
31
reg |= (enable_mask);
32
-
dwc3_writel(dwc->regs, DWC3_OEVTEN, reg);
32
+
dwc3_writel(dwc, DWC3_OEVTEN, reg);
33
33
}
34
34
35
35
static void dwc3_otg_clear_events(struct dwc3 *dwc)
36
36
{
37
-
u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT);
37
+
u32 reg = dwc3_readl(dwc, DWC3_OEVT);
38
38
39
-
dwc3_writel(dwc->regs, DWC3_OEVTEN, reg);
39
+
dwc3_writel(dwc, DWC3_OEVTEN, reg);
40
40
}
41
41
42
42
#define DWC3_OTG_ALL_EVENTS (DWC3_OEVTEN_XHCIRUNSTPSETEN | \
···
72
72
struct dwc3 *dwc = _dwc;
73
73
irqreturn_t ret = IRQ_NONE;
74
74
75
-
reg = dwc3_readl(dwc->regs, DWC3_OEVT);
75
+
reg = dwc3_readl(dwc, DWC3_OEVT);
76
76
if (reg) {
77
77
/* ignore non OTG events, we can't disable them in OEVTEN */
78
78
if (!(reg & DWC3_OTG_ALL_EVENTS)) {
79
-
dwc3_writel(dwc->regs, DWC3_OEVT, reg);
79
+
dwc3_writel(dwc, DWC3_OEVT, reg);
80
80
return IRQ_NONE;
81
81
}
82
82
83
83
if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST &&
84
84
!(reg & DWC3_OEVT_DEVICEMODE))
85
85
dwc->otg_restart_host = true;
86
-
dwc3_writel(dwc->regs, DWC3_OEVT, reg);
86
+
dwc3_writel(dwc, DWC3_OEVT, reg);
87
87
ret = IRQ_WAKE_THREAD;
88
88
}
89
89
···
100
100
* the signal outputs sent to the PHY, the OTG FSM logic of the
101
101
* core and also the resets to the VBUS filters inside the core.
102
102
*/
103
-
reg = dwc3_readl(dwc->regs, DWC3_OCFG);
103
+
reg = dwc3_readl(dwc, DWC3_OCFG);
104
104
reg |= DWC3_OCFG_SFTRSTMASK;
105
-
dwc3_writel(dwc->regs, DWC3_OCFG, reg);
105
+
dwc3_writel(dwc, DWC3_OCFG, reg);
106
106
107
107
/* Disable hibernation for simplicity */
108
-
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
108
+
reg = dwc3_readl(dwc, DWC3_GCTL);
109
109
reg &= ~DWC3_GCTL_GBLHIBERNATIONEN;
110
-
dwc3_writel(dwc->regs, DWC3_GCTL, reg);
110
+
dwc3_writel(dwc, DWC3_GCTL, reg);
111
111
112
112
/*
113
113
* Initialize OTG registers as per
114
114
* Figure 11-4 OTG Driver Overall Programming Flow
115
115
*/
116
116
/* OCFG.SRPCap = 0, OCFG.HNPCap = 0 */
117
-
reg = dwc3_readl(dwc->regs, DWC3_OCFG);
117
+
reg = dwc3_readl(dwc, DWC3_OCFG);
118
118
reg &= ~(DWC3_OCFG_SRPCAP | DWC3_OCFG_HNPCAP);
119
-
dwc3_writel(dwc->regs, DWC3_OCFG, reg);
119
+
dwc3_writel(dwc, DWC3_OCFG, reg);
120
120
/* OEVT = FFFF */
121
121
dwc3_otg_clear_events(dwc);
122
122
/* OEVTEN = 0 */
···
127
127
* OCTL.PeriMode = 1, OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0,
128
128
* OCTL.HNPReq = 0
129
129
*/
130
-
reg = dwc3_readl(dwc->regs, DWC3_OCTL);
130
+
reg = dwc3_readl(dwc, DWC3_OCTL);
131
131
reg |= DWC3_OCTL_PERIMODE;
132
132
reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN |
133
133
DWC3_OCTL_HNPREQ);
134
-
dwc3_writel(dwc->regs, DWC3_OCTL, reg);
134
+
dwc3_writel(dwc, DWC3_OCTL, reg);
135
135
}
136
136
137
137
static int dwc3_otg_get_irq(struct dwc3 *dwc)
···
175
175
/* GCTL.PrtCapDir=2'b11 */
176
176
dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG, true);
177
177
/* GUSB2PHYCFG0.SusPHY=0 */
178
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
178
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
179
179
reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
180
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
180
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
181
181
182
182
/* Initialize OTG registers */
183
183
dwc3_otgregs_init(dwc);
···
203
203
* OCTL.PeriMode=0, OCTL.TermSelDLPulse = 0,
204
204
* OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0
205
205
*/
206
-
reg = dwc3_readl(dwc->regs, DWC3_OCTL);
206
+
reg = dwc3_readl(dwc, DWC3_OCTL);
207
207
reg &= ~(DWC3_OCTL_PERIMODE | DWC3_OCTL_TERMSELIDPULSE |
208
208
DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN);
209
-
dwc3_writel(dwc->regs, DWC3_OCTL, reg);
209
+
dwc3_writel(dwc, DWC3_OCTL, reg);
210
210
211
211
/*
212
212
* OCFG.DisPrtPwrCutoff = 0/1
213
213
*/
214
-
reg = dwc3_readl(dwc->regs, DWC3_OCFG);
214
+
reg = dwc3_readl(dwc, DWC3_OCFG);
215
215
reg &= ~DWC3_OCFG_DISPWRCUTTOFF;
216
-
dwc3_writel(dwc->regs, DWC3_OCFG, reg);
216
+
dwc3_writel(dwc, DWC3_OCFG, reg);
217
217
218
218
/*
219
219
* OCFG.SRPCap = 1, OCFG.HNPCap = GHWPARAMS6.HNP_CAP
···
229
229
230
230
/* GUSB2PHYCFG.ULPIAutoRes = 1/0, GUSB2PHYCFG.SusPHY = 1 */
231
231
if (!dwc->dis_u2_susphy_quirk) {
232
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
232
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
233
233
reg |= DWC3_GUSB2PHYCFG_SUSPHY;
234
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
234
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
235
235
}
236
236
237
237
/* Set Port Power to enable VBUS: OCTL.PrtPwrCtl = 1 */
238
-
reg = dwc3_readl(dwc->regs, DWC3_OCTL);
238
+
reg = dwc3_readl(dwc, DWC3_OCTL);
239
239
reg |= DWC3_OCTL_PRTPWRCTL;
240
-
dwc3_writel(dwc->regs, DWC3_OCTL, reg);
240
+
dwc3_writel(dwc, DWC3_OCTL, reg);
241
241
}
242
242
243
243
/* should be called after Host controller driver is stopped */
···
258
258
*/
259
259
260
260
/* OCTL.HstSetHNPEn = 0, OCTL.PrtPwrCtl=0 */
261
-
reg = dwc3_readl(dwc->regs, DWC3_OCTL);
261
+
reg = dwc3_readl(dwc, DWC3_OCTL);
262
262
reg &= ~(DWC3_OCTL_HSTSETHNPEN | DWC3_OCTL_PRTPWRCTL);
263
-
dwc3_writel(dwc->regs, DWC3_OCTL, reg);
263
+
dwc3_writel(dwc, DWC3_OCTL, reg);
264
264
}
265
265
266
266
/* should be called before the gadget controller driver is started */
···
274
274
* OCFG.HNPCap = GHWPARAMS6.HNP_CAP, OCFG.SRPCap = 1
275
275
* but we keep them 0 for simple dual-role operation.
276
276
*/
277
-
reg = dwc3_readl(dwc->regs, DWC3_OCFG);
277
+
reg = dwc3_readl(dwc, DWC3_OCFG);
278
278
/* OCFG.OTGSftRstMsk = 0/1 */
279
279
reg |= DWC3_OCFG_SFTRSTMASK;
280
-
dwc3_writel(dwc->regs, DWC3_OCFG, reg);
280
+
dwc3_writel(dwc, DWC3_OCFG, reg);
281
281
/*
282
282
* OCTL.PeriMode = 1
283
283
* OCTL.TermSelDLPulse = 0/1, OCTL.HNPReq = 0
284
284
* OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0
285
285
*/
286
-
reg = dwc3_readl(dwc->regs, DWC3_OCTL);
286
+
reg = dwc3_readl(dwc, DWC3_OCTL);
287
287
reg |= DWC3_OCTL_PERIMODE;
288
288
reg &= ~(DWC3_OCTL_TERMSELIDPULSE | DWC3_OCTL_HNPREQ |
289
289
DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN);
290
-
dwc3_writel(dwc->regs, DWC3_OCTL, reg);
290
+
dwc3_writel(dwc, DWC3_OCTL, reg);
291
291
/* OEVTEN.OTGBDevSesVldDetEvntEn = 1 */
292
292
dwc3_otg_enable_events(dwc, DWC3_OEVTEN_BDEVSESSVLDDETEN);
293
293
/* GUSB2PHYCFG.ULPIAutoRes = 0, GUSB2PHYCFG0.SusPHY = 1 */
294
294
if (!dwc->dis_u2_susphy_quirk) {
295
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
295
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
296
296
reg |= DWC3_GUSB2PHYCFG_SUSPHY;
297
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
297
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
298
298
}
299
299
/* GCTL.GblHibernationEn = 0. Already 0. */
300
300
}
···
319
319
DWC3_OEVTEN_BDEVBHOSTENDEN);
320
320
321
321
/* OCTL.DevSetHNPEn = 0, OCTL.HNPReq = 0, OCTL.PeriMode=1 */
322
-
reg = dwc3_readl(dwc->regs, DWC3_OCTL);
322
+
reg = dwc3_readl(dwc, DWC3_OCTL);
323
323
reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HNPREQ);
324
324
reg |= DWC3_OCTL_PERIMODE;
325
-
dwc3_writel(dwc->regs, DWC3_OCTL, reg);
325
+
dwc3_writel(dwc, DWC3_OCTL, reg);
326
326
}
327
327
328
328
void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus)
···
341
341
return;
342
342
343
343
if (!ignore_idstatus) {
344
-
reg = dwc3_readl(dwc->regs, DWC3_OSTS);
344
+
reg = dwc3_readl(dwc, DWC3_OSTS);
345
345
id = !!(reg & DWC3_OSTS_CONIDSTS);
346
346
347
347
dwc->desired_otg_role = id ? DWC3_OTG_ROLE_DEVICE :
···
381
381
dwc3_otgregs_init(dwc);
382
382
dwc3_otg_host_init(dwc);
383
383
spin_unlock_irqrestore(&dwc->lock, flags);
384
+
dwc3_pre_set_role(dwc, USB_ROLE_HOST);
384
385
ret = dwc3_host_init(dwc);
385
386
if (ret) {
386
387
dev_err(dwc->dev, "failed to initialize host\n");
···
407
406
otg_set_vbus(dwc->usb2_phy->otg, false);
408
407
if (dwc->usb2_generic_phy[0])
409
408
phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE);
409
+
dwc3_pre_set_role(dwc, USB_ROLE_DEVICE);
410
410
ret = dwc3_gadget_init(dwc);
411
411
if (ret)
412
412
dev_err(dwc->dev, "failed to initialize peripheral\n");
···
435
433
unsigned long event, void *ptr)
436
434
{
437
435
struct dwc3 *dwc = container_of(nb, struct dwc3, edev_nb);
436
+
u32 mode = event ? DWC3_GCTL_PRTCAP_HOST : DWC3_GCTL_PRTCAP_DEVICE;
437
+
enum usb_role role = mode == DWC3_GCTL_PRTCAP_HOST ?
438
+
USB_ROLE_HOST : USB_ROLE_DEVICE;
438
439
439
-
dwc3_set_mode(dwc, event ?
440
-
DWC3_GCTL_PRTCAP_HOST :
441
-
DWC3_GCTL_PRTCAP_DEVICE);
440
+
dwc3_pre_set_role(dwc, role);
441
+
dwc3_set_mode(dwc, mode);
442
442
443
443
return NOTIFY_DONE;
444
444
}
+626
drivers/usb/dwc3/dwc3-google.c
+626
drivers/usb/dwc3/dwc3-google.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* dwc3-google.c - Google DWC3 Specific Glue Layer
4
+
*
5
+
* Copyright (c) 2025, Google LLC
6
+
* Author: Roy Luo <royluo@google.com>
7
+
*/
8
+
9
+
#include <linux/bitfield.h>
10
+
#include <linux/clk.h>
11
+
#include <linux/iopoll.h>
12
+
#include <linux/irq.h>
13
+
#include <linux/kernel.h>
14
+
#include <linux/mfd/syscon.h>
15
+
#include <linux/module.h>
16
+
#include <linux/of.h>
17
+
#include <linux/platform_device.h>
18
+
#include <linux/pm_domain.h>
19
+
#include <linux/regmap.h>
20
+
#include <linux/reset.h>
21
+
#include "core.h"
22
+
#include "glue.h"
23
+
24
+
/* HOST CFG registers */
25
+
#define HC_STATUS_OFFSET 0x0
26
+
#define HC_STATUS_CURRENT_POWER_STATE_U2PMU GENMASK(1, 0)
27
+
#define HC_STATUS_CURRENT_POWER_STATE_U3PMU GENMASK(4, 3)
28
+
29
+
#define HOST_CFG1_OFFSET 0x4
30
+
#define HOST_CFG1_PME_EN BIT(3)
31
+
#define HOST_CFG1_PM_POWER_STATE_REQUEST GENMASK(5, 4)
32
+
#define HOST_CFG1_PM_POWER_STATE_D0 0x0
33
+
#define HOST_CFG1_PM_POWER_STATE_D3 0x3
34
+
35
+
/* USBINT registers */
36
+
#define USBINT_CFG1_OFFSET 0x0
37
+
#define USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK BIT(2)
38
+
#define USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK BIT(3)
39
+
#define USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN BIT(8)
40
+
#define USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN BIT(9)
41
+
#define USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR BIT(14)
42
+
#define USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR BIT(15)
43
+
44
+
#define USBINT_STATUS_OFFSET 0x4
45
+
#define USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW BIT(2)
46
+
#define USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW BIT(3)
47
+
48
+
#define USBCS_TOP_CTRL_CFG1_OFFSET 0xc
49
+
#define USBCS_TOP_CTRL_CFG1_USB2ONLY_MODE BIT(5)
50
+
51
+
#define DWC3_GOOGLE_MAX_RESETS 4
52
+
53
+
struct dwc3_google {
54
+
struct device *dev;
55
+
struct dwc3 dwc;
56
+
struct clk_bulk_data *clks;
57
+
int num_clks;
58
+
struct reset_control_bulk_data rsts[DWC3_GOOGLE_MAX_RESETS];
59
+
int num_rsts;
60
+
struct reset_control *non_sticky_rst;
61
+
struct device *usb_psw_pd;
62
+
struct device_link *usb_psw_pd_dl;
63
+
struct notifier_block usb_psw_pd_nb;
64
+
struct device *usb_top_pd;
65
+
struct device_link *usb_top_pd_dl;
66
+
struct regmap *usb_cfg_regmap;
67
+
unsigned int host_cfg_offset;
68
+
unsigned int usbint_cfg_offset;
69
+
int hs_pme_irq;
70
+
int ss_pme_irq;
71
+
bool is_usb2only;
72
+
bool is_hibernation;
73
+
};
74
+
75
+
#define to_dwc3_google(d) container_of_const((d), struct dwc3_google, dwc)
76
+
77
+
static int dwc3_google_rst_init(struct dwc3_google *google)
78
+
{
79
+
int ret;
80
+
81
+
google->num_rsts = 4;
82
+
google->rsts[0].id = "non_sticky";
83
+
google->rsts[1].id = "sticky";
84
+
google->rsts[2].id = "drd_bus";
85
+
google->rsts[3].id = "top";
86
+
87
+
ret = devm_reset_control_bulk_get_exclusive(google->dev,
88
+
google->num_rsts,
89
+
google->rsts);
90
+
91
+
if (ret < 0)
92
+
return ret;
93
+
94
+
google->non_sticky_rst = google->rsts[0].rstc;
95
+
96
+
return 0;
97
+
}
98
+
99
+
static int dwc3_google_set_pmu_state(struct dwc3_google *google, int state)
100
+
{
101
+
u32 reg;
102
+
int ret;
103
+
104
+
regmap_read(google->usb_cfg_regmap,
105
+
google->host_cfg_offset + HOST_CFG1_OFFSET, ®);
106
+
107
+
reg &= ~HOST_CFG1_PM_POWER_STATE_REQUEST;
108
+
reg |= (FIELD_PREP(HOST_CFG1_PM_POWER_STATE_REQUEST, state) |
109
+
HOST_CFG1_PME_EN);
110
+
regmap_write(google->usb_cfg_regmap,
111
+
google->host_cfg_offset + HOST_CFG1_OFFSET, reg);
112
+
113
+
ret = regmap_read_poll_timeout(google->usb_cfg_regmap,
114
+
google->host_cfg_offset + HC_STATUS_OFFSET, reg,
115
+
(FIELD_GET(HC_STATUS_CURRENT_POWER_STATE_U2PMU,
116
+
reg) == state &&
117
+
FIELD_GET(HC_STATUS_CURRENT_POWER_STATE_U3PMU,
118
+
reg) == state),
119
+
10, 10000);
120
+
121
+
if (ret)
122
+
dev_err(google->dev, "failed to set PMU state %d\n", state);
123
+
124
+
return ret;
125
+
}
126
+
127
+
/*
128
+
* Clear pme interrupts and report their status.
129
+
* The hardware requires write-1 then write-0 sequence to clear the interrupt bits.
130
+
*/
131
+
static u32 dwc3_google_clear_pme_irqs(struct dwc3_google *google)
132
+
{
133
+
u32 irq_status, reg_set, reg_clear;
134
+
135
+
regmap_read(google->usb_cfg_regmap,
136
+
google->usbint_cfg_offset + USBINT_STATUS_OFFSET, &irq_status);
137
+
138
+
irq_status &= (USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW |
139
+
USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW);
140
+
if (!irq_status)
141
+
return irq_status;
142
+
143
+
regmap_read(google->usb_cfg_regmap,
144
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®_set);
145
+
146
+
reg_clear = reg_set;
147
+
if (irq_status & USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW) {
148
+
reg_set |= USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR;
149
+
reg_clear &= ~USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR;
150
+
}
151
+
if (irq_status & USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW) {
152
+
reg_set |= USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR;
153
+
reg_clear &= ~USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR;
154
+
}
155
+
156
+
regmap_write(google->usb_cfg_regmap,
157
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg_set);
158
+
regmap_write(google->usb_cfg_regmap,
159
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg_clear);
160
+
161
+
return irq_status;
162
+
}
163
+
164
+
static void dwc3_google_enable_pme_irq(struct dwc3_google *google)
165
+
{
166
+
u32 reg;
167
+
168
+
regmap_read(google->usb_cfg_regmap,
169
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®);
170
+
reg &= ~(USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK |
171
+
USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK);
172
+
reg |= (USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN |
173
+
USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN);
174
+
regmap_write(google->usb_cfg_regmap,
175
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg);
176
+
177
+
enable_irq(google->hs_pme_irq);
178
+
enable_irq(google->ss_pme_irq);
179
+
enable_irq_wake(google->hs_pme_irq);
180
+
enable_irq_wake(google->ss_pme_irq);
181
+
}
182
+
183
+
static void dwc3_google_disable_pme_irq(struct dwc3_google *google)
184
+
{
185
+
u32 reg;
186
+
187
+
regmap_read(google->usb_cfg_regmap,
188
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®);
189
+
reg &= ~(USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN |
190
+
USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN);
191
+
reg |= (USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK |
192
+
USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK);
193
+
regmap_write(google->usb_cfg_regmap,
194
+
google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg);
195
+
196
+
disable_irq_wake(google->hs_pme_irq);
197
+
disable_irq_wake(google->ss_pme_irq);
198
+
disable_irq_nosync(google->hs_pme_irq);
199
+
disable_irq_nosync(google->ss_pme_irq);
200
+
}
201
+
202
+
static irqreturn_t dwc3_google_resume_irq(int irq, void *data)
203
+
{
204
+
struct dwc3_google *google = data;
205
+
struct dwc3 *dwc = &google->dwc;
206
+
u32 irq_status, dr_role;
207
+
208
+
irq_status = dwc3_google_clear_pme_irqs(google);
209
+
dr_role = dwc->current_dr_role;
210
+
211
+
if (!irq_status || !google->is_hibernation ||
212
+
dr_role != DWC3_GCTL_PRTCAP_HOST) {
213
+
dev_dbg(google->dev, "spurious pme irq %d, hibernation %d, dr_role %u\n",
214
+
irq, google->is_hibernation, dr_role);
215
+
return IRQ_HANDLED;
216
+
}
217
+
218
+
if (dwc->xhci)
219
+
pm_runtime_resume(&dwc->xhci->dev);
220
+
221
+
return IRQ_HANDLED;
222
+
}
223
+
224
+
static int dwc3_google_request_irq(struct dwc3_google *google, struct platform_device *pdev,
225
+
const char *irq_name, const char *req_name)
226
+
{
227
+
int ret;
228
+
int irq;
229
+
230
+
irq = platform_get_irq_byname(pdev, irq_name);
231
+
if (irq < 0)
232
+
return irq;
233
+
234
+
irq_set_status_flags(irq, IRQ_NOAUTOEN);
235
+
ret = devm_request_threaded_irq(google->dev, irq, NULL,
236
+
dwc3_google_resume_irq,
237
+
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
238
+
req_name, google);
239
+
if (ret < 0) {
240
+
dev_err(google->dev, "failed to request irq %s\n", req_name);
241
+
return ret;
242
+
}
243
+
244
+
return irq;
245
+
}
246
+
247
+
static int dwc3_google_usb_psw_pd_notifier(struct notifier_block *nb, unsigned long action, void *d)
248
+
{
249
+
struct dwc3_google *google = container_of(nb, struct dwc3_google, usb_psw_pd_nb);
250
+
int ret;
251
+
252
+
if (!google->is_hibernation)
253
+
return NOTIFY_OK;
254
+
255
+
if (action == GENPD_NOTIFY_OFF) {
256
+
dev_dbg(google->dev, "enter D3 power state\n");
257
+
dwc3_google_set_pmu_state(google, HOST_CFG1_PM_POWER_STATE_D3);
258
+
ret = reset_control_assert(google->non_sticky_rst);
259
+
if (ret)
260
+
dev_err(google->dev, "non sticky reset assert failed: %d\n", ret);
261
+
} else if (action == GENPD_NOTIFY_ON) {
262
+
dev_dbg(google->dev, "enter D0 power state\n");
263
+
dwc3_google_clear_pme_irqs(google);
264
+
ret = reset_control_deassert(google->non_sticky_rst);
265
+
if (ret)
266
+
dev_err(google->dev, "non sticky reset deassert failed: %d\n", ret);
267
+
dwc3_google_set_pmu_state(google, HOST_CFG1_PM_POWER_STATE_D0);
268
+
}
269
+
270
+
return NOTIFY_OK;
271
+
}
272
+
273
+
static void dwc3_google_pm_domain_deinit(struct dwc3_google *google)
274
+
{
275
+
if (google->usb_top_pd_dl)
276
+
device_link_del(google->usb_top_pd_dl);
277
+
278
+
if (!IS_ERR_OR_NULL(google->usb_top_pd)) {
279
+
device_set_wakeup_capable(google->usb_top_pd, false);
280
+
dev_pm_domain_detach(google->usb_top_pd, true);
281
+
}
282
+
283
+
if (google->usb_psw_pd_dl)
284
+
device_link_del(google->usb_psw_pd_dl);
285
+
286
+
if (!IS_ERR_OR_NULL(google->usb_psw_pd)) {
287
+
dev_pm_genpd_remove_notifier(google->usb_psw_pd);
288
+
dev_pm_domain_detach(google->usb_psw_pd, true);
289
+
}
290
+
}
291
+
292
+
static int dwc3_google_pm_domain_init(struct dwc3_google *google)
293
+
{
294
+
int ret;
295
+
296
+
/*
297
+
* Establish PM RUNTIME link between dwc dev and its power domain usb_psw_pd,
298
+
* register notifier block to handle hibernation.
299
+
*/
300
+
google->usb_psw_pd = dev_pm_domain_attach_by_name(google->dev, "psw");
301
+
if (IS_ERR_OR_NULL(google->usb_psw_pd)) {
302
+
dev_err(google->dev, "failed to get psw pd");
303
+
ret = google->usb_psw_pd ? PTR_ERR(google->usb_psw_pd) : -ENODATA;
304
+
return ret;
305
+
}
306
+
307
+
google->usb_psw_pd_nb.notifier_call = dwc3_google_usb_psw_pd_notifier;
308
+
ret = dev_pm_genpd_add_notifier(google->usb_psw_pd, &google->usb_psw_pd_nb);
309
+
if (ret) {
310
+
dev_err(google->dev, "failed to add psw pd notifier");
311
+
goto err;
312
+
}
313
+
314
+
google->usb_psw_pd_dl = device_link_add(google->dev, google->usb_psw_pd,
315
+
DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME |
316
+
DL_FLAG_RPM_ACTIVE);
317
+
if (!google->usb_psw_pd_dl) {
318
+
dev_err(google->usb_psw_pd, "failed to add device link");
319
+
ret = -ENODEV;
320
+
goto err;
321
+
}
322
+
323
+
/*
324
+
* usb_top_pd is the parent power domain of usb_psw_pd. Keeping usb_top_pd on
325
+
* while usb_psw_pd is off places the controller in a power-gated state,
326
+
* essential for hibernation. Acquire a handle to usb_top_pd and sets it as
327
+
* wakeup-capable to allow the domain to be left on during system suspend.
328
+
*/
329
+
google->usb_top_pd = dev_pm_domain_attach_by_name(google->dev, "top");
330
+
if (IS_ERR_OR_NULL(google->usb_top_pd)) {
331
+
dev_err(google->dev, "failed to get top pd");
332
+
ret = google->usb_top_pd ? PTR_ERR(google->usb_top_pd) : -ENODATA;
333
+
goto err;
334
+
}
335
+
device_set_wakeup_capable(google->usb_top_pd, true);
336
+
337
+
google->usb_top_pd_dl = device_link_add(google->dev, google->usb_top_pd,
338
+
DL_FLAG_STATELESS);
339
+
if (!google->usb_top_pd_dl) {
340
+
dev_err(google->usb_top_pd, "failed to add device link");
341
+
ret = -ENODEV;
342
+
goto err;
343
+
}
344
+
345
+
return 0;
346
+
347
+
err:
348
+
dwc3_google_pm_domain_deinit(google);
349
+
350
+
return ret;
351
+
}
352
+
353
+
static void dwc3_google_program_usb2only(struct dwc3_google *google)
354
+
{
355
+
u32 reg;
356
+
357
+
regmap_read(google->usb_cfg_regmap,
358
+
google->usbint_cfg_offset + USBCS_TOP_CTRL_CFG1_OFFSET, ®);
359
+
reg |= USBCS_TOP_CTRL_CFG1_USB2ONLY_MODE;
360
+
regmap_write(google->usb_cfg_regmap,
361
+
google->usbint_cfg_offset + USBCS_TOP_CTRL_CFG1_OFFSET, reg);
362
+
}
363
+
364
+
static int dwc3_google_probe(struct platform_device *pdev)
365
+
{
366
+
struct dwc3_probe_data probe_data = {};
367
+
struct device *dev = &pdev->dev;
368
+
struct dwc3_google *google;
369
+
struct resource *res;
370
+
int ret;
371
+
u32 args[2];
372
+
373
+
google = devm_kzalloc(&pdev->dev, sizeof(*google), GFP_KERNEL);
374
+
if (!google)
375
+
return -ENOMEM;
376
+
377
+
google->dev = &pdev->dev;
378
+
379
+
ret = dwc3_google_pm_domain_init(google);
380
+
if (ret < 0)
381
+
return dev_err_probe(dev, ret, "failed to init pdom\n");
382
+
383
+
google->usb_cfg_regmap =
384
+
syscon_regmap_lookup_by_phandle_args(dev->of_node,
385
+
"google,usb-cfg-csr",
386
+
ARRAY_SIZE(args), args);
387
+
if (IS_ERR(google->usb_cfg_regmap)) {
388
+
return dev_err_probe(dev, PTR_ERR(google->usb_cfg_regmap),
389
+
"invalid usb cfg csr\n");
390
+
}
391
+
392
+
google->host_cfg_offset = args[0];
393
+
google->usbint_cfg_offset = args[1];
394
+
395
+
if (device_property_match_string(dev, "phy-names", "usb3-phy") < 0) {
396
+
google->is_usb2only = true;
397
+
dwc3_google_program_usb2only(google);
398
+
}
399
+
400
+
ret = devm_clk_bulk_get_all_enabled(dev, &google->clks);
401
+
if (ret < 0) {
402
+
ret = dev_err_probe(dev, ret, "failed to get and enable clks\n");
403
+
goto err_deinit_pdom;
404
+
}
405
+
google->num_clks = ret;
406
+
407
+
ret = dwc3_google_rst_init(google);
408
+
if (ret) {
409
+
ret = dev_err_probe(dev, ret, "failed to get resets\n");
410
+
goto err_deinit_pdom;
411
+
}
412
+
413
+
ret = reset_control_bulk_deassert(google->num_rsts, google->rsts);
414
+
if (ret) {
415
+
ret = dev_err_probe(dev, ret, "failed to deassert rsts\n");
416
+
goto err_deinit_pdom;
417
+
}
418
+
419
+
ret = dwc3_google_request_irq(google, pdev, "hs_pme", "USB HS wakeup");
420
+
if (ret < 0) {
421
+
ret = dev_err_probe(dev, ret, "failed to request hs pme irq");
422
+
goto err_reset_assert;
423
+
}
424
+
google->hs_pme_irq = ret;
425
+
426
+
ret = dwc3_google_request_irq(google, pdev, "ss_pme", "USB SS wakeup");
427
+
if (ret < 0) {
428
+
ret = dev_err_probe(dev, ret, "failed to request ss pme irq");
429
+
goto err_reset_assert;
430
+
}
431
+
google->ss_pme_irq = ret;
432
+
433
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
434
+
if (!res) {
435
+
ret = dev_err_probe(dev, -ENODEV, "invalid memory\n");
436
+
goto err_reset_assert;
437
+
}
438
+
439
+
device_init_wakeup(dev, true);
440
+
441
+
google->dwc.dev = dev;
442
+
probe_data.dwc = &google->dwc;
443
+
probe_data.res = res;
444
+
probe_data.ignore_clocks_and_resets = true;
445
+
ret = dwc3_core_probe(&probe_data);
446
+
if (ret) {
447
+
ret = dev_err_probe(dev, ret, "failed to register DWC3 Core\n");
448
+
goto err_reset_assert;
449
+
}
450
+
451
+
return 0;
452
+
453
+
err_reset_assert:
454
+
reset_control_bulk_assert(google->num_rsts, google->rsts);
455
+
456
+
err_deinit_pdom:
457
+
dwc3_google_pm_domain_deinit(google);
458
+
459
+
return ret;
460
+
}
461
+
462
+
static void dwc3_google_remove(struct platform_device *pdev)
463
+
{
464
+
struct dwc3 *dwc = platform_get_drvdata(pdev);
465
+
struct dwc3_google *google = to_dwc3_google(dwc);
466
+
467
+
dwc3_core_remove(&google->dwc);
468
+
469
+
reset_control_bulk_assert(google->num_rsts, google->rsts);
470
+
471
+
dwc3_google_pm_domain_deinit(google);
472
+
}
473
+
474
+
static int dwc3_google_suspend(struct dwc3_google *google, pm_message_t msg)
475
+
{
476
+
if (pm_runtime_suspended(google->dev))
477
+
return 0;
478
+
479
+
if (google->dwc.current_dr_role == DWC3_GCTL_PRTCAP_HOST) {
480
+
/*
481
+
* Follow dwc3_suspend_common() guidelines for deciding between
482
+
* a full teardown and hibernation.
483
+
*/
484
+
if (PMSG_IS_AUTO(msg) || device_may_wakeup(google->dev)) {
485
+
dev_dbg(google->dev, "enter hibernation");
486
+
pm_runtime_get_sync(google->usb_top_pd);
487
+
device_wakeup_enable(google->usb_top_pd);
488
+
dwc3_google_enable_pme_irq(google);
489
+
google->is_hibernation = true;
490
+
return 0;
491
+
}
492
+
}
493
+
494
+
reset_control_bulk_assert(google->num_rsts, google->rsts);
495
+
clk_bulk_disable_unprepare(google->num_clks, google->clks);
496
+
497
+
return 0;
498
+
}
499
+
500
+
static int dwc3_google_resume(struct dwc3_google *google, pm_message_t msg)
501
+
{
502
+
int ret;
503
+
504
+
if (google->is_hibernation) {
505
+
dev_dbg(google->dev, "exit hibernation");
506
+
dwc3_google_disable_pme_irq(google);
507
+
device_wakeup_disable(google->usb_top_pd);
508
+
pm_runtime_put_sync(google->usb_top_pd);
509
+
google->is_hibernation = false;
510
+
return 0;
511
+
}
512
+
513
+
if (google->is_usb2only)
514
+
dwc3_google_program_usb2only(google);
515
+
516
+
ret = clk_bulk_prepare_enable(google->num_clks, google->clks);
517
+
if (ret)
518
+
return ret;
519
+
520
+
ret = reset_control_bulk_deassert(google->num_rsts, google->rsts);
521
+
if (ret) {
522
+
clk_bulk_disable_unprepare(google->num_clks, google->clks);
523
+
return ret;
524
+
}
525
+
526
+
return 0;
527
+
}
528
+
529
+
static int dwc3_google_pm_suspend(struct device *dev)
530
+
{
531
+
struct dwc3 *dwc = dev_get_drvdata(dev);
532
+
struct dwc3_google *google = to_dwc3_google(dwc);
533
+
int ret;
534
+
535
+
ret = dwc3_pm_suspend(&google->dwc);
536
+
if (ret)
537
+
return ret;
538
+
539
+
return dwc3_google_suspend(google, PMSG_SUSPEND);
540
+
}
541
+
542
+
static int dwc3_google_pm_resume(struct device *dev)
543
+
{
544
+
struct dwc3 *dwc = dev_get_drvdata(dev);
545
+
struct dwc3_google *google = to_dwc3_google(dwc);
546
+
int ret;
547
+
548
+
ret = dwc3_google_resume(google, PMSG_RESUME);
549
+
if (ret)
550
+
return ret;
551
+
552
+
return dwc3_pm_resume(&google->dwc);
553
+
}
554
+
555
+
static void dwc3_google_complete(struct device *dev)
556
+
{
557
+
struct dwc3 *dwc = dev_get_drvdata(dev);
558
+
559
+
dwc3_pm_complete(dwc);
560
+
}
561
+
562
+
static int dwc3_google_prepare(struct device *dev)
563
+
{
564
+
struct dwc3 *dwc = dev_get_drvdata(dev);
565
+
566
+
return dwc3_pm_prepare(dwc);
567
+
}
568
+
569
+
static int dwc3_google_runtime_suspend(struct device *dev)
570
+
{
571
+
struct dwc3 *dwc = dev_get_drvdata(dev);
572
+
struct dwc3_google *google = to_dwc3_google(dwc);
573
+
int ret;
574
+
575
+
ret = dwc3_runtime_suspend(&google->dwc);
576
+
if (ret)
577
+
return ret;
578
+
579
+
return dwc3_google_suspend(google, PMSG_AUTO_SUSPEND);
580
+
}
581
+
582
+
static int dwc3_google_runtime_resume(struct device *dev)
583
+
{
584
+
struct dwc3 *dwc = dev_get_drvdata(dev);
585
+
struct dwc3_google *google = to_dwc3_google(dwc);
586
+
int ret;
587
+
588
+
ret = dwc3_google_resume(google, PMSG_AUTO_RESUME);
589
+
if (ret)
590
+
return ret;
591
+
592
+
return dwc3_runtime_resume(&google->dwc);
593
+
}
594
+
595
+
static int dwc3_google_runtime_idle(struct device *dev)
596
+
{
597
+
return dwc3_runtime_idle(dev_get_drvdata(dev));
598
+
}
599
+
600
+
static const struct dev_pm_ops dwc3_google_dev_pm_ops = {
601
+
SYSTEM_SLEEP_PM_OPS(dwc3_google_pm_suspend, dwc3_google_pm_resume)
602
+
RUNTIME_PM_OPS(dwc3_google_runtime_suspend, dwc3_google_runtime_resume,
603
+
dwc3_google_runtime_idle)
604
+
.complete = pm_sleep_ptr(dwc3_google_complete),
605
+
.prepare = pm_sleep_ptr(dwc3_google_prepare),
606
+
};
607
+
608
+
static const struct of_device_id dwc3_google_of_match[] = {
609
+
{ .compatible = "google,lga-dwc3" },
610
+
{ }
611
+
};
612
+
MODULE_DEVICE_TABLE(of, dwc3_google_of_match);
613
+
614
+
static struct platform_driver dwc3_google_driver = {
615
+
.probe = dwc3_google_probe,
616
+
.remove = dwc3_google_remove,
617
+
.driver = {
618
+
.name = "dwc3-google",
619
+
.pm = pm_ptr(&dwc3_google_dev_pm_ops),
620
+
.of_match_table = dwc3_google_of_match,
621
+
},
622
+
};
623
+
624
+
module_platform_driver(dwc3_google_driver);
625
+
MODULE_LICENSE("GPL");
626
+
MODULE_DESCRIPTION("DesignWare DWC3 Google Glue Driver");
+39
-8
drivers/usb/dwc3/dwc3-imx8mp.c
+39
-8
drivers/usb/dwc3/dwc3-imx8mp.c
···
51
51
52
52
struct dwc3_imx8mp {
53
53
struct device *dev;
54
-
struct platform_device *dwc3;
54
+
struct platform_device *dwc3_pdev;
55
55
void __iomem *hsio_blk_base;
56
56
void __iomem *glue_base;
57
57
struct clk *hsio_clk;
···
100
100
static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx,
101
101
pm_message_t msg)
102
102
{
103
-
struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
103
+
struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3_pdev);
104
104
u32 val;
105
105
106
106
if (!dwc3)
···
142
142
static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx)
143
143
{
144
144
struct dwc3_imx8mp *dwc3_imx = _dwc3_imx;
145
-
struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
145
+
struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3_pdev);
146
146
147
147
if (!dwc3_imx->pm_suspended)
148
148
return IRQ_HANDLED;
···
158
158
return IRQ_HANDLED;
159
159
}
160
160
161
+
static void dwc3_imx_pre_set_role(struct dwc3 *dwc, enum usb_role role)
162
+
{
163
+
if (role == USB_ROLE_HOST)
164
+
/*
165
+
* For xhci host, we need disable dwc core auto
166
+
* suspend, because during this auto suspend delay(5s),
167
+
* xhci host RUN_STOP is cleared and wakeup is not
168
+
* enabled, if device is inserted, xhci host can't
169
+
* response the connection.
170
+
*/
171
+
pm_runtime_dont_use_autosuspend(dwc->dev);
172
+
else
173
+
pm_runtime_use_autosuspend(dwc->dev);
174
+
}
175
+
176
+
struct dwc3_glue_ops dwc3_imx_glue_ops = {
177
+
.pre_set_role = dwc3_imx_pre_set_role,
178
+
};
179
+
161
180
static int dwc3_imx8mp_probe(struct platform_device *pdev)
162
181
{
163
182
struct device *dev = &pdev->dev;
164
183
struct device_node *node = dev->of_node;
165
184
struct dwc3_imx8mp *dwc3_imx;
185
+
struct dwc3 *dwc3;
166
186
struct resource *res;
167
187
int err, irq;
168
188
···
253
233
goto remove_swnode;
254
234
}
255
235
256
-
dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np);
257
-
if (!dwc3_imx->dwc3) {
236
+
dwc3_imx->dwc3_pdev = of_find_device_by_node(dwc3_np);
237
+
if (!dwc3_imx->dwc3_pdev) {
258
238
dev_err(dev, "failed to get dwc3 platform device\n");
259
239
err = -ENODEV;
260
240
goto depopulate;
261
241
}
242
+
243
+
dwc3 = platform_get_drvdata(dwc3_imx->dwc3_pdev);
244
+
if (!dwc3) {
245
+
err = dev_err_probe(dev, -EPROBE_DEFER, "failed to get dwc3 platform data\n");
246
+
goto depopulate;
247
+
}
248
+
249
+
dwc3->glue_ops = &dwc3_imx_glue_ops;
250
+
251
+
if (dwc3->dr_mode == USB_DR_MODE_HOST)
252
+
pm_runtime_dont_use_autosuspend(dwc3->dev);
262
253
263
254
err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt,
264
255
IRQF_ONESHOT, dev_name(dev), dwc3_imx);
···
284
253
return 0;
285
254
286
255
put_dwc3:
287
-
put_device(&dwc3_imx->dwc3->dev);
256
+
put_device(&dwc3_imx->dwc3_pdev->dev);
288
257
depopulate:
289
258
of_platform_depopulate(dev);
290
259
remove_swnode:
···
301
270
struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev);
302
271
struct device *dev = &pdev->dev;
303
272
304
-
put_device(&dwc3_imx->dwc3->dev);
273
+
put_device(&dwc3_imx->dwc3_pdev->dev);
305
274
306
275
pm_runtime_get_sync(dev);
307
276
of_platform_depopulate(dev);
···
327
296
328
297
static int dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx, pm_message_t msg)
329
298
{
330
-
struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
299
+
struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3_pdev);
331
300
int ret = 0;
332
301
333
302
if (!dwc3_imx->pm_suspended)
+32
-35
drivers/usb/dwc3/dwc3-xilinx.c
+32
-35
drivers/usb/dwc3/dwc3-xilinx.c
···
132
132
goto err;
133
133
}
134
134
135
-
/*
136
-
* The following core resets are not required unless a USB3 PHY
137
-
* is used, and the subsequent register settings are not required
138
-
* unless a core reset is performed (they should be set properly
139
-
* by the first-stage boot loader, but may be reverted by a core
140
-
* reset). They may also break the configuration if USB3 is actually
141
-
* in use but the usb3-phy entry is missing from the device tree.
142
-
* Therefore, skip these operations in this case.
143
-
*/
144
-
if (!priv_data->usb3_phy) {
145
-
/* Deselect the PIPE Clock Select bit in FPD PIPE Clock register */
146
-
writel(PIPE_CLK_DESELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
147
-
goto skip_usb3_phy;
148
-
}
149
-
150
135
crst = devm_reset_control_get_exclusive(dev, "usb_crst");
151
136
if (IS_ERR(crst)) {
152
137
ret = PTR_ERR(crst);
···
156
171
goto err;
157
172
}
158
173
159
-
ret = reset_control_assert(crst);
160
-
if (ret < 0) {
161
-
dev_err(dev, "Failed to assert core reset\n");
162
-
goto err;
163
-
}
174
+
/*
175
+
* Asserting the core resets is not required unless a USB3 PHY is used.
176
+
* They may also break the configuration if USB3 is actually in use but
177
+
* the usb3-phy entry is missing from the device tree. Therefore, skip
178
+
* a full reset cycle and just deassert the resets if the phy is
179
+
* absent.
180
+
*/
181
+
if (priv_data->usb3_phy) {
182
+
ret = reset_control_assert(crst);
183
+
if (ret < 0) {
184
+
dev_err(dev, "Failed to assert core reset\n");
185
+
goto err;
186
+
}
164
187
165
-
ret = reset_control_assert(hibrst);
166
-
if (ret < 0) {
167
-
dev_err(dev, "Failed to assert hibernation reset\n");
168
-
goto err;
169
-
}
188
+
ret = reset_control_assert(hibrst);
189
+
if (ret < 0) {
190
+
dev_err(dev, "Failed to assert hibernation reset\n");
191
+
goto err;
192
+
}
170
193
171
-
ret = reset_control_assert(apbrst);
172
-
if (ret < 0) {
173
-
dev_err(dev, "Failed to assert APB reset\n");
174
-
goto err;
194
+
ret = reset_control_assert(apbrst);
195
+
if (ret < 0) {
196
+
dev_err(dev, "Failed to assert APB reset\n");
197
+
goto err;
198
+
}
175
199
}
176
200
177
201
ret = phy_init(priv_data->usb3_phy);
···
195
201
goto err;
196
202
}
197
203
198
-
/* Set PIPE Power Present signal in FPD Power Present Register*/
199
-
writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + XLNX_USB_FPD_POWER_PRSNT);
200
-
201
-
/* Set the PIPE Clock Select bit in FPD PIPE Clock register */
202
-
writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
204
+
if (priv_data->usb3_phy) {
205
+
/* Set PIPE Power Present signal in FPD Power Present Register*/
206
+
writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + XLNX_USB_FPD_POWER_PRSNT);
207
+
/* Set the PIPE Clock Select bit in FPD PIPE Clock register */
208
+
writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
209
+
} else {
210
+
/* Deselect the PIPE Clock Select bit in FPD PIPE Clock register */
211
+
writel(PIPE_CLK_DESELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
212
+
}
203
213
204
214
ret = reset_control_deassert(crst);
205
215
if (ret < 0) {
···
223
225
goto err;
224
226
}
225
227
226
-
skip_usb3_phy:
227
228
/* ulpi reset via gpio-modepin or gpio-framework driver */
228
229
reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
229
230
if (IS_ERR(reset_gpio)) {
+11
-11
drivers/usb/dwc3/ep0.c
+11
-11
drivers/usb/dwc3/ep0.c
···
361
361
362
362
if ((dwc->speed == DWC3_DSTS_SUPERSPEED) ||
363
363
(dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
364
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
364
+
reg = dwc3_readl(dwc, DWC3_DCTL);
365
365
if (reg & DWC3_DCTL_INITU1ENA)
366
366
usb_status |= 1 << USB_DEV_STAT_U1_ENABLED;
367
367
if (reg & DWC3_DCTL_INITU2ENA)
···
417
417
if (set && dwc->dis_u1_entry_quirk)
418
418
return -EINVAL;
419
419
420
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
420
+
reg = dwc3_readl(dwc, DWC3_DCTL);
421
421
if (set)
422
422
reg |= DWC3_DCTL_INITU1ENA;
423
423
else
424
424
reg &= ~DWC3_DCTL_INITU1ENA;
425
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
425
+
dwc3_writel(dwc, DWC3_DCTL, reg);
426
426
427
427
return 0;
428
428
}
···
441
441
if (set && dwc->dis_u2_entry_quirk)
442
442
return -EINVAL;
443
443
444
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
444
+
reg = dwc3_readl(dwc, DWC3_DCTL);
445
445
if (set)
446
446
reg |= DWC3_DCTL_INITU2ENA;
447
447
else
448
448
reg &= ~DWC3_DCTL_INITU2ENA;
449
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
449
+
dwc3_writel(dwc, DWC3_DCTL, reg);
450
450
451
451
return 0;
452
452
}
···
612
612
return -EINVAL;
613
613
}
614
614
615
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
615
+
reg = dwc3_readl(dwc, DWC3_DCFG);
616
616
reg &= ~(DWC3_DCFG_DEVADDR_MASK);
617
617
reg |= DWC3_DCFG_DEVADDR(addr);
618
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
618
+
dwc3_writel(dwc, DWC3_DCFG, reg);
619
619
620
620
if (addr)
621
621
usb_gadget_set_state(dwc->gadget, USB_STATE_ADDRESS);
···
672
672
* Enable transition to U1/U2 state when
673
673
* nothing is pending from application.
674
674
*/
675
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
675
+
reg = dwc3_readl(dwc, DWC3_DCTL);
676
676
if (!dwc->dis_u1_entry_quirk)
677
677
reg |= DWC3_DCTL_ACCEPTU1ENA;
678
678
if (!dwc->dis_u2_entry_quirk)
679
679
reg |= DWC3_DCTL_ACCEPTU2ENA;
680
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
680
+
dwc3_writel(dwc, DWC3_DCTL, reg);
681
681
}
682
682
break;
683
683
···
717
717
dwc->u2sel = le16_to_cpu(timing.u2sel);
718
718
dwc->u2pel = le16_to_cpu(timing.u2pel);
719
719
720
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
720
+
reg = dwc3_readl(dwc, DWC3_DCTL);
721
721
if (reg & DWC3_DCTL_INITU2ENA)
722
722
param = dwc->u2pel;
723
723
if (reg & DWC3_DCTL_INITU1ENA)
···
833
833
if (!dwc->gadget_driver || !dwc->softconnect || !dwc->connected)
834
834
goto out;
835
835
836
-
trace_dwc3_ctrl_req(ctrl);
836
+
trace_dwc3_ctrl_req(dwc, ctrl);
837
837
838
838
len = le16_to_cpu(ctrl->wLength);
839
839
if (!len) {
+85
-87
drivers/usb/dwc3/gadget.c
+85
-87
drivers/usb/dwc3/gadget.c
···
42
42
{
43
43
u32 reg;
44
44
45
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
45
+
reg = dwc3_readl(dwc, DWC3_DCTL);
46
46
reg &= ~DWC3_DCTL_TSTCTRL_MASK;
47
47
48
48
switch (mode) {
···
73
73
{
74
74
u32 reg;
75
75
76
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
76
+
reg = dwc3_readl(dwc, DWC3_DSTS);
77
77
78
78
return DWC3_DSTS_USBLNKST(reg);
79
79
}
···
97
97
*/
98
98
if (!DWC3_VER_IS_PRIOR(DWC3, 194A)) {
99
99
while (--retries) {
100
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
100
+
reg = dwc3_readl(dwc, DWC3_DSTS);
101
101
if (reg & DWC3_DSTS_DCNRD)
102
102
udelay(5);
103
103
else
···
108
108
return -ETIMEDOUT;
109
109
}
110
110
111
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
111
+
reg = dwc3_readl(dwc, DWC3_DCTL);
112
112
reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
113
113
114
114
/* set no action before sending new link state change */
115
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
115
+
dwc3_writel(dwc, DWC3_DCTL, reg);
116
116
117
117
/* set requested state */
118
118
reg |= DWC3_DCTL_ULSTCHNGREQ(state);
119
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
119
+
dwc3_writel(dwc, DWC3_DCTL, reg);
120
120
121
121
/*
122
122
* The following code is racy when called from dwc3_gadget_wakeup,
···
128
128
/* wait for a change in DSTS */
129
129
retries = 10000;
130
130
while (--retries) {
131
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
131
+
reg = dwc3_readl(dwc, DWC3_DSTS);
132
132
133
133
if (DWC3_DSTS_USBLNKST(reg) == state)
134
134
return 0;
···
260
260
int ret = 0;
261
261
u32 reg;
262
262
263
-
dwc3_writel(dwc->regs, DWC3_DGCMDPAR, param);
264
-
dwc3_writel(dwc->regs, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
263
+
dwc3_writel(dwc, DWC3_DGCMDPAR, param);
264
+
dwc3_writel(dwc, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
265
265
266
266
do {
267
-
reg = dwc3_readl(dwc->regs, DWC3_DGCMD);
267
+
reg = dwc3_readl(dwc, DWC3_DGCMD);
268
268
if (!(reg & DWC3_DGCMD_CMDACT)) {
269
269
status = DWC3_DGCMD_STATUS(reg);
270
270
if (status)
···
278
278
status = -ETIMEDOUT;
279
279
}
280
280
281
-
trace_dwc3_gadget_generic_cmd(cmd, param, status);
281
+
trace_dwc3_gadget_generic_cmd(dwc, cmd, param, status);
282
282
283
283
return ret;
284
284
}
···
320
320
321
321
int cmd_status = 0;
322
322
int ret = -EINVAL;
323
+
u8 epnum = dep->number;
323
324
324
325
/*
325
326
* When operating in USB 2.0 speeds (HS/FS), if GUSB2PHYCFG.ENBLSLPM or
···
334
333
*/
335
334
if (dwc->gadget->speed <= USB_SPEED_HIGH ||
336
335
DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_ENDTRANSFER) {
337
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
336
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
338
337
if (unlikely(reg & DWC3_GUSB2PHYCFG_SUSPHY)) {
339
338
saved_config |= DWC3_GUSB2PHYCFG_SUSPHY;
340
339
reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
···
346
345
}
347
346
348
347
if (saved_config)
349
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
348
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
350
349
}
351
350
352
351
/*
···
356
355
* improve performance.
357
356
*/
358
357
if (DWC3_DEPCMD_CMD(cmd) != DWC3_DEPCMD_UPDATETRANSFER) {
359
-
dwc3_writel(dep->regs, DWC3_DEPCMDPAR0, params->param0);
360
-
dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1);
361
-
dwc3_writel(dep->regs, DWC3_DEPCMDPAR2, params->param2);
358
+
dwc3_writel(dwc, DWC3_DEPCMDPAR0(epnum), params->param0);
359
+
dwc3_writel(dwc, DWC3_DEPCMDPAR1(epnum), params->param1);
360
+
dwc3_writel(dwc, DWC3_DEPCMDPAR2(epnum), params->param2);
362
361
}
363
362
364
363
/*
···
382
381
else
383
382
cmd |= DWC3_DEPCMD_CMDACT;
384
383
385
-
dwc3_writel(dep->regs, DWC3_DEPCMD, cmd);
384
+
dwc3_writel(dwc, DWC3_DEPCMD(epnum), cmd);
386
385
387
386
if (!(cmd & DWC3_DEPCMD_CMDACT) ||
388
387
(DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_ENDTRANSFER &&
···
392
391
}
393
392
394
393
do {
395
-
reg = dwc3_readl(dep->regs, DWC3_DEPCMD);
394
+
reg = dwc3_readl(dwc, DWC3_DEPCMD(epnum));
396
395
if (!(reg & DWC3_DEPCMD_CMDACT)) {
397
396
cmd_status = DWC3_DEPCMD_STATUS(reg);
398
397
···
448
447
mdelay(1);
449
448
450
449
if (saved_config) {
451
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
450
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
452
451
reg |= saved_config;
453
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
452
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
454
453
}
455
454
456
455
return ret;
···
727
726
u32 reg;
728
727
729
728
/* Check if TXFIFOs start at non-zero addr */
730
-
reg = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(0));
729
+
reg = dwc3_readl(dwc, DWC3_GTXFIFOSIZ(0));
731
730
fifo_0_start = DWC3_GTXFIFOSIZ_TXFSTADDR(reg);
732
731
733
732
ram_depth -= (fifo_0_start >> 16);
···
755
754
756
755
/* Read ep0IN related TXFIFO size */
757
756
dep = dwc->eps[1];
758
-
size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(0));
757
+
size = dwc3_readl(dwc, DWC3_GTXFIFOSIZ(0));
759
758
if (DWC3_IP_IS(DWC3))
760
759
fifo_depth = DWC3_GTXFIFOSIZ_TXFDEP(size);
761
760
else
···
770
769
771
770
/* Don't change TXFRAMNUM on usb31 version */
772
771
size = DWC3_IP_IS(DWC3) ? 0 :
773
-
dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(num >> 1)) &
772
+
dwc3_readl(dwc, DWC3_GTXFIFOSIZ(num >> 1)) &
774
773
DWC31_GTXFIFOSIZ_TXFRAMNUM;
775
774
776
-
dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num >> 1), size);
775
+
dwc3_writel(dwc, DWC3_GTXFIFOSIZ(num >> 1), size);
777
776
dep->flags &= ~DWC3_EP_TXFIFO_RESIZED;
778
777
}
779
778
dwc->num_ep_resized = 0;
···
876
875
fifo_size++;
877
876
878
877
/* Check if TXFIFOs start at non-zero addr */
879
-
tmp = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(0));
878
+
tmp = dwc3_readl(dwc, DWC3_GTXFIFOSIZ(0));
880
879
fifo_0_start = DWC3_GTXFIFOSIZ_TXFSTADDR(tmp);
881
880
882
881
fifo_size |= (fifo_0_start + (dwc->last_fifo_depth << 16));
···
899
898
return -ENOMEM;
900
899
}
901
900
902
-
dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(dep->number >> 1), fifo_size);
901
+
dwc3_writel(dwc, DWC3_GTXFIFOSIZ(dep->number >> 1), fifo_size);
903
902
dep->flags |= DWC3_EP_TXFIFO_RESIZED;
904
903
dwc->num_ep_resized++;
905
904
···
943
942
dep->type = usb_endpoint_type(desc);
944
943
dep->flags |= DWC3_EP_ENABLED;
945
944
946
-
reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
945
+
reg = dwc3_readl(dwc, DWC3_DALEPENA);
947
946
reg |= DWC3_DALEPENA_EP(dep->number);
948
-
dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
947
+
dwc3_writel(dwc, DWC3_DALEPENA, reg);
949
948
950
949
dep->trb_dequeue = 0;
951
950
dep->trb_enqueue = 0;
···
1080
1079
if (dep->flags & DWC3_EP_STALL)
1081
1080
__dwc3_gadget_ep_set_halt(dep, 0, false);
1082
1081
1083
-
reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
1082
+
reg = dwc3_readl(dwc, DWC3_DALEPENA);
1084
1083
reg &= ~DWC3_DALEPENA_EP(dep->number);
1085
-
dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
1084
+
dwc3_writel(dwc, DWC3_DALEPENA, reg);
1086
1085
1087
1086
dwc3_remove_requests(dwc, dep, -ESHUTDOWN);
1088
1087
···
1743
1742
{
1744
1743
u32 reg;
1745
1744
1746
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1745
+
reg = dwc3_readl(dwc, DWC3_DSTS);
1747
1746
return DWC3_DSTS_SOFFN(reg);
1748
1747
}
1749
1748
···
2351
2350
if (DWC3_VER_IS_PRIOR(DWC3, 250A))
2352
2351
return;
2353
2352
2354
-
reg = dwc3_readl(dwc->regs, DWC3_DEVTEN);
2353
+
reg = dwc3_readl(dwc, DWC3_DEVTEN);
2355
2354
if (set)
2356
2355
reg |= DWC3_DEVTEN_ULSTCNGEN;
2357
2356
else
2358
2357
reg &= ~DWC3_DEVTEN_ULSTCNGEN;
2359
2358
2360
-
dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
2359
+
dwc3_writel(dwc, DWC3_DEVTEN, reg);
2361
2360
}
2362
2361
2363
2362
static int dwc3_gadget_get_frame(struct usb_gadget *g)
···
2380
2379
*
2381
2380
* We can check that via USB Link State bits in DSTS register.
2382
2381
*/
2383
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
2382
+
reg = dwc3_readl(dwc, DWC3_DSTS);
2384
2383
2385
2384
link_state = DWC3_DSTS_USBLNKST(reg);
2386
2385
···
2408
2407
/* Recent versions do this automatically */
2409
2408
if (DWC3_VER_IS_PRIOR(DWC3, 194A)) {
2410
2409
/* write zeroes to Link Change Request */
2411
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2410
+
reg = dwc3_readl(dwc, DWC3_DCTL);
2412
2411
reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
2413
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2412
+
dwc3_writel(dwc, DWC3_DCTL, reg);
2414
2413
}
2415
2414
2416
2415
/*
···
2530
2529
if (ssp_rate == USB_SSP_GEN_UNKNOWN)
2531
2530
ssp_rate = dwc->max_ssp_rate;
2532
2531
2533
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2532
+
reg = dwc3_readl(dwc, DWC3_DCFG);
2534
2533
reg &= ~DWC3_DCFG_SPEED_MASK;
2535
2534
reg &= ~DWC3_DCFG_NUMLANES(~0);
2536
2535
···
2543
2542
dwc->max_ssp_rate != USB_SSP_GEN_2x1)
2544
2543
reg |= DWC3_DCFG_NUMLANES(1);
2545
2544
2546
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2545
+
dwc3_writel(dwc, DWC3_DCFG, reg);
2547
2546
}
2548
2547
2549
2548
static void __dwc3_gadget_set_speed(struct dwc3 *dwc)
···
2561
2560
return;
2562
2561
}
2563
2562
2564
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2563
+
reg = dwc3_readl(dwc, DWC3_DCFG);
2565
2564
reg &= ~(DWC3_DCFG_SPEED_MASK);
2566
2565
2567
2566
/*
···
2612
2611
speed < USB_SPEED_SUPER_PLUS)
2613
2612
reg &= ~DWC3_DCFG_NUMLANES(~0);
2614
2613
2615
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2614
+
dwc3_writel(dwc, DWC3_DCFG, reg);
2616
2615
}
2617
2616
2618
2617
static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on)
···
2637
2636
* mentioned in the dwc3 programming guide. It has been tested on an
2638
2637
* Exynos platforms.
2639
2638
*/
2640
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
2639
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
2641
2640
if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
2642
2641
saved_config |= DWC3_GUSB2PHYCFG_SUSPHY;
2643
2642
reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
···
2649
2648
}
2650
2649
2651
2650
if (saved_config)
2652
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
2651
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
2653
2652
2654
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2653
+
reg = dwc3_readl(dwc, DWC3_DCTL);
2655
2654
if (is_on) {
2656
2655
if (DWC3_VER_IS_WITHIN(DWC3, ANY, 187A)) {
2657
2656
reg &= ~DWC3_DCTL_TRGTULST_MASK;
···
2675
2674
2676
2675
do {
2677
2676
usleep_range(1000, 2000);
2678
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
2677
+
reg = dwc3_readl(dwc, DWC3_DSTS);
2679
2678
reg &= DWC3_DSTS_DEVCTRLHLT;
2680
2679
} while (--timeout && !(!is_on ^ !reg));
2681
2680
2682
2681
if (saved_config) {
2683
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
2682
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
2684
2683
reg |= saved_config;
2685
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
2684
+
dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
2686
2685
}
2687
2686
2688
2687
if (!timeout)
···
2858
2857
if (!DWC3_VER_IS_PRIOR(DWC3, 230A))
2859
2858
reg |= DWC3_DEVTEN_U3L2L1SUSPEN;
2860
2859
2861
-
dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
2860
+
dwc3_writel(dwc, DWC3_DEVTEN, reg);
2862
2861
}
2863
2862
2864
2863
static void dwc3_gadget_disable_irq(struct dwc3 *dwc)
2865
2864
{
2866
2865
/* mask all interrupts */
2867
-
dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
2866
+
dwc3_writel(dwc, DWC3_DEVTEN, 0x00);
2868
2867
}
2869
2868
2870
2869
static irqreturn_t dwc3_interrupt(int irq, void *_dwc);
···
2905
2904
nump = min_t(u32, nump, 16);
2906
2905
2907
2906
/* update NumP */
2908
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2907
+
reg = dwc3_readl(dwc, DWC3_DCFG);
2909
2908
reg &= ~DWC3_DCFG_NUMP_MASK;
2910
2909
reg |= nump << DWC3_DCFG_NUMP_SHIFT;
2911
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2910
+
dwc3_writel(dwc, DWC3_DCFG, reg);
2912
2911
}
2913
2912
2914
2913
static int __dwc3_gadget_start(struct dwc3 *dwc)
···
2922
2921
* the core supports IMOD, disable it.
2923
2922
*/
2924
2923
if (dwc->imod_interval) {
2925
-
dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), dwc->imod_interval);
2926
-
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), DWC3_GEVNTCOUNT_EHB);
2924
+
dwc3_writel(dwc, DWC3_DEV_IMOD(0), dwc->imod_interval);
2925
+
dwc3_writel(dwc, DWC3_GEVNTCOUNT(0), DWC3_GEVNTCOUNT_EHB);
2927
2926
} else if (dwc3_has_imod(dwc)) {
2928
-
dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), 0);
2927
+
dwc3_writel(dwc, DWC3_DEV_IMOD(0), 0);
2929
2928
}
2930
2929
2931
2930
/*
···
2935
2934
* This way, we maximize the chances that we'll be able to get several
2936
2935
* bursts of data without going through any sort of endpoint throttling.
2937
2936
*/
2938
-
reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
2937
+
reg = dwc3_readl(dwc, DWC3_GRXTHRCFG);
2939
2938
if (DWC3_IP_IS(DWC3))
2940
2939
reg &= ~DWC3_GRXTHRCFG_PKTCNTSEL;
2941
2940
else
2942
2941
reg &= ~DWC31_GRXTHRCFG_PKTCNTSEL;
2943
2942
2944
-
dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
2943
+
dwc3_writel(dwc, DWC3_GRXTHRCFG, reg);
2945
2944
2946
2945
dwc3_gadget_setup_nump(dwc);
2947
2946
···
2952
2951
* ACK with NumP=0 and PP=0 (for IN direction). This slightly improves
2953
2952
* the stream performance.
2954
2953
*/
2955
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2954
+
reg = dwc3_readl(dwc, DWC3_DCFG);
2956
2955
reg |= DWC3_DCFG_IGNSTRMPP;
2957
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2956
+
dwc3_writel(dwc, DWC3_DCFG, reg);
2958
2957
2959
2958
/* Enable MST by default if the device is capable of MST */
2960
2959
if (DWC3_MST_CAPABLE(&dwc->hwparams)) {
2961
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG1);
2960
+
reg = dwc3_readl(dwc, DWC3_DCFG1);
2962
2961
reg &= ~DWC3_DCFG1_DIS_MST_ENH;
2963
-
dwc3_writel(dwc->regs, DWC3_DCFG1, reg);
2962
+
dwc3_writel(dwc, DWC3_DCFG1, reg);
2964
2963
}
2965
2964
2966
2965
/* Start with SuperSpeed Default */
···
3124
3123
static int dwc3_gadget_vbus_draw(struct usb_gadget *g, unsigned int mA)
3125
3124
{
3126
3125
struct dwc3 *dwc = gadget_to_dwc(g);
3127
-
union power_supply_propval val = {0};
3128
-
int ret;
3129
3126
3130
3127
if (dwc->usb2_phy)
3131
3128
return usb_phy_set_power(dwc->usb2_phy, mA);
···
3131
3132
if (!dwc->usb_psy)
3132
3133
return -EOPNOTSUPP;
3133
3134
3134
-
val.intval = 1000 * mA;
3135
-
ret = power_supply_set_property(dwc->usb_psy, POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, &val);
3135
+
dwc->current_limit = mA;
3136
+
schedule_work(&dwc->vbus_draw_work);
3136
3137
3137
-
return ret;
3138
+
return 0;
3138
3139
}
3139
3140
3140
3141
/**
···
3238
3239
/* MDWIDTH is represented in bits, we need it in bytes */
3239
3240
mdwidth /= 8;
3240
3241
3241
-
size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(dep->number >> 1));
3242
+
size = dwc3_readl(dwc, DWC3_GTXFIFOSIZ(dep->number >> 1));
3242
3243
if (DWC3_IP_IS(DWC3))
3243
3244
size = DWC3_GTXFIFOSIZ_TXFDEP(size);
3244
3245
else
···
3287
3288
mdwidth /= 8;
3288
3289
3289
3290
/* All OUT endpoints share a single RxFIFO space */
3290
-
size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0));
3291
+
size = dwc3_readl(dwc, DWC3_GRXFIFOSIZ(0));
3291
3292
if (DWC3_IP_IS(DWC3))
3292
3293
size = DWC3_GRXFIFOSIZ_RXFDEP(size);
3293
3294
else
···
3380
3381
dep->dwc = dwc;
3381
3382
dep->number = epnum;
3382
3383
dep->direction = direction;
3383
-
dep->regs = dwc->regs + DWC3_DEP_BASE(epnum);
3384
3384
dwc->eps[epnum] = dep;
3385
3385
dep->combo_num = 0;
3386
3386
dep->start_cmd_status = 0;
···
3740
3742
return no_started_trb;
3741
3743
}
3742
3744
3743
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
3745
+
reg = dwc3_readl(dwc, DWC3_DCTL);
3744
3746
reg |= dwc->u1u2;
3745
-
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
3747
+
dwc3_writel(dwc, DWC3_DCTL, reg);
3746
3748
3747
3749
dwc->u1u2 = 0;
3748
3750
}
···
4072
4074
4073
4075
dwc3_gadget_set_link_state(dwc, DWC3_LINK_STATE_RX_DET);
4074
4076
4075
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
4077
+
reg = dwc3_readl(dwc, DWC3_DCTL);
4076
4078
reg &= ~DWC3_DCTL_INITU1ENA;
4077
4079
reg &= ~DWC3_DCTL_INITU2ENA;
4078
4080
dwc3_gadget_dctl_write_safe(dwc, reg);
···
4161
4163
dwc3_stop_active_transfers(dwc);
4162
4164
dwc->connected = true;
4163
4165
4164
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
4166
+
reg = dwc3_readl(dwc, DWC3_DCTL);
4165
4167
reg &= ~DWC3_DCTL_TSTCTRL_MASK;
4166
4168
dwc3_gadget_dctl_write_safe(dwc, reg);
4167
4169
dwc->test_mode = false;
···
4170
4172
dwc3_clear_stall_all_ep(dwc);
4171
4173
4172
4174
/* Reset device address to zero */
4173
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
4175
+
reg = dwc3_readl(dwc, DWC3_DCFG);
4174
4176
reg &= ~(DWC3_DCFG_DEVADDR_MASK);
4175
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
4177
+
dwc3_writel(dwc, DWC3_DCFG, reg);
4176
4178
}
4177
4179
4178
4180
static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
···
4186
4188
if (!dwc->softconnect)
4187
4189
return;
4188
4190
4189
-
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
4191
+
reg = dwc3_readl(dwc, DWC3_DSTS);
4190
4192
speed = reg & DWC3_DSTS_CONNECTSPD;
4191
4193
dwc->speed = speed;
4192
4194
···
4261
4263
!dwc->usb2_gadget_lpm_disable &&
4262
4264
(speed != DWC3_DSTS_SUPERSPEED) &&
4263
4265
(speed != DWC3_DSTS_SUPERSPEED_PLUS)) {
4264
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
4266
+
reg = dwc3_readl(dwc, DWC3_DCFG);
4265
4267
reg |= DWC3_DCFG_LPM_CAP;
4266
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
4268
+
dwc3_writel(dwc, DWC3_DCFG, reg);
4267
4269
4268
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
4270
+
reg = dwc3_readl(dwc, DWC3_DCTL);
4269
4271
reg &= ~(DWC3_DCTL_HIRD_THRES_MASK | DWC3_DCTL_L1_HIBER_EN);
4270
4272
4271
4273
reg |= DWC3_DCTL_HIRD_THRES(dwc->hird_threshold |
···
4288
4290
dwc3_gadget_dctl_write_safe(dwc, reg);
4289
4291
} else {
4290
4292
if (dwc->usb2_gadget_lpm_disable) {
4291
-
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
4293
+
reg = dwc3_readl(dwc, DWC3_DCFG);
4292
4294
reg &= ~DWC3_DCFG_LPM_CAP;
4293
-
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
4295
+
dwc3_writel(dwc, DWC3_DCFG, reg);
4294
4296
}
4295
4297
4296
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
4298
+
reg = dwc3_readl(dwc, DWC3_DCTL);
4297
4299
reg &= ~DWC3_DCTL_HIRD_THRES_MASK;
4298
4300
dwc3_gadget_dctl_write_safe(dwc, reg);
4299
4301
}
···
4399
4401
switch (dwc->link_state) {
4400
4402
case DWC3_LINK_STATE_U1:
4401
4403
case DWC3_LINK_STATE_U2:
4402
-
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
4404
+
reg = dwc3_readl(dwc, DWC3_DCTL);
4403
4405
u1u2 = reg & (DWC3_DCTL_INITU2ENA
4404
4406
| DWC3_DCTL_ACCEPTU2ENA
4405
4407
| DWC3_DCTL_INITU1ENA
···
4556
4558
ret = IRQ_HANDLED;
4557
4559
4558
4560
/* Unmask interrupt */
4559
-
dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0),
4561
+
dwc3_writel(dwc, DWC3_GEVNTSIZ(0),
4560
4562
DWC3_GEVNTSIZ_SIZE(evt->length));
4561
4563
4562
4564
evt->flags &= ~DWC3_EVENT_PENDING;
···
4567
4569
wmb();
4568
4570
4569
4571
if (dwc->imod_interval) {
4570
-
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), DWC3_GEVNTCOUNT_EHB);
4571
-
dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), dwc->imod_interval);
4572
+
dwc3_writel(dwc, DWC3_GEVNTCOUNT(0), DWC3_GEVNTCOUNT_EHB);
4573
+
dwc3_writel(dwc, DWC3_DEV_IMOD(0), dwc->imod_interval);
4572
4574
}
4573
4575
4574
4576
return ret;
···
4617
4619
if (evt->flags & DWC3_EVENT_PENDING)
4618
4620
return IRQ_HANDLED;
4619
4621
4620
-
count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
4622
+
count = dwc3_readl(dwc, DWC3_GEVNTCOUNT(0));
4621
4623
count &= DWC3_GEVNTCOUNT_MASK;
4622
4624
if (!count)
4623
4625
return IRQ_NONE;
···
4632
4634
evt->flags |= DWC3_EVENT_PENDING;
4633
4635
4634
4636
/* Mask interrupt */
4635
-
dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0),
4637
+
dwc3_writel(dwc, DWC3_GEVNTSIZ(0),
4636
4638
DWC3_GEVNTSIZ_INTMASK | DWC3_GEVNTSIZ_SIZE(evt->length));
4637
4639
4638
4640
amount = min(count, evt->length - evt->lpos);
···
4641
4643
if (amount < count)
4642
4644
memcpy(evt->cache, evt->buf, count - amount);
4643
4645
4644
-
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), count);
4646
+
dwc3_writel(dwc, DWC3_GEVNTCOUNT(0), count);
4645
4647
4646
4648
return IRQ_WAKE_THREAD;
4647
4649
}
+2
-2
drivers/usb/dwc3/gadget.h
+2
-2
drivers/usb/dwc3/gadget.h
···
132
132
{
133
133
u32 res_id;
134
134
135
-
res_id = dwc3_readl(dep->regs, DWC3_DEPCMD);
135
+
res_id = dwc3_readl(dep->dwc, DWC3_DEPCMD(dep->number));
136
136
dep->resource_index = DWC3_DEPCMD_GET_RSC_IDX(res_id);
137
137
}
138
138
···
147
147
static inline void dwc3_gadget_dctl_write_safe(struct dwc3 *dwc, u32 value)
148
148
{
149
149
value &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
150
-
dwc3_writel(dwc->regs, DWC3_DCTL, value);
150
+
dwc3_writel(dwc, DWC3_DCTL, value);
151
151
}
152
152
153
153
#endif /* __DRIVERS_USB_DWC3_GADGET_H */
+7
-4
drivers/usb/dwc3/io.h
+7
-4
drivers/usb/dwc3/io.h
···
16
16
#include "debug.h"
17
17
#include "core.h"
18
18
19
-
static inline u32 dwc3_readl(void __iomem *base, u32 offset)
19
+
static inline u32 dwc3_readl(struct dwc3 *dwc, u32 offset)
20
20
{
21
21
u32 value;
22
+
void __iomem *base = dwc->regs;
22
23
23
24
/*
24
25
* We requested the mem region starting from the Globals address
···
33
32
* documentation, so we revert it back to the proper addresses, the
34
33
* same way they are described on SNPS documentation
35
34
*/
36
-
trace_dwc3_readl(base - DWC3_GLOBALS_REGS_START, offset, value);
35
+
trace_dwc3_readl(dwc, base - DWC3_GLOBALS_REGS_START, offset, value);
37
36
38
37
return value;
39
38
}
40
39
41
-
static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
40
+
static inline void dwc3_writel(struct dwc3 *dwc, u32 offset, u32 value)
42
41
{
42
+
void __iomem *base = dwc->regs;
43
+
43
44
/*
44
45
* We requested the mem region starting from the Globals address
45
46
* space, see dwc3_probe in core.c.
···
54
51
* documentation, so we revert it back to the proper addresses, the
55
52
* same way they are described on SNPS documentation
56
53
*/
57
-
trace_dwc3_writel(base - DWC3_GLOBALS_REGS_START, offset, value);
54
+
trace_dwc3_writel(dwc, base - DWC3_GLOBALS_REGS_START, offset, value);
58
55
}
59
56
60
57
#endif /* __DRIVERS_USB_DWC3_IO_H */
+55
-33
drivers/usb/dwc3/trace.h
+55
-33
drivers/usb/dwc3/trace.h
···
20
20
#include "debug.h"
21
21
22
22
DECLARE_EVENT_CLASS(dwc3_log_set_prtcap,
23
-
TP_PROTO(u32 mode),
24
-
TP_ARGS(mode),
23
+
TP_PROTO(struct dwc3 *dwc, u32 mode),
24
+
TP_ARGS(dwc, mode),
25
25
TP_STRUCT__entry(
26
+
__field(phys_addr_t, base_address)
26
27
__field(u32, mode)
27
28
),
28
29
TP_fast_assign(
30
+
__entry->base_address = dwc->xhci_resources[0].start;
29
31
__entry->mode = mode;
30
32
),
31
-
TP_printk("mode %s", dwc3_mode_string(__entry->mode))
33
+
TP_printk("%pa: mode %s", &__entry->base_address, dwc3_mode_string(__entry->mode))
32
34
);
33
35
34
36
DEFINE_EVENT(dwc3_log_set_prtcap, dwc3_set_prtcap,
35
-
TP_PROTO(u32 mode),
36
-
TP_ARGS(mode)
37
+
TP_PROTO(struct dwc3 *dwc, u32 mode),
38
+
TP_ARGS(dwc, mode)
37
39
);
38
40
39
41
DECLARE_EVENT_CLASS(dwc3_log_io,
40
-
TP_PROTO(void *base, u32 offset, u32 value),
41
-
TP_ARGS(base, offset, value),
42
+
TP_PROTO(struct dwc3 *dwc, void *base, u32 offset, u32 value),
43
+
TP_ARGS(dwc, base, offset, value),
42
44
TP_STRUCT__entry(
45
+
__field(phys_addr_t, base_address)
43
46
__field(void *, base)
44
47
__field(u32, offset)
45
48
__field(u32, value)
46
49
),
47
50
TP_fast_assign(
51
+
__entry->base_address = dwc->xhci_resources[0].start;
48
52
__entry->base = base;
49
53
__entry->offset = offset;
50
54
__entry->value = value;
51
55
),
52
-
TP_printk("addr %p offset %04x value %08x",
56
+
TP_printk("%pa: addr %p offset %04x value %08x",
57
+
&__entry->base_address,
53
58
__entry->base + __entry->offset,
54
59
__entry->offset,
55
60
__entry->value)
56
61
);
57
62
58
63
DEFINE_EVENT(dwc3_log_io, dwc3_readl,
59
-
TP_PROTO(void __iomem *base, u32 offset, u32 value),
60
-
TP_ARGS(base, offset, value)
64
+
TP_PROTO(struct dwc3 *dwc, void __iomem *base, u32 offset, u32 value),
65
+
TP_ARGS(dwc, base, offset, value)
61
66
);
62
67
63
68
DEFINE_EVENT(dwc3_log_io, dwc3_writel,
64
-
TP_PROTO(void __iomem *base, u32 offset, u32 value),
65
-
TP_ARGS(base, offset, value)
69
+
TP_PROTO(struct dwc3 *dwc, void __iomem *base, u32 offset, u32 value),
70
+
TP_ARGS(dwc, base, offset, value)
66
71
);
67
72
68
73
DECLARE_EVENT_CLASS(dwc3_log_event,
69
74
TP_PROTO(u32 event, struct dwc3 *dwc),
70
75
TP_ARGS(event, dwc),
71
76
TP_STRUCT__entry(
77
+
__field(phys_addr_t, base_address)
72
78
__field(u32, event)
73
79
__field(u32, ep0state)
74
80
),
75
81
TP_fast_assign(
82
+
__entry->base_address = dwc->xhci_resources[0].start;
76
83
__entry->event = event;
77
84
__entry->ep0state = dwc->ep0state;
78
85
),
79
-
TP_printk("event (%08x): %s", __entry->event,
86
+
TP_printk("%pa: event (%08x): %s", &__entry->base_address, __entry->event,
80
87
dwc3_decode_event(__get_buf(DWC3_MSG_MAX), DWC3_MSG_MAX,
81
88
__entry->event, __entry->ep0state))
82
89
);
···
94
87
);
95
88
96
89
DECLARE_EVENT_CLASS(dwc3_log_ctrl,
97
-
TP_PROTO(struct usb_ctrlrequest *ctrl),
98
-
TP_ARGS(ctrl),
90
+
TP_PROTO(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl),
91
+
TP_ARGS(dwc, ctrl),
99
92
TP_STRUCT__entry(
93
+
__field(phys_addr_t, base_address)
100
94
__field(__u8, bRequestType)
101
95
__field(__u8, bRequest)
102
96
__field(__u16, wValue)
···
105
97
__field(__u16, wLength)
106
98
),
107
99
TP_fast_assign(
100
+
__entry->base_address = dwc->xhci_resources[0].start;
108
101
__entry->bRequestType = ctrl->bRequestType;
109
102
__entry->bRequest = ctrl->bRequest;
110
103
__entry->wValue = le16_to_cpu(ctrl->wValue);
111
104
__entry->wIndex = le16_to_cpu(ctrl->wIndex);
112
105
__entry->wLength = le16_to_cpu(ctrl->wLength);
113
106
),
114
-
TP_printk("%s", usb_decode_ctrl(__get_buf(DWC3_MSG_MAX), DWC3_MSG_MAX,
107
+
TP_printk("%pa: %s", &__entry->base_address, usb_decode_ctrl(__get_buf(DWC3_MSG_MAX),
108
+
DWC3_MSG_MAX,
115
109
__entry->bRequestType,
116
110
__entry->bRequest, __entry->wValue,
117
111
__entry->wIndex, __entry->wLength)
···
121
111
);
122
112
123
113
DEFINE_EVENT(dwc3_log_ctrl, dwc3_ctrl_req,
124
-
TP_PROTO(struct usb_ctrlrequest *ctrl),
125
-
TP_ARGS(ctrl)
114
+
TP_PROTO(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl),
115
+
TP_ARGS(dwc, ctrl)
126
116
);
127
117
128
118
DECLARE_EVENT_CLASS(dwc3_log_request,
129
119
TP_PROTO(struct dwc3_request *req),
130
120
TP_ARGS(req),
131
121
TP_STRUCT__entry(
122
+
__field(phys_addr_t, base_address)
132
123
__string(name, req->dep->name)
133
124
__field(struct dwc3_request *, req)
134
125
__field(unsigned int, actual)
···
140
129
__field(int, no_interrupt)
141
130
),
142
131
TP_fast_assign(
143
-
__assign_str(name);
132
+
__entry->base_address = req->dep->dwc->xhci_resources[0].start;
144
133
__entry->req = req;
145
134
__entry->actual = req->request.actual;
146
135
__entry->length = req->request.length;
···
149
138
__entry->short_not_ok = req->request.short_not_ok;
150
139
__entry->no_interrupt = req->request.no_interrupt;
151
140
),
152
-
TP_printk("%s: req %p length %u/%u %s%s%s ==> %d",
153
-
__get_str(name), __entry->req, __entry->actual, __entry->length,
141
+
TP_printk("%pa: %s: req %p length %u/%u %s%s%s ==> %d",
142
+
&__entry->base_address,
143
+
__get_str(name), __entry->req,
144
+
__entry->actual, __entry->length,
154
145
__entry->zero ? "Z" : "z",
155
146
__entry->short_not_ok ? "S" : "s",
156
147
__entry->no_interrupt ? "i" : "I",
···
186
173
);
187
174
188
175
DECLARE_EVENT_CLASS(dwc3_log_generic_cmd,
189
-
TP_PROTO(unsigned int cmd, u32 param, int status),
190
-
TP_ARGS(cmd, param, status),
176
+
TP_PROTO(struct dwc3 *dwc, unsigned int cmd, u32 param, int status),
177
+
TP_ARGS(dwc, cmd, param, status),
191
178
TP_STRUCT__entry(
179
+
__field(phys_addr_t, base_address)
192
180
__field(unsigned int, cmd)
193
181
__field(u32, param)
194
182
__field(int, status)
195
183
),
196
184
TP_fast_assign(
185
+
__entry->base_address = dwc->xhci_resources[0].start;
197
186
__entry->cmd = cmd;
198
187
__entry->param = param;
199
188
__entry->status = status;
200
189
),
201
-
TP_printk("cmd '%s' [%x] param %08x --> status: %s",
202
-
dwc3_gadget_generic_cmd_string(__entry->cmd),
190
+
TP_printk("%pa: cmd '%s' [%x] param %08x --> status: %s",
191
+
&__entry->base_address, dwc3_gadget_generic_cmd_string(__entry->cmd),
203
192
__entry->cmd, __entry->param,
204
193
dwc3_gadget_generic_cmd_status_string(__entry->status)
205
194
)
206
195
);
207
196
208
197
DEFINE_EVENT(dwc3_log_generic_cmd, dwc3_gadget_generic_cmd,
209
-
TP_PROTO(unsigned int cmd, u32 param, int status),
210
-
TP_ARGS(cmd, param, status)
198
+
TP_PROTO(struct dwc3 *dwc, unsigned int cmd, u32 param, int status),
199
+
TP_ARGS(dwc, cmd, param, status)
211
200
);
212
201
213
202
DECLARE_EVENT_CLASS(dwc3_log_gadget_ep_cmd,
···
217
202
struct dwc3_gadget_ep_cmd_params *params, int cmd_status),
218
203
TP_ARGS(dep, cmd, params, cmd_status),
219
204
TP_STRUCT__entry(
205
+
__field(phys_addr_t, base_address)
220
206
__string(name, dep->name)
221
207
__field(unsigned int, cmd)
222
208
__field(u32, param0)
···
226
210
__field(int, cmd_status)
227
211
),
228
212
TP_fast_assign(
213
+
__entry->base_address = dep->dwc->xhci_resources[0].start;
229
214
__assign_str(name);
230
215
__entry->cmd = cmd;
231
216
__entry->param0 = params->param0;
···
234
217
__entry->param2 = params->param2;
235
218
__entry->cmd_status = cmd_status;
236
219
),
237
-
TP_printk("%s: cmd '%s' [%x] params %08x %08x %08x --> status: %s",
238
-
__get_str(name), dwc3_gadget_ep_cmd_string(__entry->cmd),
220
+
TP_printk("%pa: %s: cmd '%s' [%x] params %08x %08x %08x --> status: %s",
221
+
&__entry->base_address, __get_str(name),
222
+
dwc3_gadget_ep_cmd_string(__entry->cmd),
239
223
__entry->cmd, __entry->param0,
240
224
__entry->param1, __entry->param2,
241
225
dwc3_ep_cmd_status_string(__entry->cmd_status)
···
253
235
TP_PROTO(struct dwc3_ep *dep, struct dwc3_trb *trb),
254
236
TP_ARGS(dep, trb),
255
237
TP_STRUCT__entry(
238
+
__field(phys_addr_t, base_address)
256
239
__string(name, dep->name)
257
240
__field(struct dwc3_trb *, trb)
258
241
__field(u32, bpl)
···
265
246
__field(u32, dequeue)
266
247
),
267
248
TP_fast_assign(
249
+
__entry->base_address = dep->dwc->xhci_resources[0].start;
268
250
__assign_str(name);
269
251
__entry->trb = trb;
270
252
__entry->bpl = trb->bpl;
···
276
256
__entry->enqueue = dep->trb_enqueue;
277
257
__entry->dequeue = dep->trb_dequeue;
278
258
),
279
-
TP_printk("%s: trb %p (E%d:D%d) buf %08x%08x size %s%d ctrl %08x sofn %08x (%c%c%c%c:%c%c:%s)",
280
-
__get_str(name), __entry->trb, __entry->enqueue,
259
+
TP_printk("%pa: %s: trb %p (E%d:D%d) buf %08x%08x size %s%d ctrl %08x sofn %08x (%c%c%c%c:%c%c:%s)",
260
+
&__entry->base_address, __get_str(name), __entry->trb, __entry->enqueue,
281
261
__entry->dequeue, __entry->bph, __entry->bpl,
282
262
({char *s;
283
263
int pcm = ((__entry->size >> 24) & 3) + 1;
···
327
307
TP_PROTO(struct dwc3_ep *dep),
328
308
TP_ARGS(dep),
329
309
TP_STRUCT__entry(
310
+
__field(phys_addr_t, base_address)
330
311
__string(name, dep->name)
331
312
__field(unsigned int, maxpacket)
332
313
__field(unsigned int, maxpacket_limit)
···
339
318
__field(u8, trb_dequeue)
340
319
),
341
320
TP_fast_assign(
321
+
__entry->base_address = dep->dwc->xhci_resources[0].start;
342
322
__assign_str(name);
343
323
__entry->maxpacket = dep->endpoint.maxpacket;
344
324
__entry->maxpacket_limit = dep->endpoint.maxpacket_limit;
···
350
328
__entry->trb_enqueue = dep->trb_enqueue;
351
329
__entry->trb_dequeue = dep->trb_dequeue;
352
330
),
353
-
TP_printk("%s: mps %d/%d streams %d burst %d ring %d/%d flags %c:%c%c%c%c:%c",
354
-
__get_str(name), __entry->maxpacket,
331
+
TP_printk("%pa: %s: mps %d/%d streams %d burst %d ring %d/%d flags %c:%c%c%c%c:%c",
332
+
&__entry->base_address, __get_str(name), __entry->maxpacket,
355
333
__entry->maxpacket_limit, __entry->max_streams,
356
334
__entry->maxburst, __entry->trb_enqueue,
357
335
__entry->trb_dequeue,
+5
-5
drivers/usb/dwc3/ulpi.c
+5
-5
drivers/usb/dwc3/ulpi.c
···
33
33
if (read)
34
34
ns += DWC3_ULPI_BASE_DELAY;
35
35
36
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
36
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
37
37
if (reg & DWC3_GUSB2PHYCFG_SUSPHY)
38
38
usleep_range(1000, 1200);
39
39
40
40
while (count--) {
41
41
ndelay(ns);
42
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
42
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYACC(0));
43
43
if (reg & DWC3_GUSB2PHYACC_DONE)
44
44
return 0;
45
45
cpu_relax();
···
55
55
int ret;
56
56
57
57
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
58
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
58
+
dwc3_writel(dwc, DWC3_GUSB2PHYACC(0), reg);
59
59
60
60
ret = dwc3_ulpi_busyloop(dwc, addr, true);
61
61
if (ret)
62
62
return ret;
63
63
64
-
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
64
+
reg = dwc3_readl(dwc, DWC3_GUSB2PHYACC(0));
65
65
66
66
return DWC3_GUSB2PHYACC_DATA(reg);
67
67
}
···
73
73
74
74
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
75
75
reg |= DWC3_GUSB2PHYACC_WRITE | val;
76
-
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
76
+
dwc3_writel(dwc, DWC3_GUSB2PHYACC(0), reg);
77
77
78
78
return dwc3_ulpi_busyloop(dwc, addr, false);
79
79
}
-6
drivers/usb/fotg210/fotg210-hcd.c
-6
drivers/usb/fotg210/fotg210-hcd.c
···
5625
5625
if (usb_disabled())
5626
5626
return -ENODEV;
5627
5627
5628
-
set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
5629
-
if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
5630
-
test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
5631
-
pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5632
-
5633
5628
pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd\n",
5634
5629
hcd_name, sizeof(struct fotg210_qh),
5635
5630
sizeof(struct fotg210_qtd),
···
5638
5643
void __exit fotg210_hcd_cleanup(void)
5639
5644
{
5640
5645
debugfs_remove(fotg210_debug_root);
5641
-
clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
5642
5646
}
+12
-12
drivers/usb/gadget/configfs.c
+12
-12
drivers/usb/gadget/configfs.c
···
409
409
kfree(gi);
410
410
}
411
411
412
-
static struct configfs_item_operations gadget_root_item_ops = {
412
+
static const struct configfs_item_operations gadget_root_item_ops = {
413
413
.release = gadget_info_attr_release,
414
414
};
415
415
···
514
514
WARN(1, "Unable to locate function to unbind\n");
515
515
}
516
516
517
-
static struct configfs_item_operations gadget_config_item_ops = {
517
+
static const struct configfs_item_operations gadget_config_item_ops = {
518
518
.release = gadget_config_attr_release,
519
519
.allow_link = config_usb_cfg_link,
520
520
.drop_link = config_usb_cfg_unlink,
···
663
663
config_item_put(item);
664
664
}
665
665
666
-
static struct configfs_group_operations functions_ops = {
666
+
static const struct configfs_group_operations functions_ops = {
667
667
.make_group = &function_make,
668
668
.drop_item = &function_drop,
669
669
};
···
766
766
config_item_put(item);
767
767
}
768
768
769
-
static struct configfs_group_operations config_desc_ops = {
769
+
static const struct configfs_group_operations config_desc_ops = {
770
770
.make_group = &config_desc_make,
771
771
.drop_item = &config_desc_drop,
772
772
};
···
799
799
kfree(gs);
800
800
}
801
801
802
-
static struct configfs_item_operations gadget_language_langid_item_ops = {
802
+
static const struct configfs_item_operations gadget_language_langid_item_ops = {
803
803
.release = gadget_language_attr_release,
804
804
};
805
805
···
852
852
kfree(string);
853
853
}
854
854
855
-
static struct configfs_item_operations gadget_string_item_ops = {
855
+
static const struct configfs_item_operations gadget_string_item_ops = {
856
856
.release = gadget_string_release,
857
857
};
858
858
···
901
901
string->usb_string.id = i++;
902
902
}
903
903
904
-
static struct configfs_group_operations gadget_language_langid_group_ops = {
904
+
static const struct configfs_group_operations gadget_language_langid_group_ops = {
905
905
.make_item = gadget_language_string_make,
906
906
.drop_item = gadget_language_string_drop,
907
907
};
···
960
960
config_item_put(item);
961
961
}
962
962
963
-
static struct configfs_group_operations gadget_language_group_ops = {
963
+
static const struct configfs_group_operations gadget_language_group_ops = {
964
964
.make_group = &gadget_language_make,
965
965
.drop_item = &gadget_language_drop,
966
966
};
···
1266
1266
mutex_unlock(&gi->lock);
1267
1267
}
1268
1268
1269
-
static struct configfs_item_operations os_desc_ops = {
1269
+
static const struct configfs_item_operations os_desc_ops = {
1270
1270
.allow_link = os_desc_link,
1271
1271
.drop_link = os_desc_unlink,
1272
1272
};
···
1391
1391
kfree(ext_prop); /* frees a whole chunk */
1392
1392
}
1393
1393
1394
-
static struct configfs_item_operations ext_prop_ops = {
1394
+
static const struct configfs_item_operations ext_prop_ops = {
1395
1395
.release = usb_os_desc_ext_prop_release,
1396
1396
};
1397
1397
···
1456
1456
config_item_put(item);
1457
1457
}
1458
1458
1459
-
static struct configfs_group_operations interf_grp_ops = {
1459
+
static const struct configfs_group_operations interf_grp_ops = {
1460
1460
.make_item = &ext_prop_make,
1461
1461
.drop_item = &ext_prop_drop,
1462
1462
};
···
2061
2061
config_item_put(item);
2062
2062
}
2063
2063
2064
-
static struct configfs_group_operations gadgets_ops = {
2064
+
static const struct configfs_group_operations gadgets_ops = {
2065
2065
.make_group = &gadgets_make,
2066
2066
.drop_item = &gadgets_drop,
2067
2067
};
+1
-1
drivers/usb/gadget/function/f_acm.c
+1
-1
drivers/usb/gadget/function/f_acm.c
+10
-16
drivers/usb/gadget/function/f_fs.c
+10
-16
drivers/usb/gadget/function/f_fs.c
···
1509
1509
goto err_dmabuf_detach;
1510
1510
}
1511
1511
1512
-
dir = epfile->in ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
1512
+
dir = epfile->in ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1513
1513
1514
1514
err = ffs_dma_resv_lock(dmabuf, nonblock);
1515
1515
if (err)
···
1639
1639
/* Make sure we don't have writers */
1640
1640
timeout = nonblock ? 0 : msecs_to_jiffies(DMABUF_ENQUEUE_TIMEOUT_MS);
1641
1641
retl = dma_resv_wait_timeout(dmabuf->resv,
1642
-
dma_resv_usage_rw(epfile->in),
1642
+
dma_resv_usage_rw(!epfile->in),
1643
1643
true, timeout);
1644
1644
if (retl == 0)
1645
1645
retl = -EBUSY;
···
1684
1684
dma_fence_init(&fence->base, &ffs_dmabuf_fence_ops,
1685
1685
&priv->lock, priv->context, seqno);
1686
1686
1687
-
resv_dir = epfile->in ? DMA_RESV_USAGE_WRITE : DMA_RESV_USAGE_READ;
1687
+
resv_dir = epfile->in ? DMA_RESV_USAGE_READ : DMA_RESV_USAGE_WRITE;
1688
1688
1689
1689
dma_resv_add_fence(dmabuf->resv, &fence->base, resv_dir);
1690
1690
dma_resv_unlock(dmabuf->resv);
···
1744
1744
{
1745
1745
int fd;
1746
1746
1747
-
if (copy_from_user(&fd, (void __user *)value, sizeof(fd))) {
1748
-
ret = -EFAULT;
1749
-
break;
1750
-
}
1747
+
if (copy_from_user(&fd, (void __user *)value, sizeof(fd)))
1748
+
return -EFAULT;
1751
1749
1752
1750
return ffs_dmabuf_attach(file, fd);
1753
1751
}
···
1753
1755
{
1754
1756
int fd;
1755
1757
1756
-
if (copy_from_user(&fd, (void __user *)value, sizeof(fd))) {
1757
-
ret = -EFAULT;
1758
-
break;
1759
-
}
1758
+
if (copy_from_user(&fd, (void __user *)value, sizeof(fd)))
1759
+
return -EFAULT;
1760
1760
1761
1761
return ffs_dmabuf_detach(file, fd);
1762
1762
}
···
1762
1766
{
1763
1767
struct usb_ffs_dmabuf_transfer_req req;
1764
1768
1765
-
if (copy_from_user(&req, (void __user *)value, sizeof(req))) {
1766
-
ret = -EFAULT;
1767
-
break;
1768
-
}
1769
+
if (copy_from_user(&req, (void __user *)value, sizeof(req)))
1770
+
return -EFAULT;
1769
1771
1770
1772
return ffs_dmabuf_transfer(file, &req);
1771
1773
}
···
3994
4000
usb_put_function_instance(&opts->func_inst);
3995
4001
}
3996
4002
3997
-
static struct configfs_item_operations ffs_item_ops = {
4003
+
static const struct configfs_item_operations ffs_item_ops = {
3998
4004
.release = ffs_attr_release,
3999
4005
};
4000
4006
+1
-1
drivers/usb/gadget/function/f_hid.c
+1
-1
drivers/usb/gadget/function/f_hid.c
+1
-1
drivers/usb/gadget/function/f_loopback.c
+1
-1
drivers/usb/gadget/function/f_loopback.c
+3
-3
drivers/usb/gadget/function/f_mass_storage.c
+3
-3
drivers/usb/gadget/function/f_mass_storage.c
···
3153
3153
kfree(lun_opts);
3154
3154
}
3155
3155
3156
-
static struct configfs_item_operations fsg_lun_item_ops = {
3156
+
static const struct configfs_item_operations fsg_lun_item_ops = {
3157
3157
.release = fsg_lun_attr_release,
3158
3158
};
3159
3159
···
3369
3369
usb_put_function_instance(&opts->func_inst);
3370
3370
}
3371
3371
3372
-
static struct configfs_item_operations fsg_item_ops = {
3372
+
static const struct configfs_item_operations fsg_item_ops = {
3373
3373
.release = fsg_attr_release,
3374
3374
};
3375
3375
···
3462
3462
NULL,
3463
3463
};
3464
3464
3465
-
static struct configfs_group_operations fsg_group_ops = {
3465
+
static const struct configfs_group_operations fsg_group_ops = {
3466
3466
.make_group = fsg_lun_make,
3467
3467
.drop_item = fsg_lun_drop,
3468
3468
};
+60
-52
drivers/usb/gadget/function/f_midi.c
+60
-52
drivers/usb/gadget/function/f_midi.c
···
875
875
struct usb_composite_dev *cdev = c->cdev;
876
876
struct f_midi *midi = func_to_midi(f);
877
877
struct usb_string *us;
878
+
struct f_midi_opts *opts;
878
879
int status, n, jack = 1, i = 0, endpoint_descriptor_index = 0;
879
880
880
881
midi->gadget = cdev->gadget;
···
883
882
status = f_midi_register_card(midi);
884
883
if (status < 0)
885
884
goto fail_register;
885
+
886
+
opts = container_of(f->fi, struct f_midi_opts, func_inst);
887
+
if (opts->interface_string)
888
+
midi_string_defs[STRING_FUNC_IDX].s = opts->interface_string;
886
889
887
890
/* maybe allocate device-global string ID */
888
891
us = usb_gstrings_attach(c->cdev, midi_strings,
···
1091
1086
usb_put_function_instance(&opts->func_inst);
1092
1087
}
1093
1088
1094
-
static struct configfs_item_operations midi_item_ops = {
1089
+
static const struct configfs_item_operations midi_item_ops = {
1095
1090
.release = midi_attr_release,
1096
1091
};
1097
1092
···
1183
1178
\
1184
1179
CONFIGFS_ATTR(f_midi_opts_, name);
1185
1180
1181
+
#define F_MIDI_OPT_STRING(name) \
1182
+
static ssize_t f_midi_opts_##name##_show(struct config_item *item, char *page) \
1183
+
{ \
1184
+
struct f_midi_opts *opts = to_f_midi_opts(item); \
1185
+
ssize_t result; \
1186
+
\
1187
+
mutex_lock(&opts->lock); \
1188
+
if (opts->name) { \
1189
+
result = strscpy(page, opts->name, PAGE_SIZE); \
1190
+
} else { \
1191
+
page[0] = 0; \
1192
+
result = 0; \
1193
+
} \
1194
+
\
1195
+
mutex_unlock(&opts->lock); \
1196
+
\
1197
+
return result; \
1198
+
} \
1199
+
\
1200
+
static ssize_t f_midi_opts_##name##_store(struct config_item *item, \
1201
+
const char *page, size_t len) \
1202
+
{ \
1203
+
struct f_midi_opts *opts = to_f_midi_opts(item); \
1204
+
int ret; \
1205
+
char *c; \
1206
+
\
1207
+
mutex_lock(&opts->lock); \
1208
+
if (opts->refcnt > 1) { \
1209
+
ret = -EBUSY; \
1210
+
goto end; \
1211
+
} \
1212
+
\
1213
+
c = kstrndup(page, len, GFP_KERNEL); \
1214
+
if (!c) { \
1215
+
ret = -ENOMEM; \
1216
+
goto end; \
1217
+
} \
1218
+
kfree(opts->name); \
1219
+
opts->name = c; \
1220
+
ret = len; \
1221
+
end: \
1222
+
mutex_unlock(&opts->lock); \
1223
+
return ret; \
1224
+
} \
1225
+
\
1226
+
CONFIGFS_ATTR(f_midi_opts_, name)
1227
+
1186
1228
F_MIDI_OPT_SIGNED(index, true, SNDRV_CARDS);
1187
1229
F_MIDI_OPT(buflen, false, 0);
1188
1230
F_MIDI_OPT(qlen, false, 0);
1189
1231
F_MIDI_OPT(in_ports, true, MAX_PORTS);
1190
1232
F_MIDI_OPT(out_ports, true, MAX_PORTS);
1191
-
1192
-
static ssize_t f_midi_opts_id_show(struct config_item *item, char *page)
1193
-
{
1194
-
struct f_midi_opts *opts = to_f_midi_opts(item);
1195
-
ssize_t result;
1196
-
1197
-
mutex_lock(&opts->lock);
1198
-
if (opts->id) {
1199
-
result = strscpy(page, opts->id, PAGE_SIZE);
1200
-
} else {
1201
-
page[0] = 0;
1202
-
result = 0;
1203
-
}
1204
-
1205
-
mutex_unlock(&opts->lock);
1206
-
1207
-
return result;
1208
-
}
1209
-
1210
-
static ssize_t f_midi_opts_id_store(struct config_item *item,
1211
-
const char *page, size_t len)
1212
-
{
1213
-
struct f_midi_opts *opts = to_f_midi_opts(item);
1214
-
int ret;
1215
-
char *c;
1216
-
1217
-
mutex_lock(&opts->lock);
1218
-
if (opts->refcnt > 1) {
1219
-
ret = -EBUSY;
1220
-
goto end;
1221
-
}
1222
-
1223
-
c = kstrndup(page, len, GFP_KERNEL);
1224
-
if (!c) {
1225
-
ret = -ENOMEM;
1226
-
goto end;
1227
-
}
1228
-
if (opts->id_allocated)
1229
-
kfree(opts->id);
1230
-
opts->id = c;
1231
-
opts->id_allocated = true;
1232
-
ret = len;
1233
-
end:
1234
-
mutex_unlock(&opts->lock);
1235
-
return ret;
1236
-
}
1237
-
1238
-
CONFIGFS_ATTR(f_midi_opts_, id);
1233
+
F_MIDI_OPT_STRING(id);
1234
+
F_MIDI_OPT_STRING(interface_string);
1239
1235
1240
1236
static struct configfs_attribute *midi_attrs[] = {
1241
1237
&f_midi_opts_attr_index,
···
1245
1239
&f_midi_opts_attr_in_ports,
1246
1240
&f_midi_opts_attr_out_ports,
1247
1241
&f_midi_opts_attr_id,
1242
+
&f_midi_opts_attr_interface_string,
1248
1243
NULL,
1249
1244
};
1250
1245
···
1269
1262
mutex_unlock(&opts->lock);
1270
1263
1271
1264
if (free) {
1272
-
if (opts->id_allocated)
1273
-
kfree(opts->id);
1265
+
kfree(opts->id);
1266
+
kfree(opts->interface_string);
1274
1267
kfree(opts);
1275
1268
}
1276
1269
}
···
1286
1279
mutex_init(&opts->lock);
1287
1280
opts->func_inst.free_func_inst = f_midi_free_inst;
1288
1281
opts->index = SNDRV_DEFAULT_IDX1;
1289
-
opts->id = SNDRV_DEFAULT_STR1;
1282
+
opts->id = NULL;
1283
+
opts->interface_string = NULL;
1290
1284
opts->buflen = 512;
1291
1285
opts->qlen = 32;
1292
1286
opts->in_ports = 1;
+5
-5
drivers/usb/gadget/function/f_midi2.c
+5
-5
drivers/usb/gadget/function/f_midi2.c
···
2316
2316
kfree(opts);
2317
2317
}
2318
2318
2319
-
static struct configfs_item_operations f_midi2_block_item_ops = {
2319
+
static const struct configfs_item_operations f_midi2_block_item_ops = {
2320
2320
.release = f_midi2_block_opts_release,
2321
2321
};
2322
2322
···
2479
2479
kfree(opts);
2480
2480
}
2481
2481
2482
-
static struct configfs_item_operations f_midi2_ep_item_ops = {
2482
+
static const struct configfs_item_operations f_midi2_ep_item_ops = {
2483
2483
.release = f_midi2_ep_opts_release,
2484
2484
};
2485
2485
2486
-
static struct configfs_group_operations f_midi2_ep_group_ops = {
2486
+
static const struct configfs_group_operations f_midi2_ep_group_ops = {
2487
2487
.make_group = f_midi2_opts_block_make,
2488
2488
.drop_item = f_midi2_opts_block_drop,
2489
2489
};
···
2618
2618
usb_put_function_instance(&opts->func_inst);
2619
2619
}
2620
2620
2621
-
static struct configfs_item_operations f_midi2_item_ops = {
2621
+
static const struct configfs_item_operations f_midi2_item_ops = {
2622
2622
.release = f_midi2_opts_release,
2623
2623
};
2624
2624
2625
-
static struct configfs_group_operations f_midi2_group_ops = {
2625
+
static const struct configfs_group_operations f_midi2_group_ops = {
2626
2626
.make_group = f_midi2_opts_ep_make,
2627
2627
.drop_item = f_midi2_opts_ep_drop,
2628
2628
};
+64
-66
drivers/usb/gadget/function/f_ncm.c
+64
-66
drivers/usb/gadget/function/f_ncm.c
···
83
83
return container_of(f, struct f_ncm, port.func);
84
84
}
85
85
86
+
static inline struct f_ncm_opts *func_to_ncm_opts(struct usb_function *f)
87
+
{
88
+
return container_of(f->fi, struct f_ncm_opts, func_inst);
89
+
}
90
+
86
91
/*-------------------------------------------------------------------------*/
87
92
88
93
/*
···
864
859
static int ncm_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
865
860
{
866
861
struct f_ncm *ncm = func_to_ncm(f);
862
+
struct f_ncm_opts *opts = func_to_ncm_opts(f);
867
863
struct usb_composite_dev *cdev = f->config->cdev;
868
864
869
865
/* Control interface has only altsetting 0 */
···
887
881
if (alt > 1)
888
882
goto fail;
889
883
890
-
if (ncm->netdev) {
891
-
DBG(cdev, "reset ncm\n");
892
-
ncm->netdev = NULL;
893
-
gether_disconnect(&ncm->port);
894
-
ncm_reset_values(ncm);
895
-
}
884
+
scoped_guard(mutex, &opts->lock)
885
+
if (opts->net) {
886
+
DBG(cdev, "reset ncm\n");
887
+
opts->net = NULL;
888
+
gether_disconnect(&ncm->port);
889
+
ncm_reset_values(ncm);
890
+
}
896
891
897
892
/*
898
893
* CDC Network only sends data in non-default altsettings.
···
926
919
net = gether_connect(&ncm->port);
927
920
if (IS_ERR(net))
928
921
return PTR_ERR(net);
929
-
ncm->netdev = net;
922
+
scoped_guard(mutex, &opts->lock)
923
+
opts->net = net;
930
924
}
931
925
932
926
spin_lock(&ncm->lock);
···
1374
1366
static void ncm_disable(struct usb_function *f)
1375
1367
{
1376
1368
struct f_ncm *ncm = func_to_ncm(f);
1369
+
struct f_ncm_opts *opts = func_to_ncm_opts(f);
1377
1370
struct usb_composite_dev *cdev = f->config->cdev;
1378
1371
1379
1372
DBG(cdev, "ncm deactivated\n");
1380
1373
1381
-
if (ncm->netdev) {
1382
-
ncm->netdev = NULL;
1383
-
gether_disconnect(&ncm->port);
1384
-
}
1374
+
scoped_guard(mutex, &opts->lock)
1375
+
if (opts->net) {
1376
+
opts->net = NULL;
1377
+
gether_disconnect(&ncm->port);
1378
+
}
1385
1379
1386
1380
if (ncm->notify->enabled) {
1387
1381
usb_ep_disable(ncm->notify);
···
1443
1433
{
1444
1434
struct usb_composite_dev *cdev = c->cdev;
1445
1435
struct f_ncm *ncm = func_to_ncm(f);
1436
+
struct f_ncm_opts *ncm_opts = func_to_ncm_opts(f);
1446
1437
struct usb_string *us;
1447
1438
int status = 0;
1448
1439
struct usb_ep *ep;
1449
-
struct f_ncm_opts *ncm_opts;
1450
1440
1451
1441
struct usb_os_desc_table *os_desc_table __free(kfree) = NULL;
1442
+
struct net_device *netdev __free(free_gether_netdev) = NULL;
1452
1443
struct usb_request *request __free(free_usb_request) = NULL;
1453
1444
1454
1445
if (!can_support_ecm(cdev->gadget))
1455
1446
return -EINVAL;
1456
-
1457
-
ncm_opts = container_of(f->fi, struct f_ncm_opts, func_inst);
1458
1447
1459
1448
if (cdev->use_os_string) {
1460
1449
os_desc_table = kzalloc(sizeof(*os_desc_table), GFP_KERNEL);
···
1461
1452
return -ENOMEM;
1462
1453
}
1463
1454
1464
-
mutex_lock(&ncm_opts->lock);
1465
-
gether_set_gadget(ncm_opts->net, cdev->gadget);
1466
-
if (!ncm_opts->bound) {
1467
-
ncm_opts->net->mtu = (ncm_opts->max_segment_size - ETH_HLEN);
1468
-
status = gether_register_netdev(ncm_opts->net);
1469
-
}
1470
-
mutex_unlock(&ncm_opts->lock);
1455
+
netdev = gether_setup_default();
1456
+
if (IS_ERR(netdev))
1457
+
return -ENOMEM;
1471
1458
1459
+
scoped_guard(mutex, &ncm_opts->lock) {
1460
+
gether_apply_opts(netdev, &ncm_opts->net_opts);
1461
+
netdev->mtu = ncm_opts->max_segment_size - ETH_HLEN;
1462
+
}
1463
+
1464
+
gether_set_gadget(netdev, cdev->gadget);
1465
+
status = gether_register_netdev(netdev);
1472
1466
if (status)
1473
1467
return status;
1474
1468
1475
-
ncm_opts->bound = true;
1476
-
1477
-
ncm_string_defs[1].s = ncm->ethaddr;
1469
+
/* export host's Ethernet address in CDC format */
1470
+
status = gether_get_host_addr_cdc(netdev, ncm->ethaddr,
1471
+
sizeof(ncm->ethaddr));
1472
+
if (status < 12)
1473
+
return -EINVAL;
1474
+
ncm_string_defs[STRING_MAC_IDX].s = ncm->ethaddr;
1478
1475
1479
1476
us = usb_gstrings_attach(cdev, ncm_strings,
1480
1477
ARRAY_SIZE(ncm_string_defs));
···
1578
1563
f->os_desc_n = 1;
1579
1564
}
1580
1565
ncm->notify_req = no_free_ptr(request);
1566
+
ncm->netdev = no_free_ptr(netdev);
1567
+
ncm->port.ioport = netdev_priv(ncm->netdev);
1581
1568
1582
1569
DBG(cdev, "CDC Network: IN/%s OUT/%s NOTIFY/%s\n",
1583
1570
ncm->port.in_ep->name, ncm->port.out_ep->name,
···
1594
1577
}
1595
1578
1596
1579
/* f_ncm_item_ops */
1597
-
USB_ETHERNET_CONFIGFS_ITEM(ncm);
1580
+
USB_ETHER_OPTS_ITEM(ncm);
1598
1581
1599
1582
/* f_ncm_opts_dev_addr */
1600
-
USB_ETHERNET_CONFIGFS_ITEM_ATTR_DEV_ADDR(ncm);
1583
+
USB_ETHER_OPTS_ATTR_DEV_ADDR(ncm);
1601
1584
1602
1585
/* f_ncm_opts_host_addr */
1603
-
USB_ETHERNET_CONFIGFS_ITEM_ATTR_HOST_ADDR(ncm);
1586
+
USB_ETHER_OPTS_ATTR_HOST_ADDR(ncm);
1604
1587
1605
1588
/* f_ncm_opts_qmult */
1606
-
USB_ETHERNET_CONFIGFS_ITEM_ATTR_QMULT(ncm);
1589
+
USB_ETHER_OPTS_ATTR_QMULT(ncm);
1607
1590
1608
1591
/* f_ncm_opts_ifname */
1609
-
USB_ETHERNET_CONFIGFS_ITEM_ATTR_IFNAME(ncm);
1592
+
USB_ETHER_OPTS_ATTR_IFNAME(ncm);
1610
1593
1611
1594
static ssize_t ncm_opts_max_segment_size_show(struct config_item *item,
1612
1595
char *page)
···
1672
1655
struct f_ncm_opts *opts;
1673
1656
1674
1657
opts = container_of(f, struct f_ncm_opts, func_inst);
1675
-
if (opts->bound)
1676
-
gether_cleanup(netdev_priv(opts->net));
1677
-
else
1678
-
free_netdev(opts->net);
1679
1658
kfree(opts->ncm_interf_group);
1680
1659
kfree(opts);
1681
1660
}
1682
1661
1683
1662
static struct usb_function_instance *ncm_alloc_inst(void)
1684
1663
{
1685
-
struct f_ncm_opts *opts;
1664
+
struct usb_function_instance *ret;
1686
1665
struct usb_os_desc *descs[1];
1687
1666
char *names[1];
1688
1667
struct config_group *ncm_interf_group;
1689
1668
1690
-
opts = kzalloc(sizeof(*opts), GFP_KERNEL);
1669
+
struct f_ncm_opts *opts __free(kfree) = kzalloc(sizeof(*opts), GFP_KERNEL);
1691
1670
if (!opts)
1692
1671
return ERR_PTR(-ENOMEM);
1672
+
1673
+
opts->net = NULL;
1693
1674
opts->ncm_os_desc.ext_compat_id = opts->ncm_ext_compat_id;
1675
+
gether_setup_opts_default(&opts->net_opts, "usb");
1694
1676
1695
1677
mutex_init(&opts->lock);
1696
1678
opts->func_inst.free_func_inst = ncm_free_inst;
1697
-
opts->net = gether_setup_default();
1698
-
if (IS_ERR(opts->net)) {
1699
-
struct net_device *net = opts->net;
1700
-
kfree(opts);
1701
-
return ERR_CAST(net);
1702
-
}
1703
1679
opts->max_segment_size = ETH_FRAME_LEN;
1704
1680
INIT_LIST_HEAD(&opts->ncm_os_desc.ext_prop);
1705
1681
···
1703
1693
ncm_interf_group =
1704
1694
usb_os_desc_prepare_interf_dir(&opts->func_inst.group, 1, descs,
1705
1695
names, THIS_MODULE);
1706
-
if (IS_ERR(ncm_interf_group)) {
1707
-
ncm_free_inst(&opts->func_inst);
1696
+
if (IS_ERR(ncm_interf_group))
1708
1697
return ERR_CAST(ncm_interf_group);
1709
-
}
1710
1698
opts->ncm_interf_group = ncm_interf_group;
1711
1699
1712
-
return &opts->func_inst;
1700
+
ret = &opts->func_inst;
1701
+
retain_and_null_ptr(opts);
1702
+
return ret;
1713
1703
}
1714
1704
1715
1705
static void ncm_free(struct usb_function *f)
1716
1706
{
1717
-
struct f_ncm *ncm;
1718
-
struct f_ncm_opts *opts;
1707
+
struct f_ncm_opts *opts = func_to_ncm_opts(f);
1719
1708
1720
-
ncm = func_to_ncm(f);
1721
-
opts = container_of(f->fi, struct f_ncm_opts, func_inst);
1722
-
kfree(ncm);
1723
-
mutex_lock(&opts->lock);
1724
-
opts->refcnt--;
1725
-
mutex_unlock(&opts->lock);
1709
+
scoped_guard(mutex, &opts->lock)
1710
+
opts->refcnt--;
1711
+
kfree(func_to_ncm(f));
1726
1712
}
1727
1713
1728
1714
static void ncm_unbind(struct usb_configuration *c, struct usb_function *f)
···
1742
1736
1743
1737
kfree(ncm->notify_req->buf);
1744
1738
usb_ep_free_request(ncm->notify, ncm->notify_req);
1739
+
1740
+
ncm->port.ioport = NULL;
1741
+
gether_cleanup(netdev_priv(ncm->netdev));
1745
1742
}
1746
1743
1747
1744
static struct usb_function *ncm_alloc(struct usb_function_instance *fi)
1748
1745
{
1749
1746
struct f_ncm *ncm;
1750
1747
struct f_ncm_opts *opts;
1751
-
int status;
1752
1748
1753
1749
/* allocate and initialize one new instance */
1754
1750
ncm = kzalloc(sizeof(*ncm), GFP_KERNEL);
···
1758
1750
return ERR_PTR(-ENOMEM);
1759
1751
1760
1752
opts = container_of(fi, struct f_ncm_opts, func_inst);
1761
-
mutex_lock(&opts->lock);
1762
-
opts->refcnt++;
1763
1753
1764
-
/* export host's Ethernet address in CDC format */
1765
-
status = gether_get_host_addr_cdc(opts->net, ncm->ethaddr,
1766
-
sizeof(ncm->ethaddr));
1767
-
if (status < 12) { /* strlen("01234567890a") */
1768
-
kfree(ncm);
1769
-
mutex_unlock(&opts->lock);
1770
-
return ERR_PTR(-EINVAL);
1771
-
}
1754
+
scoped_guard(mutex, &opts->lock)
1755
+
opts->refcnt++;
1772
1756
1773
1757
spin_lock_init(&ncm->lock);
1774
1758
ncm_reset_values(ncm);
1775
-
ncm->port.ioport = netdev_priv(opts->net);
1776
-
mutex_unlock(&opts->lock);
1777
1759
ncm->port.is_fixed = true;
1778
1760
ncm->port.supports_multi_frame = true;
1779
1761
+1
-1
drivers/usb/gadget/function/f_obex.c
+1
-1
drivers/usb/gadget/function/f_obex.c
+1
-1
drivers/usb/gadget/function/f_phonet.c
+1
-1
drivers/usb/gadget/function/f_phonet.c
+1
-1
drivers/usb/gadget/function/f_printer.c
+1
-1
drivers/usb/gadget/function/f_printer.c
+1
-1
drivers/usb/gadget/function/f_serial.c
+1
-1
drivers/usb/gadget/function/f_serial.c
+53
-1
drivers/usb/gadget/function/f_sourcesink.c
+53
-1
drivers/usb/gadget/function/f_sourcesink.c
···
46
46
unsigned isoc_mult;
47
47
unsigned isoc_maxburst;
48
48
unsigned buflen;
49
+
unsigned bulk_maxburst;
49
50
unsigned bulk_qlen;
50
51
unsigned iso_qlen;
51
52
};
···
328
327
return id;
329
328
source_sink_intf_alt0.bInterfaceNumber = id;
330
329
source_sink_intf_alt1.bInterfaceNumber = id;
330
+
331
+
if (ss->bulk_maxburst > 15)
332
+
ss->bulk_maxburst = 15;
333
+
334
+
ss_source_comp_desc.bMaxBurst = ss->bulk_maxburst;
335
+
ss_sink_comp_desc.bMaxBurst = ss->bulk_maxburst;
331
336
332
337
/* allocate bulk endpoints */
333
338
ss->in_ep = usb_ep_autoconfig(cdev->gadget, &fs_source_desc);
···
860
853
ss->isoc_mult = ss_opts->isoc_mult;
861
854
ss->isoc_maxburst = ss_opts->isoc_maxburst;
862
855
ss->buflen = ss_opts->bulk_buflen;
856
+
ss->bulk_maxburst = ss_opts->bulk_maxburst;
863
857
ss->bulk_qlen = ss_opts->bulk_qlen;
864
858
ss->iso_qlen = ss_opts->iso_qlen;
865
859
···
890
882
usb_put_function_instance(&ss_opts->func_inst);
891
883
}
892
884
893
-
static struct configfs_item_operations ss_item_ops = {
885
+
static const struct configfs_item_operations ss_item_ops = {
894
886
.release = ss_attr_release,
895
887
};
896
888
···
1109
1101
1110
1102
CONFIGFS_ATTR(f_ss_opts_, isoc_maxburst);
1111
1103
1104
+
static ssize_t f_ss_opts_bulk_maxburst_show(struct config_item *item, char *page)
1105
+
{
1106
+
struct f_ss_opts *opts = to_f_ss_opts(item);
1107
+
int result;
1108
+
1109
+
mutex_lock(&opts->lock);
1110
+
result = sysfs_emit(page, "%u\n", opts->bulk_maxburst);
1111
+
mutex_unlock(&opts->lock);
1112
+
1113
+
return result;
1114
+
}
1115
+
1116
+
static ssize_t f_ss_opts_bulk_maxburst_store(struct config_item *item,
1117
+
const char *page, size_t len)
1118
+
{
1119
+
struct f_ss_opts *opts = to_f_ss_opts(item);
1120
+
int ret;
1121
+
u8 num;
1122
+
1123
+
mutex_lock(&opts->lock);
1124
+
if (opts->refcnt) {
1125
+
ret = -EBUSY;
1126
+
goto end;
1127
+
}
1128
+
1129
+
ret = kstrtou8(page, 0, &num);
1130
+
if (ret)
1131
+
goto end;
1132
+
1133
+
if (num > 15) {
1134
+
ret = -EINVAL;
1135
+
goto end;
1136
+
}
1137
+
1138
+
opts->bulk_maxburst = num;
1139
+
ret = len;
1140
+
end:
1141
+
mutex_unlock(&opts->lock);
1142
+
return ret;
1143
+
}
1144
+
1145
+
CONFIGFS_ATTR(f_ss_opts_, bulk_maxburst);
1146
+
1112
1147
static ssize_t f_ss_opts_bulk_buflen_show(struct config_item *item, char *page)
1113
1148
{
1114
1149
struct f_ss_opts *opts = to_f_ss_opts(item);
···
1273
1222
&f_ss_opts_attr_isoc_mult,
1274
1223
&f_ss_opts_attr_isoc_maxburst,
1275
1224
&f_ss_opts_attr_bulk_buflen,
1225
+
&f_ss_opts_attr_bulk_maxburst,
1276
1226
&f_ss_opts_attr_bulk_qlen,
1277
1227
&f_ss_opts_attr_iso_qlen,
1278
1228
NULL,
+3
-2
drivers/usb/gadget/function/f_tcm.c
+3
-2
drivers/usb/gadget/function/f_tcm.c
···
1227
1227
goto out;
1228
1228
1229
1229
target_submit_cmd(se_cmd, tv_nexus->tvn_se_sess, cmd->cmd_buf,
1230
-
cmd->sense_iu.sense, cmd->unpacked_lun, 0,
1230
+
cmd->sense_iu.sense, cmd->unpacked_lun, cmd->data_len,
1231
1231
cmd->prio_attr, dir, flags);
1232
1232
1233
1233
return;
···
1389
1389
cmd->tmr_func = 0;
1390
1390
cmd->tmr_rsp = RC_RESPONSE_UNKNOWN;
1391
1391
cmd->flags = 0;
1392
+
cmd->data_len = 0;
1392
1393
1393
1394
cmd_iu = (struct command_iu *)iu;
1394
1395
···
2447
2446
usb_put_function_instance(&opts->func_inst);
2448
2447
}
2449
2448
2450
-
static struct configfs_item_operations tcm_item_ops = {
2449
+
static const struct configfs_item_operations tcm_item_ops = {
2451
2450
.release = tcm_attr_release,
2452
2451
};
2453
2452
+1
-1
drivers/usb/gadget/function/f_uac1.c
+1
-1
drivers/usb/gadget/function/f_uac1.c
+1
-1
drivers/usb/gadget/function/f_uac1_legacy.c
+1
-1
drivers/usb/gadget/function/f_uac1_legacy.c
+1
-1
drivers/usb/gadget/function/f_uac2.c
+1
-1
drivers/usb/gadget/function/f_uac2.c
+1
drivers/usb/gadget/function/g_zero.h
+1
drivers/usb/gadget/function/g_zero.h
+45
drivers/usb/gadget/function/u_ether.c
+45
drivers/usb/gadget/function/u_ether.c
···
1040
1040
}
1041
1041
EXPORT_SYMBOL_GPL(gether_set_ifname);
1042
1042
1043
+
void gether_setup_opts_default(struct gether_opts *opts, const char *name)
1044
+
{
1045
+
opts->qmult = QMULT_DEFAULT;
1046
+
snprintf(opts->name, sizeof(opts->name), "%s%%d", name);
1047
+
eth_random_addr(opts->dev_mac);
1048
+
opts->addr_assign_type = NET_ADDR_RANDOM;
1049
+
eth_random_addr(opts->host_mac);
1050
+
}
1051
+
EXPORT_SYMBOL_GPL(gether_setup_opts_default);
1052
+
1053
+
void gether_apply_opts(struct net_device *net, struct gether_opts *opts)
1054
+
{
1055
+
struct eth_dev *dev = netdev_priv(net);
1056
+
1057
+
dev->qmult = opts->qmult;
1058
+
1059
+
if (opts->ifname_set) {
1060
+
strscpy(net->name, opts->name, sizeof(net->name));
1061
+
dev->ifname_set = true;
1062
+
}
1063
+
1064
+
memcpy(dev->host_mac, opts->host_mac, sizeof(dev->host_mac));
1065
+
1066
+
if (opts->addr_assign_type == NET_ADDR_SET) {
1067
+
memcpy(dev->dev_mac, opts->dev_mac, sizeof(dev->dev_mac));
1068
+
net->addr_assign_type = opts->addr_assign_type;
1069
+
}
1070
+
}
1071
+
EXPORT_SYMBOL_GPL(gether_apply_opts);
1072
+
1043
1073
void gether_suspend(struct gether *link)
1044
1074
{
1045
1075
struct eth_dev *dev = link->ioport;
···
1125
1095
free_netdev(dev->net);
1126
1096
}
1127
1097
EXPORT_SYMBOL_GPL(gether_cleanup);
1098
+
1099
+
void gether_unregister_free_netdev(struct net_device *net)
1100
+
{
1101
+
if (!net)
1102
+
return;
1103
+
1104
+
struct eth_dev *dev = netdev_priv(net);
1105
+
1106
+
if (net->reg_state == NETREG_REGISTERED) {
1107
+
unregister_netdev(net);
1108
+
flush_work(&dev->work);
1109
+
}
1110
+
free_netdev(net);
1111
+
}
1112
+
EXPORT_SYMBOL_GPL(gether_unregister_free_netdev);
1128
1113
1129
1114
/**
1130
1115
* gether_connect - notify network layer that USB link is active
+30
drivers/usb/gadget/function/u_ether.h
+30
drivers/usb/gadget/function/u_ether.h
···
38
38
39
39
struct eth_dev;
40
40
41
+
/**
42
+
* struct gether_opts - Options for Ethernet gadget function instances
43
+
* @name: Pattern for the network interface name (e.g., "usb%d").
44
+
* Used to generate the net device name.
45
+
* @qmult: Queue length multiplier for high/super speed.
46
+
* @host_mac: The MAC address to be used by the host side.
47
+
* @dev_mac: The MAC address to be used by the device side.
48
+
* @ifname_set: True if the interface name pattern has been set by userspace.
49
+
* @addr_assign_type: The method used for assigning the device MAC address
50
+
* (e.g., NET_ADDR_RANDOM, NET_ADDR_SET).
51
+
*
52
+
* This structure caches network-related settings provided through configfs
53
+
* before the net_device is fully instantiated. This allows for early
54
+
* configuration while deferring net_device allocation until the function
55
+
* is bound.
56
+
*/
57
+
struct gether_opts {
58
+
char name[IFNAMSIZ];
59
+
unsigned int qmult;
60
+
u8 host_mac[ETH_ALEN];
61
+
u8 dev_mac[ETH_ALEN];
62
+
bool ifname_set;
63
+
unsigned char addr_assign_type;
64
+
};
65
+
41
66
/*
42
67
* This represents the USB side of an "ethernet" link, managed by a USB
43
68
* function which provides control and (maybe) framing. Two functions
···
283
258
int gether_set_ifname(struct net_device *net, const char *name, int len);
284
259
285
260
void gether_cleanup(struct eth_dev *dev);
261
+
void gether_unregister_free_netdev(struct net_device *net);
262
+
DEFINE_FREE(free_gether_netdev, struct net_device *, gether_unregister_free_netdev(_T));
263
+
264
+
void gether_setup_opts_default(struct gether_opts *opts, const char *name);
265
+
void gether_apply_opts(struct net_device *net, struct gether_opts *opts);
286
266
287
267
void gether_suspend(struct gether *link);
288
268
void gether_resume(struct gether *link);
+178
-1
drivers/usb/gadget/function/u_ether_configfs.h
+178
-1
drivers/usb/gadget/function/u_ether_configfs.h
···
13
13
#ifndef __U_ETHER_CONFIGFS_H
14
14
#define __U_ETHER_CONFIGFS_H
15
15
16
+
#include <linux/cleanup.h>
17
+
#include <linux/hex.h>
18
+
#include <linux/if_ether.h>
19
+
#include <linux/mutex.h>
20
+
#include <linux/netdevice.h>
21
+
#include <linux/rtnetlink.h>
22
+
16
23
#define USB_ETHERNET_CONFIGFS_ITEM(_f_) \
17
24
static void _f_##_attr_release(struct config_item *item) \
18
25
{ \
···
28
21
usb_put_function_instance(&opts->func_inst); \
29
22
} \
30
23
\
31
-
static struct configfs_item_operations _f_##_item_ops = { \
24
+
static const struct configfs_item_operations _f_##_item_ops = { \
32
25
.release = _f_##_attr_release, \
33
26
}
34
27
···
203
196
} \
204
197
\
205
198
CONFIGFS_ATTR(_f_##_opts_, _n_)
199
+
200
+
#define USB_ETHER_OPTS_ITEM(_f_) \
201
+
static void _f_##_attr_release(struct config_item *item) \
202
+
{ \
203
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
204
+
\
205
+
usb_put_function_instance(&opts->func_inst); \
206
+
} \
207
+
\
208
+
static struct configfs_item_operations _f_##_item_ops = { \
209
+
.release = _f_##_attr_release, \
210
+
}
211
+
212
+
#define USB_ETHER_OPTS_ATTR_DEV_ADDR(_f_) \
213
+
static ssize_t _f_##_opts_dev_addr_show(struct config_item *item, \
214
+
char *page) \
215
+
{ \
216
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
217
+
\
218
+
guard(mutex)(&opts->lock); \
219
+
return sysfs_emit(page, "%pM\n", opts->net_opts.dev_mac); \
220
+
} \
221
+
\
222
+
static ssize_t _f_##_opts_dev_addr_store(struct config_item *item, \
223
+
const char *page, size_t len) \
224
+
{ \
225
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
226
+
u8 new_addr[ETH_ALEN]; \
227
+
const char *p = page; \
228
+
\
229
+
guard(mutex)(&opts->lock); \
230
+
if (opts->refcnt) \
231
+
return -EBUSY; \
232
+
\
233
+
for (int i = 0; i < ETH_ALEN; i++) { \
234
+
unsigned char num; \
235
+
if ((*p == '.') || (*p == ':')) \
236
+
p++; \
237
+
num = hex_to_bin(*p++) << 4; \
238
+
num |= hex_to_bin(*p++); \
239
+
new_addr[i] = num; \
240
+
} \
241
+
if (!is_valid_ether_addr(new_addr)) \
242
+
return -EINVAL; \
243
+
memcpy(opts->net_opts.dev_mac, new_addr, ETH_ALEN); \
244
+
opts->net_opts.addr_assign_type = NET_ADDR_SET; \
245
+
return len; \
246
+
} \
247
+
\
248
+
CONFIGFS_ATTR(_f_##_opts_, dev_addr)
249
+
250
+
#define USB_ETHER_OPTS_ATTR_HOST_ADDR(_f_) \
251
+
static ssize_t _f_##_opts_host_addr_show(struct config_item *item, \
252
+
char *page) \
253
+
{ \
254
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
255
+
\
256
+
guard(mutex)(&opts->lock); \
257
+
return sysfs_emit(page, "%pM\n", opts->net_opts.host_mac); \
258
+
} \
259
+
\
260
+
static ssize_t _f_##_opts_host_addr_store(struct config_item *item, \
261
+
const char *page, size_t len) \
262
+
{ \
263
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
264
+
u8 new_addr[ETH_ALEN]; \
265
+
const char *p = page; \
266
+
\
267
+
guard(mutex)(&opts->lock); \
268
+
if (opts->refcnt) \
269
+
return -EBUSY; \
270
+
\
271
+
for (int i = 0; i < ETH_ALEN; i++) { \
272
+
unsigned char num; \
273
+
if ((*p == '.') || (*p == ':')) \
274
+
p++; \
275
+
num = hex_to_bin(*p++) << 4; \
276
+
num |= hex_to_bin(*p++); \
277
+
new_addr[i] = num; \
278
+
} \
279
+
if (!is_valid_ether_addr(new_addr)) \
280
+
return -EINVAL; \
281
+
memcpy(opts->net_opts.host_mac, new_addr, ETH_ALEN); \
282
+
return len; \
283
+
} \
284
+
\
285
+
CONFIGFS_ATTR(_f_##_opts_, host_addr)
286
+
287
+
#define USB_ETHER_OPTS_ATTR_QMULT(_f_) \
288
+
static ssize_t _f_##_opts_qmult_show(struct config_item *item, \
289
+
char *page) \
290
+
{ \
291
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
292
+
\
293
+
guard(mutex)(&opts->lock); \
294
+
return sysfs_emit(page, "%u\n", opts->net_opts.qmult); \
295
+
} \
296
+
\
297
+
static ssize_t _f_##_opts_qmult_store(struct config_item *item, \
298
+
const char *page, size_t len) \
299
+
{ \
300
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
301
+
u32 val; \
302
+
int ret; \
303
+
\
304
+
guard(mutex)(&opts->lock); \
305
+
if (opts->refcnt) \
306
+
return -EBUSY; \
307
+
\
308
+
ret = kstrtou32(page, 0, &val); \
309
+
if (ret) \
310
+
return ret; \
311
+
\
312
+
opts->net_opts.qmult = val; \
313
+
return len; \
314
+
} \
315
+
\
316
+
CONFIGFS_ATTR(_f_##_opts_, qmult)
317
+
318
+
#define USB_ETHER_OPTS_ATTR_IFNAME(_f_) \
319
+
static ssize_t _f_##_opts_ifname_show(struct config_item *item, \
320
+
char *page) \
321
+
{ \
322
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
323
+
const char *name; \
324
+
\
325
+
guard(mutex)(&opts->lock); \
326
+
rtnl_lock(); \
327
+
if (opts->net_opts.ifname_set) \
328
+
name = opts->net_opts.name; \
329
+
else if (opts->net) \
330
+
name = netdev_name(opts->net); \
331
+
else \
332
+
name = "(inactive net_device)"; \
333
+
rtnl_unlock(); \
334
+
return sysfs_emit(page, "%s\n", name); \
335
+
} \
336
+
\
337
+
static ssize_t _f_##_opts_ifname_store(struct config_item *item, \
338
+
const char *page, size_t len) \
339
+
{ \
340
+
struct f_##_f_##_opts *opts = to_f_##_f_##_opts(item); \
341
+
char tmp[IFNAMSIZ]; \
342
+
const char *p; \
343
+
size_t c_len = len; \
344
+
\
345
+
if (c_len > 0 && page[c_len - 1] == '\n') \
346
+
c_len--; \
347
+
\
348
+
if (c_len >= sizeof(tmp)) \
349
+
return -E2BIG; \
350
+
\
351
+
strscpy(tmp, page, c_len + 1); \
352
+
if (!dev_valid_name(tmp)) \
353
+
return -EINVAL; \
354
+
\
355
+
/* Require exactly one %d */ \
356
+
p = strchr(tmp, '%'); \
357
+
if (!p || p[1] != 'd' || strchr(p + 2, '%')) \
358
+
return -EINVAL; \
359
+
\
360
+
guard(mutex)(&opts->lock); \
361
+
if (opts->refcnt) \
362
+
return -EBUSY; \
363
+
strscpy(opts->net_opts.name, tmp, sizeof(opts->net_opts.name)); \
364
+
opts->net_opts.ifname_set = true; \
365
+
return len; \
366
+
} \
367
+
\
368
+
CONFIGFS_ATTR(_f_##_opts_, ifname)
206
369
207
370
#endif /* __U_ETHER_CONFIGFS_H */
+1
-1
drivers/usb/gadget/function/u_midi.h
+1
-1
drivers/usb/gadget/function/u_midi.h
+3
-1
drivers/usb/gadget/function/u_ncm.h
+3
-1
drivers/usb/gadget/function/u_ncm.h
···
15
15
16
16
#include <linux/usb/composite.h>
17
17
18
+
#include "u_ether.h"
19
+
18
20
struct f_ncm_opts {
19
21
struct usb_function_instance func_inst;
20
22
struct net_device *net;
21
-
bool bound;
22
23
24
+
struct gether_opts net_opts;
23
25
struct config_group *ncm_interf_group;
24
26
struct usb_os_desc ncm_os_desc;
25
27
char ncm_ext_compat_id[16];
+18
-18
drivers/usb/gadget/function/uvc_configfs.c
+18
-18
drivers/usb/gadget/function/uvc_configfs.c
···
128
128
kfree(group);
129
129
}
130
130
131
-
static struct configfs_item_operations uvcg_config_item_ops = {
131
+
static const struct configfs_item_operations uvcg_config_item_ops = {
132
132
.release = uvcg_config_item_release,
133
133
};
134
134
···
285
285
return &h->item;
286
286
}
287
287
288
-
static struct configfs_group_operations uvcg_control_header_grp_ops = {
288
+
static const struct configfs_group_operations uvcg_control_header_grp_ops = {
289
289
.make_item = uvcg_control_header_make,
290
290
};
291
291
···
1233
1233
mutex_unlock(su_mutex);
1234
1234
}
1235
1235
1236
-
static struct configfs_item_operations uvcg_extension_item_ops = {
1236
+
static const struct configfs_item_operations uvcg_extension_item_ops = {
1237
1237
.release = uvcg_extension_release,
1238
1238
.allow_link = uvcg_extension_allow_link,
1239
1239
.drop_link = uvcg_extension_drop_link,
···
1298
1298
return &xu->item;
1299
1299
}
1300
1300
1301
-
static struct configfs_group_operations uvcg_extensions_grp_ops = {
1301
+
static const struct configfs_group_operations uvcg_extensions_grp_ops = {
1302
1302
.make_item = uvcg_extension_make,
1303
1303
.drop_item = uvcg_extension_drop,
1304
1304
};
···
1414
1414
mutex_unlock(su_mutex);
1415
1415
}
1416
1416
1417
-
static struct configfs_item_operations uvcg_control_class_item_ops = {
1417
+
static const struct configfs_item_operations uvcg_control_class_item_ops = {
1418
1418
.release = uvcg_config_item_release,
1419
1419
.allow_link = uvcg_control_class_allow_link,
1420
1420
.drop_link = uvcg_control_class_drop_link,
···
1664
1664
mutex_unlock(su_mutex);
1665
1665
}
1666
1666
1667
-
static struct configfs_item_operations uvcg_format_item_operations = {
1667
+
static const struct configfs_item_operations uvcg_format_item_operations = {
1668
1668
.release = uvcg_config_item_release,
1669
1669
.allow_link = uvcg_format_allow_link,
1670
1670
.drop_link = uvcg_format_drop_link,
···
1840
1840
mutex_unlock(su_mutex);
1841
1841
}
1842
1842
1843
-
static struct configfs_item_operations uvcg_streaming_header_item_ops = {
1843
+
static const struct configfs_item_operations uvcg_streaming_header_item_ops = {
1844
1844
.release = uvcg_config_item_release,
1845
1845
.allow_link = uvcg_streaming_header_allow_link,
1846
1846
.drop_link = uvcg_streaming_header_drop_link,
···
1914
1914
return &h->item;
1915
1915
}
1916
1916
1917
-
static struct configfs_group_operations uvcg_streaming_header_grp_ops = {
1917
+
static const struct configfs_group_operations uvcg_streaming_header_grp_ops = {
1918
1918
.make_item = uvcg_streaming_header_make,
1919
1919
};
1920
1920
···
2261
2261
* streaming/uncompressed/<NAME>
2262
2262
*/
2263
2263
2264
-
static struct configfs_group_operations uvcg_uncompressed_group_ops = {
2264
+
static const struct configfs_group_operations uvcg_uncompressed_group_ops = {
2265
2265
.make_item = uvcg_frame_make,
2266
2266
.drop_item = uvcg_frame_drop,
2267
2267
};
···
2508
2508
return &h->fmt.group;
2509
2509
}
2510
2510
2511
-
static struct configfs_group_operations uvcg_uncompressed_grp_ops = {
2511
+
static const struct configfs_group_operations uvcg_uncompressed_grp_ops = {
2512
2512
.make_group = uvcg_uncompressed_make,
2513
2513
};
2514
2514
···
2525
2525
* streaming/mjpeg/<NAME>
2526
2526
*/
2527
2527
2528
-
static struct configfs_group_operations uvcg_mjpeg_group_ops = {
2528
+
static const struct configfs_group_operations uvcg_mjpeg_group_ops = {
2529
2529
.make_item = uvcg_frame_make,
2530
2530
.drop_item = uvcg_frame_drop,
2531
2531
};
···
2698
2698
return &h->fmt.group;
2699
2699
}
2700
2700
2701
-
static struct configfs_group_operations uvcg_mjpeg_grp_ops = {
2701
+
static const struct configfs_group_operations uvcg_mjpeg_grp_ops = {
2702
2702
.make_group = uvcg_mjpeg_make,
2703
2703
};
2704
2704
···
2715
2715
* streaming/framebased/<NAME>
2716
2716
*/
2717
2717
2718
-
static struct configfs_group_operations uvcg_framebased_group_ops = {
2718
+
static const struct configfs_group_operations uvcg_framebased_group_ops = {
2719
2719
.make_item = uvcg_frame_make,
2720
2720
.drop_item = uvcg_frame_drop,
2721
2721
};
···
2953
2953
return &h->fmt.group;
2954
2954
}
2955
2955
2956
-
static struct configfs_group_operations uvcg_framebased_grp_ops = {
2956
+
static const struct configfs_group_operations uvcg_framebased_grp_ops = {
2957
2957
.make_group = uvcg_framebased_make,
2958
2958
};
2959
2959
···
3056
3056
kfree(color_match);
3057
3057
}
3058
3058
3059
-
static struct configfs_item_operations uvcg_color_matching_item_ops = {
3059
+
static const struct configfs_item_operations uvcg_color_matching_item_ops = {
3060
3060
.release = uvcg_color_matching_release,
3061
3061
};
3062
3062
···
3089
3089
return &color_match->group;
3090
3090
}
3091
3091
3092
-
static struct configfs_group_operations uvcg_color_matching_grp_group_ops = {
3092
+
static const struct configfs_group_operations uvcg_color_matching_grp_group_ops = {
3093
3093
.make_group = uvcg_color_matching_make,
3094
3094
};
3095
3095
···
3530
3530
mutex_unlock(su_mutex);
3531
3531
}
3532
3532
3533
-
static struct configfs_item_operations uvcg_streaming_class_item_ops = {
3533
+
static const struct configfs_item_operations uvcg_streaming_class_item_ops = {
3534
3534
.release = uvcg_config_item_release,
3535
3535
.allow_link = uvcg_streaming_class_allow_link,
3536
3536
.drop_link = uvcg_streaming_class_drop_link,
···
3698
3698
mutex_unlock(&opts->lock);
3699
3699
}
3700
3700
3701
-
static struct configfs_item_operations uvc_func_item_ops = {
3701
+
static const struct configfs_item_operations uvc_func_item_ops = {
3702
3702
.release = uvc_func_item_release,
3703
3703
.allow_link = uvc_func_allow_link,
3704
3704
.drop_link = uvc_func_drop_link,
+30
drivers/usb/gadget/udc/aspeed-vhub/core.c
+30
drivers/usb/gadget/udc/aspeed-vhub/core.c
···
23
23
#include <linux/of.h>
24
24
#include <linux/regmap.h>
25
25
#include <linux/dma-mapping.h>
26
+
#include <linux/reset.h>
26
27
27
28
#include "vhub.h"
28
29
···
281
280
if (vhub->clk)
282
281
clk_disable_unprepare(vhub->clk);
283
282
283
+
reset_control_assert(vhub->rst);
284
+
284
285
spin_unlock_irqrestore(&vhub->lock, flags);
285
286
286
287
if (vhub->ep0_bufs)
···
297
294
static int ast_vhub_probe(struct platform_device *pdev)
298
295
{
299
296
enum usb_device_speed max_speed;
297
+
const u64 *dma_mask_ptr;
300
298
struct ast_vhub *vhub;
301
299
struct resource *res;
302
300
int i, rc = 0;
···
352
348
goto err;
353
349
}
354
350
351
+
vhub->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
352
+
if (IS_ERR(vhub->rst)) {
353
+
rc = PTR_ERR(vhub->rst);
354
+
goto err;
355
+
}
356
+
357
+
rc = reset_control_deassert(vhub->rst);
358
+
if (rc)
359
+
goto err;
360
+
355
361
/* Check if we need to limit the HW to USB1 */
356
362
max_speed = usb_get_maximum_speed(&pdev->dev);
357
363
if (max_speed != USB_SPEED_UNKNOWN && max_speed < USB_SPEED_HIGH)
···
384
370
goto err;
385
371
}
386
372
373
+
dma_mask_ptr = (u64 *)of_device_get_match_data(&pdev->dev);
374
+
if (dma_mask_ptr) {
375
+
rc = dma_coerce_mask_and_coherent(&pdev->dev, *dma_mask_ptr);
376
+
if (rc)
377
+
goto err;
378
+
}
387
379
/*
388
380
* Allocate DMA buffers for all EP0s in one chunk,
389
381
* one per port and one for the vHub itself
···
432
412
return rc;
433
413
}
434
414
415
+
static const u64 dma_mask_32 = DMA_BIT_MASK(32);
416
+
static const u64 dma_mask_64 = DMA_BIT_MASK(64);
417
+
435
418
static const struct of_device_id ast_vhub_dt_ids[] = {
436
419
{
437
420
.compatible = "aspeed,ast2400-usb-vhub",
421
+
.data = &dma_mask_32,
438
422
},
439
423
{
440
424
.compatible = "aspeed,ast2500-usb-vhub",
425
+
.data = &dma_mask_32,
441
426
},
442
427
{
443
428
.compatible = "aspeed,ast2600-usb-vhub",
429
+
.data = &dma_mask_32,
430
+
},
431
+
{
432
+
.compatible = "aspeed,ast2700-usb-vhub",
433
+
.data = &dma_mask_64,
444
434
},
445
435
{ }
446
436
};
+1
drivers/usb/gadget/udc/aspeed-vhub/vhub.h
+1
drivers/usb/gadget/udc/aspeed-vhub/vhub.h
+2
-2
drivers/usb/gadget/udc/bdc/bdc_core.c
+2
-2
drivers/usb/gadget/udc/bdc/bdc_core.c
···
35
35
u32 status;
36
36
int ret;
37
37
38
-
ret = readl_poll_timeout(bdc->regs + BDC_BDCSC, status,
39
-
(BDC_CSTS(status) != BDC_OIP), 10, usec);
38
+
ret = readl_poll_timeout_atomic(bdc->regs + BDC_BDCSC, status,
39
+
(BDC_CSTS(status) != BDC_OIP), 10, usec);
40
40
if (ret)
41
41
dev_err(bdc->dev, "operation timedout BDCSC: 0x%08x\n", status);
42
42
else
+9
-3
drivers/usb/gadget/udc/tegra-xudc.c
+9
-3
drivers/usb/gadget/udc/tegra-xudc.c
···
3392
3392
{
3393
3393
u32 val, imod;
3394
3394
3395
+
val = xudc_readl(xudc, BLCG);
3395
3396
if (xudc->soc->has_ipfs) {
3396
-
val = xudc_readl(xudc, BLCG);
3397
3397
val |= BLCG_ALL;
3398
3398
val &= ~(BLCG_DFPCI | BLCG_UFPCI | BLCG_FE |
3399
3399
BLCG_COREPLL_PWRDN);
3400
3400
val |= BLCG_IOPLL_0_PWRDN;
3401
3401
val |= BLCG_IOPLL_1_PWRDN;
3402
3402
val |= BLCG_IOPLL_2_PWRDN;
3403
-
3404
-
xudc_writel(xudc, val, BLCG);
3403
+
} else {
3404
+
val &= ~BLCG_COREPLL_PWRDN;
3405
3405
}
3406
+
xudc_writel(xudc, val, BLCG);
3406
3407
3407
3408
if (xudc->soc->port_speed_quirk)
3408
3409
tegra_xudc_limit_port_speed(xudc);
···
3954
3953
static int __maybe_unused tegra_xudc_powergate(struct tegra_xudc *xudc)
3955
3954
{
3956
3955
unsigned long flags;
3956
+
u32 val;
3957
3957
3958
3958
dev_dbg(xudc->dev, "entering ELPG\n");
3959
3959
···
3966
3964
xudc_writel(xudc, 0, CTRL);
3967
3965
3968
3966
spin_unlock_irqrestore(&xudc->lock, flags);
3967
+
3968
+
val = xudc_readl(xudc, BLCG);
3969
+
val |= BLCG_COREPLL_PWRDN;
3970
+
xudc_writel(xudc, val, BLCG);
3969
3971
3970
3972
clk_bulk_disable_unprepare(xudc->soc->num_clks, xudc->clks);
3971
3973
+1
-13
drivers/usb/host/Kconfig
+1
-13
drivers/usb/host/Kconfig
···
383
383
To compile this driver as a module, choose M here: the
384
384
module will be called isp116x-hcd.
385
385
386
-
config USB_ISP1362_HCD
387
-
tristate "ISP1362 HCD support"
388
-
depends on HAS_IOPORT
389
-
depends on COMPILE_TEST # nothing uses this
390
-
help
391
-
Supports the Philips ISP1362 chip as a host controller
392
-
393
-
This driver does not support isochronous transfers.
394
-
395
-
To compile this driver as a module, choose M here: the
396
-
module will be called isp1362-hcd.
397
-
398
386
config USB_MAX3421_HCD
399
387
tristate "MAX3421 HCD (USB-over-SPI) support"
400
388
depends on USB && SPI
···
604
616
605
617
config USB_FHCI_HCD
606
618
tristate "Freescale QE USB Host Controller support"
607
-
depends on OF_GPIO && QE_GPIO && QUICC_ENGINE
619
+
depends on QE_GPIO && QUICC_ENGINE
608
620
select FSL_GTM
609
621
select QE_USB
610
622
help
-1
drivers/usb/host/Makefile
-1
drivers/usb/host/Makefile
-8
drivers/usb/host/ehci-hcd.c
-8
drivers/usb/host/ehci-hcd.c
···
1354
1354
if (usb_disabled())
1355
1355
return -ENODEV;
1356
1356
1357
-
set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1358
-
if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1359
-
test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1360
-
printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1361
-
" before uhci_hcd and ohci_hcd, not after\n");
1362
-
1363
1357
pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1364
1358
hcd_name,
1365
1359
sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
···
1384
1390
debugfs_remove(ehci_debug_root);
1385
1391
ehci_debug_root = NULL;
1386
1392
#endif
1387
-
clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1388
1393
return retval;
1389
1394
}
1390
1395
module_init(ehci_hcd_init);
···
1397
1404
#ifdef CONFIG_DYNAMIC_DEBUG
1398
1405
debugfs_remove(ehci_debug_root);
1399
1406
#endif
1400
-
clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1401
1407
}
1402
1408
module_exit(ehci_hcd_cleanup);
-2769
drivers/usb/host/isp1362-hcd.c
-2769
drivers/usb/host/isp1362-hcd.c
···
1
-
// SPDX-License-Identifier: GPL-2.0
2
-
/*
3
-
* ISP1362 HCD (Host Controller Driver) for USB.
4
-
*
5
-
* Copyright (C) 2005 Lothar Wassmann <LW@KARO-electronics.de>
6
-
*
7
-
* Derived from the SL811 HCD, rewritten for ISP116x.
8
-
* Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
9
-
*
10
-
* Portions:
11
-
* Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
12
-
* Copyright (C) 2004 David Brownell
13
-
*/
14
-
15
-
/*
16
-
* The ISP1362 chip requires a large delay (300ns and 462ns) between
17
-
* accesses to the address and data register.
18
-
* The following timing options exist:
19
-
*
20
-
* 1. Configure your memory controller to add such delays if it can (the best)
21
-
* 2. Implement platform-specific delay function possibly
22
-
* combined with configuring the memory controller; see
23
-
* include/linux/usb_isp1362.h for more info.
24
-
* 3. Use ndelay (easiest, poorest).
25
-
*
26
-
* Use the corresponding macros USE_PLATFORM_DELAY and USE_NDELAY in the
27
-
* platform specific section of isp1362.h to select the appropriate variant.
28
-
*
29
-
* Also note that according to the Philips "ISP1362 Errata" document
30
-
* Rev 1.00 from 27 May data corruption may occur when the #WR signal
31
-
* is reasserted (even with #CS deasserted) within 132ns after a
32
-
* write cycle to any controller register. If the hardware doesn't
33
-
* implement the recommended fix (gating the #WR with #CS) software
34
-
* must ensure that no further write cycle (not necessarily to the chip!)
35
-
* is issued by the CPU within this interval.
36
-
37
-
* For PXA25x this can be ensured by using VLIO with the maximum
38
-
* recovery time (MSCx = 0x7f8c) with a memory clock of 99.53 MHz.
39
-
*/
40
-
41
-
#undef ISP1362_DEBUG
42
-
43
-
/*
44
-
* The PXA255 UDC apparently doesn't handle GET_STATUS, GET_CONFIG and
45
-
* GET_INTERFACE requests correctly when the SETUP and DATA stages of the
46
-
* requests are carried out in separate frames. This will delay any SETUP
47
-
* packets until the start of the next frame so that this situation is
48
-
* unlikely to occur (and makes usbtest happy running with a PXA255 target
49
-
* device).
50
-
*/
51
-
#undef BUGGY_PXA2XX_UDC_USBTEST
52
-
53
-
#undef PTD_TRACE
54
-
#undef URB_TRACE
55
-
#undef VERBOSE
56
-
#undef REGISTERS
57
-
58
-
/* This enables a memory test on the ISP1362 chip memory to make sure the
59
-
* chip access timing is correct.
60
-
*/
61
-
#undef CHIP_BUFFER_TEST
62
-
63
-
#include <linux/module.h>
64
-
#include <linux/moduleparam.h>
65
-
#include <linux/kernel.h>
66
-
#include <linux/delay.h>
67
-
#include <linux/ioport.h>
68
-
#include <linux/sched.h>
69
-
#include <linux/slab.h>
70
-
#include <linux/errno.h>
71
-
#include <linux/list.h>
72
-
#include <linux/interrupt.h>
73
-
#include <linux/usb.h>
74
-
#include <linux/usb/isp1362.h>
75
-
#include <linux/usb/hcd.h>
76
-
#include <linux/platform_device.h>
77
-
#include <linux/pm.h>
78
-
#include <linux/io.h>
79
-
#include <linux/bitmap.h>
80
-
#include <linux/prefetch.h>
81
-
#include <linux/debugfs.h>
82
-
#include <linux/seq_file.h>
83
-
84
-
#include <asm/irq.h>
85
-
#include <asm/byteorder.h>
86
-
#include <linux/unaligned.h>
87
-
88
-
static int dbg_level;
89
-
#ifdef ISP1362_DEBUG
90
-
module_param(dbg_level, int, 0644);
91
-
#else
92
-
module_param(dbg_level, int, 0);
93
-
#endif
94
-
95
-
#include "../core/usb.h"
96
-
#include "isp1362.h"
97
-
98
-
99
-
#define DRIVER_VERSION "2005-04-04"
100
-
#define DRIVER_DESC "ISP1362 USB Host Controller Driver"
101
-
102
-
MODULE_DESCRIPTION(DRIVER_DESC);
103
-
MODULE_LICENSE("GPL");
104
-
105
-
static const char hcd_name[] = "isp1362-hcd";
106
-
107
-
static void isp1362_hc_stop(struct usb_hcd *hcd);
108
-
static int isp1362_hc_start(struct usb_hcd *hcd);
109
-
110
-
/*-------------------------------------------------------------------------*/
111
-
112
-
/*
113
-
* When called from the interrupthandler only isp1362_hcd->irqenb is modified,
114
-
* since the interrupt handler will write isp1362_hcd->irqenb to HCuPINT upon
115
-
* completion.
116
-
* We don't need a 'disable' counterpart, since interrupts will be disabled
117
-
* only by the interrupt handler.
118
-
*/
119
-
static inline void isp1362_enable_int(struct isp1362_hcd *isp1362_hcd, u16 mask)
120
-
{
121
-
if ((isp1362_hcd->irqenb | mask) == isp1362_hcd->irqenb)
122
-
return;
123
-
if (mask & ~isp1362_hcd->irqenb)
124
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, mask & ~isp1362_hcd->irqenb);
125
-
isp1362_hcd->irqenb |= mask;
126
-
if (isp1362_hcd->irq_active)
127
-
return;
128
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
129
-
}
130
-
131
-
/*-------------------------------------------------------------------------*/
132
-
133
-
static inline struct isp1362_ep_queue *get_ptd_queue(struct isp1362_hcd *isp1362_hcd,
134
-
u16 offset)
135
-
{
136
-
struct isp1362_ep_queue *epq = NULL;
137
-
138
-
if (offset < isp1362_hcd->istl_queue[1].buf_start)
139
-
epq = &isp1362_hcd->istl_queue[0];
140
-
else if (offset < isp1362_hcd->intl_queue.buf_start)
141
-
epq = &isp1362_hcd->istl_queue[1];
142
-
else if (offset < isp1362_hcd->atl_queue.buf_start)
143
-
epq = &isp1362_hcd->intl_queue;
144
-
else if (offset < isp1362_hcd->atl_queue.buf_start +
145
-
isp1362_hcd->atl_queue.buf_size)
146
-
epq = &isp1362_hcd->atl_queue;
147
-
148
-
if (epq)
149
-
DBG(1, "%s: PTD $%04x is on %s queue\n", __func__, offset, epq->name);
150
-
else
151
-
pr_warn("%s: invalid PTD $%04x\n", __func__, offset);
152
-
153
-
return epq;
154
-
}
155
-
156
-
static inline int get_ptd_offset(struct isp1362_ep_queue *epq, u8 index)
157
-
{
158
-
int offset;
159
-
160
-
if (index * epq->blk_size > epq->buf_size) {
161
-
pr_warn("%s: Bad %s index %d(%d)\n",
162
-
__func__, epq->name, index,
163
-
epq->buf_size / epq->blk_size);
164
-
return -EINVAL;
165
-
}
166
-
offset = epq->buf_start + index * epq->blk_size;
167
-
DBG(3, "%s: %s PTD[%02x] # %04x\n", __func__, epq->name, index, offset);
168
-
169
-
return offset;
170
-
}
171
-
172
-
/*-------------------------------------------------------------------------*/
173
-
174
-
static inline u16 max_transfer_size(struct isp1362_ep_queue *epq, size_t size,
175
-
int mps)
176
-
{
177
-
u16 xfer_size = min_t(size_t, MAX_XFER_SIZE, size);
178
-
179
-
xfer_size = min_t(size_t, xfer_size, epq->buf_avail * epq->blk_size - PTD_HEADER_SIZE);
180
-
if (xfer_size < size && xfer_size % mps)
181
-
xfer_size -= xfer_size % mps;
182
-
183
-
return xfer_size;
184
-
}
185
-
186
-
static int claim_ptd_buffers(struct isp1362_ep_queue *epq,
187
-
struct isp1362_ep *ep, u16 len)
188
-
{
189
-
int ptd_offset = -EINVAL;
190
-
int num_ptds = ((len + PTD_HEADER_SIZE - 1) / epq->blk_size) + 1;
191
-
int found;
192
-
193
-
BUG_ON(len > epq->buf_size);
194
-
195
-
if (!epq->buf_avail)
196
-
return -ENOMEM;
197
-
198
-
if (ep->num_ptds)
199
-
pr_err("%s: %s len %d/%d num_ptds %d buf_map %08lx skip_map %08lx\n", __func__,
200
-
epq->name, len, epq->blk_size, num_ptds, epq->buf_map, epq->skip_map);
201
-
BUG_ON(ep->num_ptds != 0);
202
-
203
-
found = bitmap_find_next_zero_area(&epq->buf_map, epq->buf_count, 0,
204
-
num_ptds, 0);
205
-
if (found >= epq->buf_count)
206
-
return -EOVERFLOW;
207
-
208
-
DBG(1, "%s: Found %d PTDs[%d] for %d/%d byte\n", __func__,
209
-
num_ptds, found, len, (int)(epq->blk_size - PTD_HEADER_SIZE));
210
-
ptd_offset = get_ptd_offset(epq, found);
211
-
WARN_ON(ptd_offset < 0);
212
-
ep->ptd_offset = ptd_offset;
213
-
ep->num_ptds += num_ptds;
214
-
epq->buf_avail -= num_ptds;
215
-
BUG_ON(epq->buf_avail > epq->buf_count);
216
-
ep->ptd_index = found;
217
-
bitmap_set(&epq->buf_map, found, num_ptds);
218
-
DBG(1, "%s: Done %s PTD[%d] $%04x, avail %d count %d claimed %d %08lx:%08lx\n",
219
-
__func__, epq->name, ep->ptd_index, ep->ptd_offset,
220
-
epq->buf_avail, epq->buf_count, num_ptds, epq->buf_map, epq->skip_map);
221
-
222
-
return found;
223
-
}
224
-
225
-
static inline void release_ptd_buffers(struct isp1362_ep_queue *epq, struct isp1362_ep *ep)
226
-
{
227
-
int last = ep->ptd_index + ep->num_ptds;
228
-
229
-
if (last > epq->buf_count)
230
-
pr_err("%s: ep %p req %d len %d %s PTD[%d] $%04x num_ptds %d buf_count %d buf_avail %d buf_map %08lx skip_map %08lx\n",
231
-
__func__, ep, ep->num_req, ep->length, epq->name, ep->ptd_index,
232
-
ep->ptd_offset, ep->num_ptds, epq->buf_count, epq->buf_avail,
233
-
epq->buf_map, epq->skip_map);
234
-
BUG_ON(last > epq->buf_count);
235
-
236
-
bitmap_clear(&epq->buf_map, ep->ptd_index, ep->num_ptds);
237
-
bitmap_set(&epq->skip_map, ep->ptd_index, ep->num_ptds);
238
-
epq->buf_avail += ep->num_ptds;
239
-
epq->ptd_count--;
240
-
241
-
BUG_ON(epq->buf_avail > epq->buf_count);
242
-
BUG_ON(epq->ptd_count > epq->buf_count);
243
-
244
-
DBG(1, "%s: Done %s PTDs $%04x released %d avail %d count %d\n",
245
-
__func__, epq->name,
246
-
ep->ptd_offset, ep->num_ptds, epq->buf_avail, epq->buf_count);
247
-
DBG(1, "%s: buf_map %08lx skip_map %08lx\n", __func__,
248
-
epq->buf_map, epq->skip_map);
249
-
250
-
ep->num_ptds = 0;
251
-
ep->ptd_offset = -EINVAL;
252
-
ep->ptd_index = -EINVAL;
253
-
}
254
-
255
-
/*-------------------------------------------------------------------------*/
256
-
257
-
/*
258
-
Set up PTD's.
259
-
*/
260
-
static void prepare_ptd(struct isp1362_hcd *isp1362_hcd, struct urb *urb,
261
-
struct isp1362_ep *ep, struct isp1362_ep_queue *epq,
262
-
u16 fno)
263
-
{
264
-
struct ptd *ptd;
265
-
int toggle;
266
-
int dir;
267
-
u16 len;
268
-
size_t buf_len = urb->transfer_buffer_length - urb->actual_length;
269
-
270
-
DBG(3, "%s: %s ep %p\n", __func__, epq->name, ep);
271
-
272
-
ptd = &ep->ptd;
273
-
274
-
ep->data = (unsigned char *)urb->transfer_buffer + urb->actual_length;
275
-
276
-
switch (ep->nextpid) {
277
-
case USB_PID_IN:
278
-
toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
279
-
dir = PTD_DIR_IN;
280
-
if (usb_pipecontrol(urb->pipe)) {
281
-
len = min_t(size_t, ep->maxpacket, buf_len);
282
-
} else if (usb_pipeisoc(urb->pipe)) {
283
-
len = min_t(size_t, urb->iso_frame_desc[fno].length, MAX_XFER_SIZE);
284
-
ep->data = urb->transfer_buffer + urb->iso_frame_desc[fno].offset;
285
-
} else
286
-
len = max_transfer_size(epq, buf_len, ep->maxpacket);
287
-
DBG(1, "%s: IN len %d/%d/%d from URB\n", __func__, len, ep->maxpacket,
288
-
(int)buf_len);
289
-
break;
290
-
case USB_PID_OUT:
291
-
toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
292
-
dir = PTD_DIR_OUT;
293
-
if (usb_pipecontrol(urb->pipe))
294
-
len = min_t(size_t, ep->maxpacket, buf_len);
295
-
else if (usb_pipeisoc(urb->pipe))
296
-
len = min_t(size_t, urb->iso_frame_desc[0].length, MAX_XFER_SIZE);
297
-
else
298
-
len = max_transfer_size(epq, buf_len, ep->maxpacket);
299
-
if (len == 0)
300
-
pr_info("%s: Sending ZERO packet: %d\n", __func__,
301
-
urb->transfer_flags & URB_ZERO_PACKET);
302
-
DBG(1, "%s: OUT len %d/%d/%d from URB\n", __func__, len, ep->maxpacket,
303
-
(int)buf_len);
304
-
break;
305
-
case USB_PID_SETUP:
306
-
toggle = 0;
307
-
dir = PTD_DIR_SETUP;
308
-
len = sizeof(struct usb_ctrlrequest);
309
-
DBG(1, "%s: SETUP len %d\n", __func__, len);
310
-
ep->data = urb->setup_packet;
311
-
break;
312
-
case USB_PID_ACK:
313
-
toggle = 1;
314
-
len = 0;
315
-
dir = (urb->transfer_buffer_length && usb_pipein(urb->pipe)) ?
316
-
PTD_DIR_OUT : PTD_DIR_IN;
317
-
DBG(1, "%s: ACK len %d\n", __func__, len);
318
-
break;
319
-
default:
320
-
toggle = dir = len = 0;
321
-
pr_err("%s@%d: ep->nextpid %02x\n", __func__, __LINE__, ep->nextpid);
322
-
BUG_ON(1);
323
-
}
324
-
325
-
ep->length = len;
326
-
if (!len)
327
-
ep->data = NULL;
328
-
329
-
ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
330
-
ptd->mps = PTD_MPS(ep->maxpacket) | PTD_SPD(urb->dev->speed == USB_SPEED_LOW) |
331
-
PTD_EP(ep->epnum);
332
-
ptd->len = PTD_LEN(len) | PTD_DIR(dir);
333
-
ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
334
-
335
-
if (usb_pipeint(urb->pipe)) {
336
-
ptd->faddr |= PTD_SF_INT(ep->branch);
337
-
ptd->faddr |= PTD_PR(ep->interval ? __ffs(ep->interval) : 0);
338
-
}
339
-
if (usb_pipeisoc(urb->pipe))
340
-
ptd->faddr |= PTD_SF_ISO(fno);
341
-
342
-
DBG(1, "%s: Finished\n", __func__);
343
-
}
344
-
345
-
static void isp1362_write_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
346
-
struct isp1362_ep_queue *epq)
347
-
{
348
-
struct ptd *ptd = &ep->ptd;
349
-
int len = PTD_GET_DIR(ptd) == PTD_DIR_IN ? 0 : ep->length;
350
-
351
-
prefetch(ptd);
352
-
isp1362_write_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE);
353
-
if (len)
354
-
isp1362_write_buffer(isp1362_hcd, ep->data,
355
-
ep->ptd_offset + PTD_HEADER_SIZE, len);
356
-
357
-
dump_ptd(ptd);
358
-
dump_ptd_out_data(ptd, ep->data);
359
-
}
360
-
361
-
static void isp1362_read_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
362
-
struct isp1362_ep_queue *epq)
363
-
{
364
-
struct ptd *ptd = &ep->ptd;
365
-
int act_len;
366
-
367
-
WARN_ON(list_empty(&ep->active));
368
-
BUG_ON(ep->ptd_offset < 0);
369
-
370
-
list_del_init(&ep->active);
371
-
DBG(1, "%s: ep %p removed from active list %p\n", __func__, ep, &epq->active);
372
-
373
-
prefetchw(ptd);
374
-
isp1362_read_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE);
375
-
dump_ptd(ptd);
376
-
act_len = PTD_GET_COUNT(ptd);
377
-
if (PTD_GET_DIR(ptd) != PTD_DIR_IN || act_len == 0)
378
-
return;
379
-
if (act_len > ep->length)
380
-
pr_err("%s: ep %p PTD $%04x act_len %d ep->length %d\n", __func__, ep,
381
-
ep->ptd_offset, act_len, ep->length);
382
-
BUG_ON(act_len > ep->length);
383
-
/* Only transfer the amount of data that has actually been overwritten
384
-
* in the chip buffer. We don't want any data that doesn't belong to the
385
-
* transfer to leak out of the chip to the callers transfer buffer!
386
-
*/
387
-
prefetchw(ep->data);
388
-
isp1362_read_buffer(isp1362_hcd, ep->data,
389
-
ep->ptd_offset + PTD_HEADER_SIZE, act_len);
390
-
dump_ptd_in_data(ptd, ep->data);
391
-
}
392
-
393
-
/*
394
-
* INT PTDs will stay in the chip until data is available.
395
-
* This function will remove a PTD from the chip when the URB is dequeued.
396
-
* Must be called with the spinlock held and IRQs disabled
397
-
*/
398
-
static void remove_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep)
399
-
400
-
{
401
-
int index;
402
-
struct isp1362_ep_queue *epq;
403
-
404
-
DBG(1, "%s: ep %p PTD[%d] $%04x\n", __func__, ep, ep->ptd_index, ep->ptd_offset);
405
-
BUG_ON(ep->ptd_offset < 0);
406
-
407
-
epq = get_ptd_queue(isp1362_hcd, ep->ptd_offset);
408
-
BUG_ON(!epq);
409
-
410
-
/* put ep in remove_list for cleanup */
411
-
WARN_ON(!list_empty(&ep->remove_list));
412
-
list_add_tail(&ep->remove_list, &isp1362_hcd->remove_list);
413
-
/* let SOF interrupt handle the cleanup */
414
-
isp1362_enable_int(isp1362_hcd, HCuPINT_SOF);
415
-
416
-
index = ep->ptd_index;
417
-
if (index < 0)
418
-
/* ISO queues don't have SKIP registers */
419
-
return;
420
-
421
-
DBG(1, "%s: Disabling PTD[%02x] $%04x %08lx|%08x\n", __func__,
422
-
index, ep->ptd_offset, epq->skip_map, 1 << index);
423
-
424
-
/* prevent further processing of PTD (will be effective after next SOF) */
425
-
epq->skip_map |= 1 << index;
426
-
if (epq == &isp1362_hcd->atl_queue) {
427
-
DBG(2, "%s: ATLSKIP = %08x -> %08lx\n", __func__,
428
-
isp1362_read_reg32(isp1362_hcd, HCATLSKIP), epq->skip_map);
429
-
isp1362_write_reg32(isp1362_hcd, HCATLSKIP, epq->skip_map);
430
-
if (~epq->skip_map == 0)
431
-
isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
432
-
} else if (epq == &isp1362_hcd->intl_queue) {
433
-
DBG(2, "%s: INTLSKIP = %08x -> %08lx\n", __func__,
434
-
isp1362_read_reg32(isp1362_hcd, HCINTLSKIP), epq->skip_map);
435
-
isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, epq->skip_map);
436
-
if (~epq->skip_map == 0)
437
-
isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
438
-
}
439
-
}
440
-
441
-
/*
442
-
Take done or failed requests out of schedule. Give back
443
-
processed urbs.
444
-
*/
445
-
static void finish_request(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
446
-
struct urb *urb, int status)
447
-
__releases(isp1362_hcd->lock)
448
-
__acquires(isp1362_hcd->lock)
449
-
{
450
-
urb->hcpriv = NULL;
451
-
ep->error_count = 0;
452
-
453
-
if (usb_pipecontrol(urb->pipe))
454
-
ep->nextpid = USB_PID_SETUP;
455
-
456
-
URB_DBG("%s: req %d FA %d ep%d%s %s: len %d/%d %s stat %d\n", __func__,
457
-
ep->num_req, usb_pipedevice(urb->pipe),
458
-
usb_pipeendpoint(urb->pipe),
459
-
!usb_pipein(urb->pipe) ? "out" : "in",
460
-
usb_pipecontrol(urb->pipe) ? "ctrl" :
461
-
usb_pipeint(urb->pipe) ? "int" :
462
-
usb_pipebulk(urb->pipe) ? "bulk" :
463
-
"iso",
464
-
urb->actual_length, urb->transfer_buffer_length,
465
-
!(urb->transfer_flags & URB_SHORT_NOT_OK) ?
466
-
"short_ok" : "", urb->status);
467
-
468
-
469
-
usb_hcd_unlink_urb_from_ep(isp1362_hcd_to_hcd(isp1362_hcd), urb);
470
-
spin_unlock(&isp1362_hcd->lock);
471
-
usb_hcd_giveback_urb(isp1362_hcd_to_hcd(isp1362_hcd), urb, status);
472
-
spin_lock(&isp1362_hcd->lock);
473
-
474
-
/* take idle endpoints out of the schedule right away */
475
-
if (!list_empty(&ep->hep->urb_list))
476
-
return;
477
-
478
-
/* async deschedule */
479
-
if (!list_empty(&ep->schedule)) {
480
-
list_del_init(&ep->schedule);
481
-
return;
482
-
}
483
-
484
-
485
-
if (ep->interval) {
486
-
/* periodic deschedule */
487
-
DBG(1, "deschedule qh%d/%p branch %d load %d bandwidth %d -> %d\n", ep->interval,
488
-
ep, ep->branch, ep->load,
489
-
isp1362_hcd->load[ep->branch],
490
-
isp1362_hcd->load[ep->branch] - ep->load);
491
-
isp1362_hcd->load[ep->branch] -= ep->load;
492
-
ep->branch = PERIODIC_SIZE;
493
-
}
494
-
}
495
-
496
-
/*
497
-
* Analyze transfer results, handle partial transfers and errors
498
-
*/
499
-
static void postproc_ep(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep)
500
-
{
501
-
struct urb *urb = get_urb(ep);
502
-
struct usb_device *udev;
503
-
struct ptd *ptd;
504
-
int short_ok;
505
-
u16 len;
506
-
int urbstat = -EINPROGRESS;
507
-
u8 cc;
508
-
509
-
DBG(2, "%s: ep %p req %d\n", __func__, ep, ep->num_req);
510
-
511
-
udev = urb->dev;
512
-
ptd = &ep->ptd;
513
-
cc = PTD_GET_CC(ptd);
514
-
if (cc == PTD_NOTACCESSED) {
515
-
pr_err("%s: req %d PTD %p Untouched by ISP1362\n", __func__,
516
-
ep->num_req, ptd);
517
-
cc = PTD_DEVNOTRESP;
518
-
}
519
-
520
-
short_ok = !(urb->transfer_flags & URB_SHORT_NOT_OK);
521
-
len = urb->transfer_buffer_length - urb->actual_length;
522
-
523
-
/* Data underrun is special. For allowed underrun
524
-
we clear the error and continue as normal. For
525
-
forbidden underrun we finish the DATA stage
526
-
immediately while for control transfer,
527
-
we do a STATUS stage.
528
-
*/
529
-
if (cc == PTD_DATAUNDERRUN) {
530
-
if (short_ok) {
531
-
DBG(1, "%s: req %d Allowed data underrun short_%sok %d/%d/%d byte\n",
532
-
__func__, ep->num_req, short_ok ? "" : "not_",
533
-
PTD_GET_COUNT(ptd), ep->maxpacket, len);
534
-
cc = PTD_CC_NOERROR;
535
-
urbstat = 0;
536
-
} else {
537
-
DBG(1, "%s: req %d Data Underrun %s nextpid %02x short_%sok %d/%d/%d byte\n",
538
-
__func__, ep->num_req,
539
-
usb_pipein(urb->pipe) ? "IN" : "OUT", ep->nextpid,
540
-
short_ok ? "" : "not_",
541
-
PTD_GET_COUNT(ptd), ep->maxpacket, len);
542
-
/* save the data underrun error code for later and
543
-
* proceed with the status stage
544
-
*/
545
-
urb->actual_length += PTD_GET_COUNT(ptd);
546
-
if (usb_pipecontrol(urb->pipe)) {
547
-
ep->nextpid = USB_PID_ACK;
548
-
BUG_ON(urb->actual_length > urb->transfer_buffer_length);
549
-
550
-
if (urb->status == -EINPROGRESS)
551
-
urb->status = cc_to_error[PTD_DATAUNDERRUN];
552
-
} else {
553
-
usb_settoggle(udev, ep->epnum, ep->nextpid == USB_PID_OUT,
554
-
PTD_GET_TOGGLE(ptd));
555
-
urbstat = cc_to_error[PTD_DATAUNDERRUN];
556
-
}
557
-
goto out;
558
-
}
559
-
}
560
-
561
-
if (cc != PTD_CC_NOERROR) {
562
-
if (++ep->error_count >= 3 || cc == PTD_CC_STALL || cc == PTD_DATAOVERRUN) {
563
-
urbstat = cc_to_error[cc];
564
-
DBG(1, "%s: req %d nextpid %02x, status %d, error %d, error_count %d\n",
565
-
__func__, ep->num_req, ep->nextpid, urbstat, cc,
566
-
ep->error_count);
567
-
}
568
-
goto out;
569
-
}
570
-
571
-
switch (ep->nextpid) {
572
-
case USB_PID_OUT:
573
-
if (PTD_GET_COUNT(ptd) != ep->length)
574
-
pr_err("%s: count=%d len=%d\n", __func__,
575
-
PTD_GET_COUNT(ptd), ep->length);
576
-
BUG_ON(PTD_GET_COUNT(ptd) != ep->length);
577
-
urb->actual_length += ep->length;
578
-
BUG_ON(urb->actual_length > urb->transfer_buffer_length);
579
-
usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd));
580
-
if (urb->actual_length == urb->transfer_buffer_length) {
581
-
DBG(3, "%s: req %d xfer complete %d/%d status %d -> 0\n", __func__,
582
-
ep->num_req, len, ep->maxpacket, urbstat);
583
-
if (usb_pipecontrol(urb->pipe)) {
584
-
DBG(3, "%s: req %d %s Wait for ACK\n", __func__,
585
-
ep->num_req,
586
-
usb_pipein(urb->pipe) ? "IN" : "OUT");
587
-
ep->nextpid = USB_PID_ACK;
588
-
} else {
589
-
if (len % ep->maxpacket ||
590
-
!(urb->transfer_flags & URB_ZERO_PACKET)) {
591
-
urbstat = 0;
592
-
DBG(3, "%s: req %d URB %s status %d count %d/%d/%d\n",
593
-
__func__, ep->num_req, usb_pipein(urb->pipe) ? "IN" : "OUT",
594
-
urbstat, len, ep->maxpacket, urb->actual_length);
595
-
}
596
-
}
597
-
}
598
-
break;
599
-
case USB_PID_IN:
600
-
len = PTD_GET_COUNT(ptd);
601
-
BUG_ON(len > ep->length);
602
-
urb->actual_length += len;
603
-
BUG_ON(urb->actual_length > urb->transfer_buffer_length);
604
-
usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd));
605
-
/* if transfer completed or (allowed) data underrun */
606
-
if ((urb->transfer_buffer_length == urb->actual_length) ||
607
-
len % ep->maxpacket) {
608
-
DBG(3, "%s: req %d xfer complete %d/%d status %d -> 0\n", __func__,
609
-
ep->num_req, len, ep->maxpacket, urbstat);
610
-
if (usb_pipecontrol(urb->pipe)) {
611
-
DBG(3, "%s: req %d %s Wait for ACK\n", __func__,
612
-
ep->num_req,
613
-
usb_pipein(urb->pipe) ? "IN" : "OUT");
614
-
ep->nextpid = USB_PID_ACK;
615
-
} else {
616
-
urbstat = 0;
617
-
DBG(3, "%s: req %d URB %s status %d count %d/%d/%d\n",
618
-
__func__, ep->num_req, usb_pipein(urb->pipe) ? "IN" : "OUT",
619
-
urbstat, len, ep->maxpacket, urb->actual_length);
620
-
}
621
-
}
622
-
break;
623
-
case USB_PID_SETUP:
624
-
if (urb->transfer_buffer_length == urb->actual_length) {
625
-
ep->nextpid = USB_PID_ACK;
626
-
} else if (usb_pipeout(urb->pipe)) {
627
-
usb_settoggle(udev, 0, 1, 1);
628
-
ep->nextpid = USB_PID_OUT;
629
-
} else {
630
-
usb_settoggle(udev, 0, 0, 1);
631
-
ep->nextpid = USB_PID_IN;
632
-
}
633
-
break;
634
-
case USB_PID_ACK:
635
-
DBG(3, "%s: req %d got ACK %d -> 0\n", __func__, ep->num_req,
636
-
urbstat);
637
-
WARN_ON(urbstat != -EINPROGRESS);
638
-
urbstat = 0;
639
-
ep->nextpid = 0;
640
-
break;
641
-
default:
642
-
BUG_ON(1);
643
-
}
644
-
645
-
out:
646
-
if (urbstat != -EINPROGRESS) {
647
-
DBG(2, "%s: Finishing ep %p req %d urb %p status %d\n", __func__,
648
-
ep, ep->num_req, urb, urbstat);
649
-
finish_request(isp1362_hcd, ep, urb, urbstat);
650
-
}
651
-
}
652
-
653
-
static void finish_unlinks(struct isp1362_hcd *isp1362_hcd)
654
-
{
655
-
struct isp1362_ep *ep;
656
-
struct isp1362_ep *tmp;
657
-
658
-
list_for_each_entry_safe(ep, tmp, &isp1362_hcd->remove_list, remove_list) {
659
-
struct isp1362_ep_queue *epq =
660
-
get_ptd_queue(isp1362_hcd, ep->ptd_offset);
661
-
int index = ep->ptd_index;
662
-
663
-
BUG_ON(epq == NULL);
664
-
if (index >= 0) {
665
-
DBG(1, "%s: remove PTD[%d] $%04x\n", __func__, index, ep->ptd_offset);
666
-
BUG_ON(ep->num_ptds == 0);
667
-
release_ptd_buffers(epq, ep);
668
-
}
669
-
if (!list_empty(&ep->hep->urb_list)) {
670
-
struct urb *urb = get_urb(ep);
671
-
672
-
DBG(1, "%s: Finishing req %d ep %p from remove_list\n", __func__,
673
-
ep->num_req, ep);
674
-
finish_request(isp1362_hcd, ep, urb, -ESHUTDOWN);
675
-
}
676
-
WARN_ON(list_empty(&ep->active));
677
-
if (!list_empty(&ep->active)) {
678
-
list_del_init(&ep->active);
679
-
DBG(1, "%s: ep %p removed from active list\n", __func__, ep);
680
-
}
681
-
list_del_init(&ep->remove_list);
682
-
DBG(1, "%s: ep %p removed from remove_list\n", __func__, ep);
683
-
}
684
-
DBG(1, "%s: Done\n", __func__);
685
-
}
686
-
687
-
static inline void enable_atl_transfers(struct isp1362_hcd *isp1362_hcd, int count)
688
-
{
689
-
if (count > 0) {
690
-
if (count < isp1362_hcd->atl_queue.ptd_count)
691
-
isp1362_write_reg16(isp1362_hcd, HCATLDTC, count);
692
-
isp1362_enable_int(isp1362_hcd, HCuPINT_ATL);
693
-
isp1362_write_reg32(isp1362_hcd, HCATLSKIP, isp1362_hcd->atl_queue.skip_map);
694
-
isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
695
-
} else
696
-
isp1362_enable_int(isp1362_hcd, HCuPINT_SOF);
697
-
}
698
-
699
-
static inline void enable_intl_transfers(struct isp1362_hcd *isp1362_hcd)
700
-
{
701
-
isp1362_enable_int(isp1362_hcd, HCuPINT_INTL);
702
-
isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
703
-
isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, isp1362_hcd->intl_queue.skip_map);
704
-
}
705
-
706
-
static inline void enable_istl_transfers(struct isp1362_hcd *isp1362_hcd, int flip)
707
-
{
708
-
isp1362_enable_int(isp1362_hcd, flip ? HCuPINT_ISTL1 : HCuPINT_ISTL0);
709
-
isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, flip ?
710
-
HCBUFSTAT_ISTL1_FULL : HCBUFSTAT_ISTL0_FULL);
711
-
}
712
-
713
-
static int submit_req(struct isp1362_hcd *isp1362_hcd, struct urb *urb,
714
-
struct isp1362_ep *ep, struct isp1362_ep_queue *epq)
715
-
{
716
-
int index;
717
-
718
-
prepare_ptd(isp1362_hcd, urb, ep, epq, 0);
719
-
index = claim_ptd_buffers(epq, ep, ep->length);
720
-
if (index == -ENOMEM) {
721
-
DBG(1, "%s: req %d No free %s PTD available: %d, %08lx:%08lx\n", __func__,
722
-
ep->num_req, epq->name, ep->num_ptds, epq->buf_map, epq->skip_map);
723
-
return index;
724
-
} else if (index == -EOVERFLOW) {
725
-
DBG(1, "%s: req %d Not enough space for %d byte %s PTD %d %08lx:%08lx\n",
726
-
__func__, ep->num_req, ep->length, epq->name, ep->num_ptds,
727
-
epq->buf_map, epq->skip_map);
728
-
return index;
729
-
} else
730
-
BUG_ON(index < 0);
731
-
list_add_tail(&ep->active, &epq->active);
732
-
DBG(1, "%s: ep %p req %d len %d added to active list %p\n", __func__,
733
-
ep, ep->num_req, ep->length, &epq->active);
734
-
DBG(1, "%s: Submitting %s PTD $%04x for ep %p req %d\n", __func__, epq->name,
735
-
ep->ptd_offset, ep, ep->num_req);
736
-
isp1362_write_ptd(isp1362_hcd, ep, epq);
737
-
__clear_bit(ep->ptd_index, &epq->skip_map);
738
-
739
-
return 0;
740
-
}
741
-
742
-
static void start_atl_transfers(struct isp1362_hcd *isp1362_hcd)
743
-
{
744
-
int ptd_count = 0;
745
-
struct isp1362_ep_queue *epq = &isp1362_hcd->atl_queue;
746
-
struct isp1362_ep *ep;
747
-
int defer = 0;
748
-
749
-
if (atomic_read(&epq->finishing)) {
750
-
DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name);
751
-
return;
752
-
}
753
-
754
-
list_for_each_entry(ep, &isp1362_hcd->async, schedule) {
755
-
struct urb *urb = get_urb(ep);
756
-
int ret;
757
-
758
-
if (!list_empty(&ep->active)) {
759
-
DBG(2, "%s: Skipping active %s ep %p\n", __func__, epq->name, ep);
760
-
continue;
761
-
}
762
-
763
-
DBG(1, "%s: Processing %s ep %p req %d\n", __func__, epq->name,
764
-
ep, ep->num_req);
765
-
766
-
ret = submit_req(isp1362_hcd, urb, ep, epq);
767
-
if (ret == -ENOMEM) {
768
-
defer = 1;
769
-
break;
770
-
} else if (ret == -EOVERFLOW) {
771
-
defer = 1;
772
-
continue;
773
-
}
774
-
#ifdef BUGGY_PXA2XX_UDC_USBTEST
775
-
defer = ep->nextpid == USB_PID_SETUP;
776
-
#endif
777
-
ptd_count++;
778
-
}
779
-
780
-
/* Avoid starving of endpoints */
781
-
if (isp1362_hcd->async.next != isp1362_hcd->async.prev) {
782
-
DBG(2, "%s: Cycling ASYNC schedule %d\n", __func__, ptd_count);
783
-
list_move(&isp1362_hcd->async, isp1362_hcd->async.next);
784
-
}
785
-
if (ptd_count || defer)
786
-
enable_atl_transfers(isp1362_hcd, defer ? 0 : ptd_count);
787
-
788
-
epq->ptd_count += ptd_count;
789
-
if (epq->ptd_count > epq->stat_maxptds) {
790
-
epq->stat_maxptds = epq->ptd_count;
791
-
DBG(0, "%s: max_ptds: %d\n", __func__, epq->stat_maxptds);
792
-
}
793
-
}
794
-
795
-
static void start_intl_transfers(struct isp1362_hcd *isp1362_hcd)
796
-
{
797
-
int ptd_count = 0;
798
-
struct isp1362_ep_queue *epq = &isp1362_hcd->intl_queue;
799
-
struct isp1362_ep *ep;
800
-
801
-
if (atomic_read(&epq->finishing)) {
802
-
DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name);
803
-
return;
804
-
}
805
-
806
-
list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) {
807
-
struct urb *urb = get_urb(ep);
808
-
int ret;
809
-
810
-
if (!list_empty(&ep->active)) {
811
-
DBG(1, "%s: Skipping active %s ep %p\n", __func__,
812
-
epq->name, ep);
813
-
continue;
814
-
}
815
-
816
-
DBG(1, "%s: Processing %s ep %p req %d\n", __func__,
817
-
epq->name, ep, ep->num_req);
818
-
ret = submit_req(isp1362_hcd, urb, ep, epq);
819
-
if (ret == -ENOMEM)
820
-
break;
821
-
else if (ret == -EOVERFLOW)
822
-
continue;
823
-
ptd_count++;
824
-
}
825
-
826
-
if (ptd_count) {
827
-
static int last_count;
828
-
829
-
if (ptd_count != last_count) {
830
-
DBG(0, "%s: ptd_count: %d\n", __func__, ptd_count);
831
-
last_count = ptd_count;
832
-
}
833
-
enable_intl_transfers(isp1362_hcd);
834
-
}
835
-
836
-
epq->ptd_count += ptd_count;
837
-
if (epq->ptd_count > epq->stat_maxptds)
838
-
epq->stat_maxptds = epq->ptd_count;
839
-
}
840
-
841
-
static inline int next_ptd(struct isp1362_ep_queue *epq, struct isp1362_ep *ep)
842
-
{
843
-
u16 ptd_offset = ep->ptd_offset;
844
-
int num_ptds = (ep->length + PTD_HEADER_SIZE + (epq->blk_size - 1)) / epq->blk_size;
845
-
846
-
DBG(2, "%s: PTD offset $%04x + %04x => %d * %04x -> $%04x\n", __func__, ptd_offset,
847
-
ep->length, num_ptds, epq->blk_size, ptd_offset + num_ptds * epq->blk_size);
848
-
849
-
ptd_offset += num_ptds * epq->blk_size;
850
-
if (ptd_offset < epq->buf_start + epq->buf_size)
851
-
return ptd_offset;
852
-
else
853
-
return -ENOMEM;
854
-
}
855
-
856
-
static void start_iso_transfers(struct isp1362_hcd *isp1362_hcd)
857
-
{
858
-
int ptd_count = 0;
859
-
int flip = isp1362_hcd->istl_flip;
860
-
struct isp1362_ep_queue *epq;
861
-
int ptd_offset;
862
-
struct isp1362_ep *ep;
863
-
struct isp1362_ep *tmp;
864
-
u16 fno = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
865
-
866
-
fill2:
867
-
epq = &isp1362_hcd->istl_queue[flip];
868
-
if (atomic_read(&epq->finishing)) {
869
-
DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name);
870
-
return;
871
-
}
872
-
873
-
if (!list_empty(&epq->active))
874
-
return;
875
-
876
-
ptd_offset = epq->buf_start;
877
-
list_for_each_entry_safe(ep, tmp, &isp1362_hcd->isoc, schedule) {
878
-
struct urb *urb = get_urb(ep);
879
-
s16 diff = fno - (u16)urb->start_frame;
880
-
881
-
DBG(1, "%s: Processing %s ep %p\n", __func__, epq->name, ep);
882
-
883
-
if (diff > urb->number_of_packets) {
884
-
/* time frame for this URB has elapsed */
885
-
finish_request(isp1362_hcd, ep, urb, -EOVERFLOW);
886
-
continue;
887
-
} else if (diff < -1) {
888
-
/* URB is not due in this frame or the next one.
889
-
* Comparing with '-1' instead of '0' accounts for double
890
-
* buffering in the ISP1362 which enables us to queue the PTD
891
-
* one frame ahead of time
892
-
*/
893
-
} else if (diff == -1) {
894
-
/* submit PTD's that are due in the next frame */
895
-
prepare_ptd(isp1362_hcd, urb, ep, epq, fno);
896
-
if (ptd_offset + PTD_HEADER_SIZE + ep->length >
897
-
epq->buf_start + epq->buf_size) {
898
-
pr_err("%s: Not enough ISO buffer space for %d byte PTD\n",
899
-
__func__, ep->length);
900
-
continue;
901
-
}
902
-
ep->ptd_offset = ptd_offset;
903
-
list_add_tail(&ep->active, &epq->active);
904
-
905
-
ptd_offset = next_ptd(epq, ep);
906
-
if (ptd_offset < 0) {
907
-
pr_warn("%s: req %d No more %s PTD buffers available\n",
908
-
__func__, ep->num_req, epq->name);
909
-
break;
910
-
}
911
-
}
912
-
}
913
-
list_for_each_entry(ep, &epq->active, active) {
914
-
if (epq->active.next == &ep->active)
915
-
ep->ptd.mps |= PTD_LAST_MSK;
916
-
isp1362_write_ptd(isp1362_hcd, ep, epq);
917
-
ptd_count++;
918
-
}
919
-
920
-
if (ptd_count)
921
-
enable_istl_transfers(isp1362_hcd, flip);
922
-
923
-
epq->ptd_count += ptd_count;
924
-
if (epq->ptd_count > epq->stat_maxptds)
925
-
epq->stat_maxptds = epq->ptd_count;
926
-
927
-
/* check, whether the second ISTL buffer may also be filled */
928
-
if (!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
929
-
(flip ? HCBUFSTAT_ISTL0_FULL : HCBUFSTAT_ISTL1_FULL))) {
930
-
fno++;
931
-
ptd_count = 0;
932
-
flip = 1 - flip;
933
-
goto fill2;
934
-
}
935
-
}
936
-
937
-
static void finish_transfers(struct isp1362_hcd *isp1362_hcd, unsigned long done_map,
938
-
struct isp1362_ep_queue *epq)
939
-
{
940
-
struct isp1362_ep *ep;
941
-
struct isp1362_ep *tmp;
942
-
943
-
if (list_empty(&epq->active)) {
944
-
DBG(1, "%s: Nothing to do for %s queue\n", __func__, epq->name);
945
-
return;
946
-
}
947
-
948
-
DBG(1, "%s: Finishing %s transfers %08lx\n", __func__, epq->name, done_map);
949
-
950
-
atomic_inc(&epq->finishing);
951
-
list_for_each_entry_safe(ep, tmp, &epq->active, active) {
952
-
int index = ep->ptd_index;
953
-
954
-
DBG(1, "%s: Checking %s PTD[%02x] $%04x\n", __func__, epq->name,
955
-
index, ep->ptd_offset);
956
-
957
-
BUG_ON(index < 0);
958
-
if (__test_and_clear_bit(index, &done_map)) {
959
-
isp1362_read_ptd(isp1362_hcd, ep, epq);
960
-
epq->free_ptd = index;
961
-
BUG_ON(ep->num_ptds == 0);
962
-
release_ptd_buffers(epq, ep);
963
-
964
-
DBG(1, "%s: ep %p req %d removed from active list\n", __func__,
965
-
ep, ep->num_req);
966
-
if (!list_empty(&ep->remove_list)) {
967
-
list_del_init(&ep->remove_list);
968
-
DBG(1, "%s: ep %p removed from remove list\n", __func__, ep);
969
-
}
970
-
DBG(1, "%s: Postprocessing %s ep %p req %d\n", __func__, epq->name,
971
-
ep, ep->num_req);
972
-
postproc_ep(isp1362_hcd, ep);
973
-
}
974
-
if (!done_map)
975
-
break;
976
-
}
977
-
if (done_map)
978
-
pr_warn("%s: done_map not clear: %08lx:%08lx\n",
979
-
__func__, done_map, epq->skip_map);
980
-
atomic_dec(&epq->finishing);
981
-
}
982
-
983
-
static void finish_iso_transfers(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep_queue *epq)
984
-
{
985
-
struct isp1362_ep *ep;
986
-
struct isp1362_ep *tmp;
987
-
988
-
if (list_empty(&epq->active)) {
989
-
DBG(1, "%s: Nothing to do for %s queue\n", __func__, epq->name);
990
-
return;
991
-
}
992
-
993
-
DBG(1, "%s: Finishing %s transfers\n", __func__, epq->name);
994
-
995
-
atomic_inc(&epq->finishing);
996
-
list_for_each_entry_safe(ep, tmp, &epq->active, active) {
997
-
DBG(1, "%s: Checking PTD $%04x\n", __func__, ep->ptd_offset);
998
-
999
-
isp1362_read_ptd(isp1362_hcd, ep, epq);
1000
-
DBG(1, "%s: Postprocessing %s ep %p\n", __func__, epq->name, ep);
1001
-
postproc_ep(isp1362_hcd, ep);
1002
-
}
1003
-
WARN_ON(epq->blk_size != 0);
1004
-
atomic_dec(&epq->finishing);
1005
-
}
1006
-
1007
-
static irqreturn_t isp1362_irq(struct usb_hcd *hcd)
1008
-
{
1009
-
int handled = 0;
1010
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1011
-
u16 irqstat;
1012
-
u16 svc_mask;
1013
-
1014
-
spin_lock(&isp1362_hcd->lock);
1015
-
1016
-
BUG_ON(isp1362_hcd->irq_active++);
1017
-
1018
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
1019
-
1020
-
irqstat = isp1362_read_reg16(isp1362_hcd, HCuPINT);
1021
-
DBG(3, "%s: got IRQ %04x:%04x\n", __func__, irqstat, isp1362_hcd->irqenb);
1022
-
1023
-
/* only handle interrupts that are currently enabled */
1024
-
irqstat &= isp1362_hcd->irqenb;
1025
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, irqstat);
1026
-
svc_mask = irqstat;
1027
-
1028
-
if (irqstat & HCuPINT_SOF) {
1029
-
isp1362_hcd->irqenb &= ~HCuPINT_SOF;
1030
-
isp1362_hcd->irq_stat[ISP1362_INT_SOF]++;
1031
-
handled = 1;
1032
-
svc_mask &= ~HCuPINT_SOF;
1033
-
DBG(3, "%s: SOF\n", __func__);
1034
-
isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1035
-
if (!list_empty(&isp1362_hcd->remove_list))
1036
-
finish_unlinks(isp1362_hcd);
1037
-
if (!list_empty(&isp1362_hcd->async) && !(irqstat & HCuPINT_ATL)) {
1038
-
if (list_empty(&isp1362_hcd->atl_queue.active)) {
1039
-
start_atl_transfers(isp1362_hcd);
1040
-
} else {
1041
-
isp1362_enable_int(isp1362_hcd, HCuPINT_ATL);
1042
-
isp1362_write_reg32(isp1362_hcd, HCATLSKIP,
1043
-
isp1362_hcd->atl_queue.skip_map);
1044
-
isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
1045
-
}
1046
-
}
1047
-
}
1048
-
1049
-
if (irqstat & HCuPINT_ISTL0) {
1050
-
isp1362_hcd->irq_stat[ISP1362_INT_ISTL0]++;
1051
-
handled = 1;
1052
-
svc_mask &= ~HCuPINT_ISTL0;
1053
-
isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL0_FULL);
1054
-
DBG(1, "%s: ISTL0\n", __func__);
1055
-
WARN_ON((int)!!isp1362_hcd->istl_flip);
1056
-
WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1057
-
HCBUFSTAT_ISTL0_ACTIVE);
1058
-
WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1059
-
HCBUFSTAT_ISTL0_DONE));
1060
-
isp1362_hcd->irqenb &= ~HCuPINT_ISTL0;
1061
-
}
1062
-
1063
-
if (irqstat & HCuPINT_ISTL1) {
1064
-
isp1362_hcd->irq_stat[ISP1362_INT_ISTL1]++;
1065
-
handled = 1;
1066
-
svc_mask &= ~HCuPINT_ISTL1;
1067
-
isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL1_FULL);
1068
-
DBG(1, "%s: ISTL1\n", __func__);
1069
-
WARN_ON(!(int)isp1362_hcd->istl_flip);
1070
-
WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1071
-
HCBUFSTAT_ISTL1_ACTIVE);
1072
-
WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1073
-
HCBUFSTAT_ISTL1_DONE));
1074
-
isp1362_hcd->irqenb &= ~HCuPINT_ISTL1;
1075
-
}
1076
-
1077
-
if (irqstat & (HCuPINT_ISTL0 | HCuPINT_ISTL1)) {
1078
-
WARN_ON((irqstat & (HCuPINT_ISTL0 | HCuPINT_ISTL1)) ==
1079
-
(HCuPINT_ISTL0 | HCuPINT_ISTL1));
1080
-
finish_iso_transfers(isp1362_hcd,
1081
-
&isp1362_hcd->istl_queue[isp1362_hcd->istl_flip]);
1082
-
start_iso_transfers(isp1362_hcd);
1083
-
isp1362_hcd->istl_flip = 1 - isp1362_hcd->istl_flip;
1084
-
}
1085
-
1086
-
if (irqstat & HCuPINT_INTL) {
1087
-
u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE);
1088
-
u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCINTLSKIP);
1089
-
isp1362_hcd->irq_stat[ISP1362_INT_INTL]++;
1090
-
1091
-
DBG(2, "%s: INTL\n", __func__);
1092
-
1093
-
svc_mask &= ~HCuPINT_INTL;
1094
-
1095
-
isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, skip_map | done_map);
1096
-
if (~(done_map | skip_map) == 0)
1097
-
/* All PTDs are finished, disable INTL processing entirely */
1098
-
isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
1099
-
1100
-
handled = 1;
1101
-
WARN_ON(!done_map);
1102
-
if (done_map) {
1103
-
DBG(3, "%s: INTL done_map %08x\n", __func__, done_map);
1104
-
finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue);
1105
-
start_intl_transfers(isp1362_hcd);
1106
-
}
1107
-
}
1108
-
1109
-
if (irqstat & HCuPINT_ATL) {
1110
-
u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE);
1111
-
u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCATLSKIP);
1112
-
isp1362_hcd->irq_stat[ISP1362_INT_ATL]++;
1113
-
1114
-
DBG(2, "%s: ATL\n", __func__);
1115
-
1116
-
svc_mask &= ~HCuPINT_ATL;
1117
-
1118
-
isp1362_write_reg32(isp1362_hcd, HCATLSKIP, skip_map | done_map);
1119
-
if (~(done_map | skip_map) == 0)
1120
-
isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
1121
-
if (done_map) {
1122
-
DBG(3, "%s: ATL done_map %08x\n", __func__, done_map);
1123
-
finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue);
1124
-
start_atl_transfers(isp1362_hcd);
1125
-
}
1126
-
handled = 1;
1127
-
}
1128
-
1129
-
if (irqstat & HCuPINT_OPR) {
1130
-
u32 intstat = isp1362_read_reg32(isp1362_hcd, HCINTSTAT);
1131
-
isp1362_hcd->irq_stat[ISP1362_INT_OPR]++;
1132
-
1133
-
svc_mask &= ~HCuPINT_OPR;
1134
-
DBG(2, "%s: OPR %08x:%08x\n", __func__, intstat, isp1362_hcd->intenb);
1135
-
intstat &= isp1362_hcd->intenb;
1136
-
if (intstat & OHCI_INTR_UE) {
1137
-
pr_err("Unrecoverable error\n");
1138
-
/* FIXME: do here reset or cleanup or whatever */
1139
-
}
1140
-
if (intstat & OHCI_INTR_RHSC) {
1141
-
isp1362_hcd->rhstatus = isp1362_read_reg32(isp1362_hcd, HCRHSTATUS);
1142
-
isp1362_hcd->rhport[0] = isp1362_read_reg32(isp1362_hcd, HCRHPORT1);
1143
-
isp1362_hcd->rhport[1] = isp1362_read_reg32(isp1362_hcd, HCRHPORT2);
1144
-
}
1145
-
if (intstat & OHCI_INTR_RD) {
1146
-
pr_info("%s: RESUME DETECTED\n", __func__);
1147
-
isp1362_show_reg(isp1362_hcd, HCCONTROL);
1148
-
usb_hcd_resume_root_hub(hcd);
1149
-
}
1150
-
isp1362_write_reg32(isp1362_hcd, HCINTSTAT, intstat);
1151
-
irqstat &= ~HCuPINT_OPR;
1152
-
handled = 1;
1153
-
}
1154
-
1155
-
if (irqstat & HCuPINT_SUSP) {
1156
-
isp1362_hcd->irq_stat[ISP1362_INT_SUSP]++;
1157
-
handled = 1;
1158
-
svc_mask &= ~HCuPINT_SUSP;
1159
-
1160
-
pr_info("%s: SUSPEND IRQ\n", __func__);
1161
-
}
1162
-
1163
-
if (irqstat & HCuPINT_CLKRDY) {
1164
-
isp1362_hcd->irq_stat[ISP1362_INT_CLKRDY]++;
1165
-
handled = 1;
1166
-
isp1362_hcd->irqenb &= ~HCuPINT_CLKRDY;
1167
-
svc_mask &= ~HCuPINT_CLKRDY;
1168
-
pr_info("%s: CLKRDY IRQ\n", __func__);
1169
-
}
1170
-
1171
-
if (svc_mask)
1172
-
pr_err("%s: Unserviced interrupt(s) %04x\n", __func__, svc_mask);
1173
-
1174
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
1175
-
isp1362_hcd->irq_active--;
1176
-
spin_unlock(&isp1362_hcd->lock);
1177
-
1178
-
return IRQ_RETVAL(handled);
1179
-
}
1180
-
1181
-
/*-------------------------------------------------------------------------*/
1182
-
1183
-
#define MAX_PERIODIC_LOAD 900 /* out of 1000 usec */
1184
-
static int balance(struct isp1362_hcd *isp1362_hcd, u16 interval, u16 load)
1185
-
{
1186
-
int i, branch = -ENOSPC;
1187
-
1188
-
/* search for the least loaded schedule branch of that interval
1189
-
* which has enough bandwidth left unreserved.
1190
-
*/
1191
-
for (i = 0; i < interval; i++) {
1192
-
if (branch < 0 || isp1362_hcd->load[branch] > isp1362_hcd->load[i]) {
1193
-
int j;
1194
-
1195
-
for (j = i; j < PERIODIC_SIZE; j += interval) {
1196
-
if ((isp1362_hcd->load[j] + load) > MAX_PERIODIC_LOAD) {
1197
-
pr_err("%s: new load %d load[%02x] %d max %d\n", __func__,
1198
-
load, j, isp1362_hcd->load[j], MAX_PERIODIC_LOAD);
1199
-
break;
1200
-
}
1201
-
}
1202
-
if (j < PERIODIC_SIZE)
1203
-
continue;
1204
-
branch = i;
1205
-
}
1206
-
}
1207
-
return branch;
1208
-
}
1209
-
1210
-
/* NB! ALL the code above this point runs with isp1362_hcd->lock
1211
-
held, irqs off
1212
-
*/
1213
-
1214
-
/*-------------------------------------------------------------------------*/
1215
-
1216
-
static int isp1362_urb_enqueue(struct usb_hcd *hcd,
1217
-
struct urb *urb,
1218
-
gfp_t mem_flags)
1219
-
{
1220
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1221
-
struct usb_device *udev = urb->dev;
1222
-
unsigned int pipe = urb->pipe;
1223
-
int is_out = !usb_pipein(pipe);
1224
-
int type = usb_pipetype(pipe);
1225
-
int epnum = usb_pipeendpoint(pipe);
1226
-
struct usb_host_endpoint *hep = urb->ep;
1227
-
struct isp1362_ep *ep = NULL;
1228
-
unsigned long flags;
1229
-
int retval = 0;
1230
-
1231
-
DBG(3, "%s: urb %p\n", __func__, urb);
1232
-
1233
-
if (type == PIPE_ISOCHRONOUS) {
1234
-
pr_err("Isochronous transfers not supported\n");
1235
-
return -ENOSPC;
1236
-
}
1237
-
1238
-
URB_DBG("%s: FA %d ep%d%s %s: len %d %s%s\n", __func__,
1239
-
usb_pipedevice(pipe), epnum,
1240
-
is_out ? "out" : "in",
1241
-
usb_pipecontrol(pipe) ? "ctrl" :
1242
-
usb_pipeint(pipe) ? "int" :
1243
-
usb_pipebulk(pipe) ? "bulk" :
1244
-
"iso",
1245
-
urb->transfer_buffer_length,
1246
-
(urb->transfer_flags & URB_ZERO_PACKET) ? "ZERO_PACKET " : "",
1247
-
!(urb->transfer_flags & URB_SHORT_NOT_OK) ?
1248
-
"short_ok" : "");
1249
-
1250
-
/* avoid all allocations within spinlocks: request or endpoint */
1251
-
if (!hep->hcpriv) {
1252
-
ep = kzalloc(sizeof *ep, mem_flags);
1253
-
if (!ep)
1254
-
return -ENOMEM;
1255
-
}
1256
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1257
-
1258
-
/* don't submit to a dead or disabled port */
1259
-
if (!((isp1362_hcd->rhport[0] | isp1362_hcd->rhport[1]) &
1260
-
USB_PORT_STAT_ENABLE) ||
1261
-
!HC_IS_RUNNING(hcd->state)) {
1262
-
kfree(ep);
1263
-
retval = -ENODEV;
1264
-
goto fail_not_linked;
1265
-
}
1266
-
1267
-
retval = usb_hcd_link_urb_to_ep(hcd, urb);
1268
-
if (retval) {
1269
-
kfree(ep);
1270
-
goto fail_not_linked;
1271
-
}
1272
-
1273
-
if (hep->hcpriv) {
1274
-
ep = hep->hcpriv;
1275
-
} else {
1276
-
INIT_LIST_HEAD(&ep->schedule);
1277
-
INIT_LIST_HEAD(&ep->active);
1278
-
INIT_LIST_HEAD(&ep->remove_list);
1279
-
ep->udev = usb_get_dev(udev);
1280
-
ep->hep = hep;
1281
-
ep->epnum = epnum;
1282
-
ep->maxpacket = usb_maxpacket(udev, urb->pipe);
1283
-
ep->ptd_offset = -EINVAL;
1284
-
ep->ptd_index = -EINVAL;
1285
-
usb_settoggle(udev, epnum, is_out, 0);
1286
-
1287
-
if (type == PIPE_CONTROL)
1288
-
ep->nextpid = USB_PID_SETUP;
1289
-
else if (is_out)
1290
-
ep->nextpid = USB_PID_OUT;
1291
-
else
1292
-
ep->nextpid = USB_PID_IN;
1293
-
1294
-
switch (type) {
1295
-
case PIPE_ISOCHRONOUS:
1296
-
case PIPE_INTERRUPT:
1297
-
if (urb->interval > PERIODIC_SIZE)
1298
-
urb->interval = PERIODIC_SIZE;
1299
-
ep->interval = urb->interval;
1300
-
ep->branch = PERIODIC_SIZE;
1301
-
ep->load = usb_calc_bus_time(udev->speed, !is_out,
1302
-
type == PIPE_ISOCHRONOUS,
1303
-
usb_maxpacket(udev, pipe)) / 1000;
1304
-
break;
1305
-
}
1306
-
hep->hcpriv = ep;
1307
-
}
1308
-
ep->num_req = isp1362_hcd->req_serial++;
1309
-
1310
-
/* maybe put endpoint into schedule */
1311
-
switch (type) {
1312
-
case PIPE_CONTROL:
1313
-
case PIPE_BULK:
1314
-
if (list_empty(&ep->schedule)) {
1315
-
DBG(1, "%s: Adding ep %p req %d to async schedule\n",
1316
-
__func__, ep, ep->num_req);
1317
-
list_add_tail(&ep->schedule, &isp1362_hcd->async);
1318
-
}
1319
-
break;
1320
-
case PIPE_ISOCHRONOUS:
1321
-
case PIPE_INTERRUPT:
1322
-
urb->interval = ep->interval;
1323
-
1324
-
/* urb submitted for already existing EP */
1325
-
if (ep->branch < PERIODIC_SIZE)
1326
-
break;
1327
-
1328
-
retval = balance(isp1362_hcd, ep->interval, ep->load);
1329
-
if (retval < 0) {
1330
-
pr_err("%s: balance returned %d\n", __func__, retval);
1331
-
goto fail;
1332
-
}
1333
-
ep->branch = retval;
1334
-
retval = 0;
1335
-
isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1336
-
DBG(1, "%s: Current frame %04x branch %02x start_frame %04x(%04x)\n",
1337
-
__func__, isp1362_hcd->fmindex, ep->branch,
1338
-
((isp1362_hcd->fmindex + PERIODIC_SIZE - 1) &
1339
-
~(PERIODIC_SIZE - 1)) + ep->branch,
1340
-
(isp1362_hcd->fmindex & (PERIODIC_SIZE - 1)) + ep->branch);
1341
-
1342
-
if (list_empty(&ep->schedule)) {
1343
-
if (type == PIPE_ISOCHRONOUS) {
1344
-
u16 frame = isp1362_hcd->fmindex;
1345
-
1346
-
frame += max_t(u16, 8, ep->interval);
1347
-
frame &= ~(ep->interval - 1);
1348
-
frame |= ep->branch;
1349
-
if (frame_before(frame, isp1362_hcd->fmindex))
1350
-
frame += ep->interval;
1351
-
urb->start_frame = frame;
1352
-
1353
-
DBG(1, "%s: Adding ep %p to isoc schedule\n", __func__, ep);
1354
-
list_add_tail(&ep->schedule, &isp1362_hcd->isoc);
1355
-
} else {
1356
-
DBG(1, "%s: Adding ep %p to periodic schedule\n", __func__, ep);
1357
-
list_add_tail(&ep->schedule, &isp1362_hcd->periodic);
1358
-
}
1359
-
} else
1360
-
DBG(1, "%s: ep %p already scheduled\n", __func__, ep);
1361
-
1362
-
DBG(2, "%s: load %d bandwidth %d -> %d\n", __func__,
1363
-
ep->load / ep->interval, isp1362_hcd->load[ep->branch],
1364
-
isp1362_hcd->load[ep->branch] + ep->load);
1365
-
isp1362_hcd->load[ep->branch] += ep->load;
1366
-
}
1367
-
1368
-
urb->hcpriv = hep;
1369
-
ALIGNSTAT(isp1362_hcd, urb->transfer_buffer);
1370
-
1371
-
switch (type) {
1372
-
case PIPE_CONTROL:
1373
-
case PIPE_BULK:
1374
-
start_atl_transfers(isp1362_hcd);
1375
-
break;
1376
-
case PIPE_INTERRUPT:
1377
-
start_intl_transfers(isp1362_hcd);
1378
-
break;
1379
-
case PIPE_ISOCHRONOUS:
1380
-
start_iso_transfers(isp1362_hcd);
1381
-
break;
1382
-
default:
1383
-
BUG();
1384
-
}
1385
-
fail:
1386
-
if (retval)
1387
-
usb_hcd_unlink_urb_from_ep(hcd, urb);
1388
-
1389
-
1390
-
fail_not_linked:
1391
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1392
-
if (retval)
1393
-
DBG(0, "%s: urb %p failed with %d\n", __func__, urb, retval);
1394
-
return retval;
1395
-
}
1396
-
1397
-
static int isp1362_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1398
-
{
1399
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1400
-
struct usb_host_endpoint *hep;
1401
-
unsigned long flags;
1402
-
struct isp1362_ep *ep;
1403
-
int retval = 0;
1404
-
1405
-
DBG(3, "%s: urb %p\n", __func__, urb);
1406
-
1407
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1408
-
retval = usb_hcd_check_unlink_urb(hcd, urb, status);
1409
-
if (retval)
1410
-
goto done;
1411
-
1412
-
hep = urb->hcpriv;
1413
-
1414
-
if (!hep) {
1415
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1416
-
return -EIDRM;
1417
-
}
1418
-
1419
-
ep = hep->hcpriv;
1420
-
if (ep) {
1421
-
/* In front of queue? */
1422
-
if (ep->hep->urb_list.next == &urb->urb_list) {
1423
-
if (!list_empty(&ep->active)) {
1424
-
DBG(1, "%s: urb %p ep %p req %d active PTD[%d] $%04x\n", __func__,
1425
-
urb, ep, ep->num_req, ep->ptd_index, ep->ptd_offset);
1426
-
/* disable processing and queue PTD for removal */
1427
-
remove_ptd(isp1362_hcd, ep);
1428
-
urb = NULL;
1429
-
}
1430
-
}
1431
-
if (urb) {
1432
-
DBG(1, "%s: Finishing ep %p req %d\n", __func__, ep,
1433
-
ep->num_req);
1434
-
finish_request(isp1362_hcd, ep, urb, status);
1435
-
} else
1436
-
DBG(1, "%s: urb %p active; wait4irq\n", __func__, urb);
1437
-
} else {
1438
-
pr_warn("%s: No EP in URB %p\n", __func__, urb);
1439
-
retval = -EINVAL;
1440
-
}
1441
-
done:
1442
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1443
-
1444
-
DBG(3, "%s: exit\n", __func__);
1445
-
1446
-
return retval;
1447
-
}
1448
-
1449
-
static void isp1362_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1450
-
{
1451
-
struct isp1362_ep *ep = hep->hcpriv;
1452
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1453
-
unsigned long flags;
1454
-
1455
-
DBG(1, "%s: ep %p\n", __func__, ep);
1456
-
if (!ep)
1457
-
return;
1458
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1459
-
if (!list_empty(&hep->urb_list)) {
1460
-
if (!list_empty(&ep->active) && list_empty(&ep->remove_list)) {
1461
-
DBG(1, "%s: Removing ep %p req %d PTD[%d] $%04x\n", __func__,
1462
-
ep, ep->num_req, ep->ptd_index, ep->ptd_offset);
1463
-
remove_ptd(isp1362_hcd, ep);
1464
-
pr_info("%s: Waiting for Interrupt to clean up\n", __func__);
1465
-
}
1466
-
}
1467
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1468
-
/* Wait for interrupt to clear out active list */
1469
-
while (!list_empty(&ep->active))
1470
-
msleep(1);
1471
-
1472
-
DBG(1, "%s: Freeing EP %p\n", __func__, ep);
1473
-
1474
-
usb_put_dev(ep->udev);
1475
-
kfree(ep);
1476
-
hep->hcpriv = NULL;
1477
-
}
1478
-
1479
-
static int isp1362_get_frame(struct usb_hcd *hcd)
1480
-
{
1481
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1482
-
u32 fmnum;
1483
-
unsigned long flags;
1484
-
1485
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1486
-
fmnum = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1487
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1488
-
1489
-
return (int)fmnum;
1490
-
}
1491
-
1492
-
/*-------------------------------------------------------------------------*/
1493
-
1494
-
/* Adapted from ohci-hub.c */
1495
-
static int isp1362_hub_status_data(struct usb_hcd *hcd, char *buf)
1496
-
{
1497
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1498
-
int ports, i, changed = 0;
1499
-
unsigned long flags;
1500
-
1501
-
if (!HC_IS_RUNNING(hcd->state))
1502
-
return -ESHUTDOWN;
1503
-
1504
-
/* Report no status change now, if we are scheduled to be
1505
-
called later */
1506
-
if (timer_pending(&hcd->rh_timer))
1507
-
return 0;
1508
-
1509
-
ports = isp1362_hcd->rhdesca & RH_A_NDP;
1510
-
BUG_ON(ports > 2);
1511
-
1512
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1513
-
/* init status */
1514
-
if (isp1362_hcd->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
1515
-
buf[0] = changed = 1;
1516
-
else
1517
-
buf[0] = 0;
1518
-
1519
-
for (i = 0; i < ports; i++) {
1520
-
u32 status = isp1362_hcd->rhport[i];
1521
-
1522
-
if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC |
1523
-
RH_PS_OCIC | RH_PS_PRSC)) {
1524
-
changed = 1;
1525
-
buf[0] |= 1 << (i + 1);
1526
-
continue;
1527
-
}
1528
-
1529
-
if (!(status & RH_PS_CCS))
1530
-
continue;
1531
-
}
1532
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1533
-
return changed;
1534
-
}
1535
-
1536
-
static void isp1362_hub_descriptor(struct isp1362_hcd *isp1362_hcd,
1537
-
struct usb_hub_descriptor *desc)
1538
-
{
1539
-
u32 reg = isp1362_hcd->rhdesca;
1540
-
1541
-
DBG(3, "%s: enter\n", __func__);
1542
-
1543
-
desc->bDescriptorType = USB_DT_HUB;
1544
-
desc->bDescLength = 9;
1545
-
desc->bHubContrCurrent = 0;
1546
-
desc->bNbrPorts = reg & 0x3;
1547
-
/* Power switching, device type, overcurrent. */
1548
-
desc->wHubCharacteristics = cpu_to_le16((reg >> 8) &
1549
-
(HUB_CHAR_LPSM |
1550
-
HUB_CHAR_COMPOUND |
1551
-
HUB_CHAR_OCPM));
1552
-
DBG(0, "%s: hubcharacteristics = %02x\n", __func__,
1553
-
desc->wHubCharacteristics);
1554
-
desc->bPwrOn2PwrGood = (reg >> 24) & 0xff;
1555
-
/* ports removable, and legacy PortPwrCtrlMask */
1556
-
desc->u.hs.DeviceRemovable[0] = desc->bNbrPorts == 1 ? 1 << 1 : 3 << 1;
1557
-
desc->u.hs.DeviceRemovable[1] = ~0;
1558
-
1559
-
DBG(3, "%s: exit\n", __func__);
1560
-
}
1561
-
1562
-
/* Adapted from ohci-hub.c */
1563
-
static int isp1362_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
1564
-
u16 wIndex, char *buf, u16 wLength)
1565
-
{
1566
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1567
-
int retval = 0;
1568
-
unsigned long flags;
1569
-
unsigned long t1;
1570
-
int ports = isp1362_hcd->rhdesca & RH_A_NDP;
1571
-
u32 tmp = 0;
1572
-
1573
-
switch (typeReq) {
1574
-
case ClearHubFeature:
1575
-
DBG(0, "ClearHubFeature: ");
1576
-
switch (wValue) {
1577
-
case C_HUB_OVER_CURRENT:
1578
-
DBG(0, "C_HUB_OVER_CURRENT\n");
1579
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1580
-
isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_OCIC);
1581
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1582
-
break;
1583
-
case C_HUB_LOCAL_POWER:
1584
-
DBG(0, "C_HUB_LOCAL_POWER\n");
1585
-
break;
1586
-
default:
1587
-
goto error;
1588
-
}
1589
-
break;
1590
-
case SetHubFeature:
1591
-
DBG(0, "SetHubFeature: ");
1592
-
switch (wValue) {
1593
-
case C_HUB_OVER_CURRENT:
1594
-
case C_HUB_LOCAL_POWER:
1595
-
DBG(0, "C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
1596
-
break;
1597
-
default:
1598
-
goto error;
1599
-
}
1600
-
break;
1601
-
case GetHubDescriptor:
1602
-
DBG(0, "GetHubDescriptor\n");
1603
-
isp1362_hub_descriptor(isp1362_hcd, (struct usb_hub_descriptor *)buf);
1604
-
break;
1605
-
case GetHubStatus:
1606
-
DBG(0, "GetHubStatus\n");
1607
-
put_unaligned(cpu_to_le32(0), (__le32 *) buf);
1608
-
break;
1609
-
case GetPortStatus:
1610
-
#ifndef VERBOSE
1611
-
DBG(0, "GetPortStatus\n");
1612
-
#endif
1613
-
if (!wIndex || wIndex > ports)
1614
-
goto error;
1615
-
tmp = isp1362_hcd->rhport[--wIndex];
1616
-
put_unaligned(cpu_to_le32(tmp), (__le32 *) buf);
1617
-
break;
1618
-
case ClearPortFeature:
1619
-
DBG(0, "ClearPortFeature: ");
1620
-
if (!wIndex || wIndex > ports)
1621
-
goto error;
1622
-
wIndex--;
1623
-
1624
-
switch (wValue) {
1625
-
case USB_PORT_FEAT_ENABLE:
1626
-
DBG(0, "USB_PORT_FEAT_ENABLE\n");
1627
-
tmp = RH_PS_CCS;
1628
-
break;
1629
-
case USB_PORT_FEAT_C_ENABLE:
1630
-
DBG(0, "USB_PORT_FEAT_C_ENABLE\n");
1631
-
tmp = RH_PS_PESC;
1632
-
break;
1633
-
case USB_PORT_FEAT_SUSPEND:
1634
-
DBG(0, "USB_PORT_FEAT_SUSPEND\n");
1635
-
tmp = RH_PS_POCI;
1636
-
break;
1637
-
case USB_PORT_FEAT_C_SUSPEND:
1638
-
DBG(0, "USB_PORT_FEAT_C_SUSPEND\n");
1639
-
tmp = RH_PS_PSSC;
1640
-
break;
1641
-
case USB_PORT_FEAT_POWER:
1642
-
DBG(0, "USB_PORT_FEAT_POWER\n");
1643
-
tmp = RH_PS_LSDA;
1644
-
1645
-
break;
1646
-
case USB_PORT_FEAT_C_CONNECTION:
1647
-
DBG(0, "USB_PORT_FEAT_C_CONNECTION\n");
1648
-
tmp = RH_PS_CSC;
1649
-
break;
1650
-
case USB_PORT_FEAT_C_OVER_CURRENT:
1651
-
DBG(0, "USB_PORT_FEAT_C_OVER_CURRENT\n");
1652
-
tmp = RH_PS_OCIC;
1653
-
break;
1654
-
case USB_PORT_FEAT_C_RESET:
1655
-
DBG(0, "USB_PORT_FEAT_C_RESET\n");
1656
-
tmp = RH_PS_PRSC;
1657
-
break;
1658
-
default:
1659
-
goto error;
1660
-
}
1661
-
1662
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1663
-
isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, tmp);
1664
-
isp1362_hcd->rhport[wIndex] =
1665
-
isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1666
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1667
-
break;
1668
-
case SetPortFeature:
1669
-
DBG(0, "SetPortFeature: ");
1670
-
if (!wIndex || wIndex > ports)
1671
-
goto error;
1672
-
wIndex--;
1673
-
switch (wValue) {
1674
-
case USB_PORT_FEAT_SUSPEND:
1675
-
DBG(0, "USB_PORT_FEAT_SUSPEND\n");
1676
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1677
-
isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PSS);
1678
-
isp1362_hcd->rhport[wIndex] =
1679
-
isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1680
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1681
-
break;
1682
-
case USB_PORT_FEAT_POWER:
1683
-
DBG(0, "USB_PORT_FEAT_POWER\n");
1684
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1685
-
isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PPS);
1686
-
isp1362_hcd->rhport[wIndex] =
1687
-
isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1688
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1689
-
break;
1690
-
case USB_PORT_FEAT_RESET:
1691
-
DBG(0, "USB_PORT_FEAT_RESET\n");
1692
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1693
-
1694
-
t1 = jiffies + msecs_to_jiffies(USB_RESET_WIDTH);
1695
-
while (time_before(jiffies, t1)) {
1696
-
/* spin until any current reset finishes */
1697
-
for (;;) {
1698
-
tmp = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1699
-
if (!(tmp & RH_PS_PRS))
1700
-
break;
1701
-
udelay(500);
1702
-
}
1703
-
if (!(tmp & RH_PS_CCS))
1704
-
break;
1705
-
/* Reset lasts 10ms (claims datasheet) */
1706
-
isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, (RH_PS_PRS));
1707
-
1708
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1709
-
msleep(10);
1710
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1711
-
}
1712
-
1713
-
isp1362_hcd->rhport[wIndex] = isp1362_read_reg32(isp1362_hcd,
1714
-
HCRHPORT1 + wIndex);
1715
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1716
-
break;
1717
-
default:
1718
-
goto error;
1719
-
}
1720
-
break;
1721
-
1722
-
default:
1723
-
error:
1724
-
/* "protocol stall" on error */
1725
-
DBG(0, "PROTOCOL STALL\n");
1726
-
retval = -EPIPE;
1727
-
}
1728
-
1729
-
return retval;
1730
-
}
1731
-
1732
-
#ifdef CONFIG_PM
1733
-
static int isp1362_bus_suspend(struct usb_hcd *hcd)
1734
-
{
1735
-
int status = 0;
1736
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1737
-
unsigned long flags;
1738
-
1739
-
if (time_before(jiffies, isp1362_hcd->next_statechange))
1740
-
msleep(5);
1741
-
1742
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1743
-
1744
-
isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1745
-
switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
1746
-
case OHCI_USB_RESUME:
1747
-
DBG(0, "%s: resume/suspend?\n", __func__);
1748
-
isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS;
1749
-
isp1362_hcd->hc_control |= OHCI_USB_RESET;
1750
-
isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1751
-
fallthrough;
1752
-
case OHCI_USB_RESET:
1753
-
status = -EBUSY;
1754
-
pr_warn("%s: needs reinit!\n", __func__);
1755
-
goto done;
1756
-
case OHCI_USB_SUSPEND:
1757
-
pr_warn("%s: already suspended?\n", __func__);
1758
-
goto done;
1759
-
}
1760
-
DBG(0, "%s: suspend root hub\n", __func__);
1761
-
1762
-
/* First stop any processing */
1763
-
hcd->state = HC_STATE_QUIESCING;
1764
-
if (!list_empty(&isp1362_hcd->atl_queue.active) ||
1765
-
!list_empty(&isp1362_hcd->intl_queue.active) ||
1766
-
!list_empty(&isp1362_hcd->istl_queue[0] .active) ||
1767
-
!list_empty(&isp1362_hcd->istl_queue[1] .active)) {
1768
-
int limit;
1769
-
1770
-
isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0);
1771
-
isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0);
1772
-
isp1362_write_reg16(isp1362_hcd, HCBUFSTAT, 0);
1773
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
1774
-
isp1362_write_reg32(isp1362_hcd, HCINTSTAT, OHCI_INTR_SF);
1775
-
1776
-
DBG(0, "%s: stopping schedules ...\n", __func__);
1777
-
limit = 2000;
1778
-
while (limit > 0) {
1779
-
udelay(250);
1780
-
limit -= 250;
1781
-
if (isp1362_read_reg32(isp1362_hcd, HCINTSTAT) & OHCI_INTR_SF)
1782
-
break;
1783
-
}
1784
-
mdelay(7);
1785
-
if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ATL) {
1786
-
u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE);
1787
-
finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue);
1788
-
}
1789
-
if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_INTL) {
1790
-
u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE);
1791
-
finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue);
1792
-
}
1793
-
if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL0)
1794
-
finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[0]);
1795
-
if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL1)
1796
-
finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[1]);
1797
-
}
1798
-
DBG(0, "%s: HCINTSTAT: %08x\n", __func__,
1799
-
isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1800
-
isp1362_write_reg32(isp1362_hcd, HCINTSTAT,
1801
-
isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1802
-
1803
-
/* Suspend hub */
1804
-
isp1362_hcd->hc_control = OHCI_USB_SUSPEND;
1805
-
isp1362_show_reg(isp1362_hcd, HCCONTROL);
1806
-
isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1807
-
isp1362_show_reg(isp1362_hcd, HCCONTROL);
1808
-
1809
-
#if 1
1810
-
isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1811
-
if ((isp1362_hcd->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_SUSPEND) {
1812
-
pr_err("%s: controller won't suspend %08x\n", __func__,
1813
-
isp1362_hcd->hc_control);
1814
-
status = -EBUSY;
1815
-
} else
1816
-
#endif
1817
-
{
1818
-
/* no resumes until devices finish suspending */
1819
-
isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(5);
1820
-
}
1821
-
done:
1822
-
if (status == 0) {
1823
-
hcd->state = HC_STATE_SUSPENDED;
1824
-
DBG(0, "%s: HCD suspended: %08x\n", __func__,
1825
-
isp1362_read_reg32(isp1362_hcd, HCCONTROL));
1826
-
}
1827
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1828
-
return status;
1829
-
}
1830
-
1831
-
static int isp1362_bus_resume(struct usb_hcd *hcd)
1832
-
{
1833
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1834
-
u32 port;
1835
-
unsigned long flags;
1836
-
int status = -EINPROGRESS;
1837
-
1838
-
if (time_before(jiffies, isp1362_hcd->next_statechange))
1839
-
msleep(5);
1840
-
1841
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1842
-
isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1843
-
pr_info("%s: HCCONTROL: %08x\n", __func__, isp1362_hcd->hc_control);
1844
-
if (hcd->state == HC_STATE_RESUMING) {
1845
-
pr_warn("%s: duplicate resume\n", __func__);
1846
-
status = 0;
1847
-
} else
1848
-
switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
1849
-
case OHCI_USB_SUSPEND:
1850
-
DBG(0, "%s: resume root hub\n", __func__);
1851
-
isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS;
1852
-
isp1362_hcd->hc_control |= OHCI_USB_RESUME;
1853
-
isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1854
-
break;
1855
-
case OHCI_USB_RESUME:
1856
-
/* HCFS changes sometime after INTR_RD */
1857
-
DBG(0, "%s: remote wakeup\n", __func__);
1858
-
break;
1859
-
case OHCI_USB_OPER:
1860
-
DBG(0, "%s: odd resume\n", __func__);
1861
-
status = 0;
1862
-
hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1863
-
break;
1864
-
default: /* RESET, we lost power */
1865
-
DBG(0, "%s: root hub hardware reset\n", __func__);
1866
-
status = -EBUSY;
1867
-
}
1868
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1869
-
if (status == -EBUSY) {
1870
-
DBG(0, "%s: Restarting HC\n", __func__);
1871
-
isp1362_hc_stop(hcd);
1872
-
return isp1362_hc_start(hcd);
1873
-
}
1874
-
if (status != -EINPROGRESS)
1875
-
return status;
1876
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1877
-
port = isp1362_read_reg32(isp1362_hcd, HCRHDESCA) & RH_A_NDP;
1878
-
while (port--) {
1879
-
u32 stat = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + port);
1880
-
1881
-
/* force global, not selective, resume */
1882
-
if (!(stat & RH_PS_PSS)) {
1883
-
DBG(0, "%s: Not Resuming RH port %d\n", __func__, port);
1884
-
continue;
1885
-
}
1886
-
DBG(0, "%s: Resuming RH port %d\n", __func__, port);
1887
-
isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + port, RH_PS_POCI);
1888
-
}
1889
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1890
-
1891
-
/* Some controllers (lucent) need extra-long delays */
1892
-
hcd->state = HC_STATE_RESUMING;
1893
-
mdelay(20 /* usb 11.5.1.10 */ + 15);
1894
-
1895
-
isp1362_hcd->hc_control = OHCI_USB_OPER;
1896
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
1897
-
isp1362_show_reg(isp1362_hcd, HCCONTROL);
1898
-
isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1899
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1900
-
/* TRSMRCY */
1901
-
msleep(10);
1902
-
1903
-
/* keep it alive for ~5x suspend + resume costs */
1904
-
isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(250);
1905
-
1906
-
hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1907
-
hcd->state = HC_STATE_RUNNING;
1908
-
return 0;
1909
-
}
1910
-
#else
1911
-
#define isp1362_bus_suspend NULL
1912
-
#define isp1362_bus_resume NULL
1913
-
#endif
1914
-
1915
-
/*-------------------------------------------------------------------------*/
1916
-
1917
-
static void dump_irq(struct seq_file *s, char *label, u16 mask)
1918
-
{
1919
-
seq_printf(s, "%-15s %04x%s%s%s%s%s%s\n", label, mask,
1920
-
mask & HCuPINT_CLKRDY ? " clkrdy" : "",
1921
-
mask & HCuPINT_SUSP ? " susp" : "",
1922
-
mask & HCuPINT_OPR ? " opr" : "",
1923
-
mask & HCuPINT_EOT ? " eot" : "",
1924
-
mask & HCuPINT_ATL ? " atl" : "",
1925
-
mask & HCuPINT_SOF ? " sof" : "");
1926
-
}
1927
-
1928
-
static void dump_int(struct seq_file *s, char *label, u32 mask)
1929
-
{
1930
-
seq_printf(s, "%-15s %08x%s%s%s%s%s%s%s\n", label, mask,
1931
-
mask & OHCI_INTR_MIE ? " MIE" : "",
1932
-
mask & OHCI_INTR_RHSC ? " rhsc" : "",
1933
-
mask & OHCI_INTR_FNO ? " fno" : "",
1934
-
mask & OHCI_INTR_UE ? " ue" : "",
1935
-
mask & OHCI_INTR_RD ? " rd" : "",
1936
-
mask & OHCI_INTR_SF ? " sof" : "",
1937
-
mask & OHCI_INTR_SO ? " so" : "");
1938
-
}
1939
-
1940
-
static void dump_ctrl(struct seq_file *s, char *label, u32 mask)
1941
-
{
1942
-
seq_printf(s, "%-15s %08x%s%s%s\n", label, mask,
1943
-
mask & OHCI_CTRL_RWC ? " rwc" : "",
1944
-
mask & OHCI_CTRL_RWE ? " rwe" : "",
1945
-
({
1946
-
char *hcfs;
1947
-
switch (mask & OHCI_CTRL_HCFS) {
1948
-
case OHCI_USB_OPER:
1949
-
hcfs = " oper";
1950
-
break;
1951
-
case OHCI_USB_RESET:
1952
-
hcfs = " reset";
1953
-
break;
1954
-
case OHCI_USB_RESUME:
1955
-
hcfs = " resume";
1956
-
break;
1957
-
case OHCI_USB_SUSPEND:
1958
-
hcfs = " suspend";
1959
-
break;
1960
-
default:
1961
-
hcfs = " ?";
1962
-
}
1963
-
hcfs;
1964
-
}));
1965
-
}
1966
-
1967
-
static void dump_regs(struct seq_file *s, struct isp1362_hcd *isp1362_hcd)
1968
-
{
1969
-
seq_printf(s, "HCREVISION [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCREVISION),
1970
-
isp1362_read_reg32(isp1362_hcd, HCREVISION));
1971
-
seq_printf(s, "HCCONTROL [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCCONTROL),
1972
-
isp1362_read_reg32(isp1362_hcd, HCCONTROL));
1973
-
seq_printf(s, "HCCMDSTAT [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCCMDSTAT),
1974
-
isp1362_read_reg32(isp1362_hcd, HCCMDSTAT));
1975
-
seq_printf(s, "HCINTSTAT [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTSTAT),
1976
-
isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1977
-
seq_printf(s, "HCINTENB [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTENB),
1978
-
isp1362_read_reg32(isp1362_hcd, HCINTENB));
1979
-
seq_printf(s, "HCFMINTVL [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMINTVL),
1980
-
isp1362_read_reg32(isp1362_hcd, HCFMINTVL));
1981
-
seq_printf(s, "HCFMREM [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMREM),
1982
-
isp1362_read_reg32(isp1362_hcd, HCFMREM));
1983
-
seq_printf(s, "HCFMNUM [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMNUM),
1984
-
isp1362_read_reg32(isp1362_hcd, HCFMNUM));
1985
-
seq_printf(s, "HCLSTHRESH [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCLSTHRESH),
1986
-
isp1362_read_reg32(isp1362_hcd, HCLSTHRESH));
1987
-
seq_printf(s, "HCRHDESCA [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHDESCA),
1988
-
isp1362_read_reg32(isp1362_hcd, HCRHDESCA));
1989
-
seq_printf(s, "HCRHDESCB [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHDESCB),
1990
-
isp1362_read_reg32(isp1362_hcd, HCRHDESCB));
1991
-
seq_printf(s, "HCRHSTATUS [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHSTATUS),
1992
-
isp1362_read_reg32(isp1362_hcd, HCRHSTATUS));
1993
-
seq_printf(s, "HCRHPORT1 [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHPORT1),
1994
-
isp1362_read_reg32(isp1362_hcd, HCRHPORT1));
1995
-
seq_printf(s, "HCRHPORT2 [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHPORT2),
1996
-
isp1362_read_reg32(isp1362_hcd, HCRHPORT2));
1997
-
seq_printf(s, "\n");
1998
-
seq_printf(s, "HCHWCFG [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCHWCFG),
1999
-
isp1362_read_reg16(isp1362_hcd, HCHWCFG));
2000
-
seq_printf(s, "HCDMACFG [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCDMACFG),
2001
-
isp1362_read_reg16(isp1362_hcd, HCDMACFG));
2002
-
seq_printf(s, "HCXFERCTR [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCXFERCTR),
2003
-
isp1362_read_reg16(isp1362_hcd, HCXFERCTR));
2004
-
seq_printf(s, "HCuPINT [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCuPINT),
2005
-
isp1362_read_reg16(isp1362_hcd, HCuPINT));
2006
-
seq_printf(s, "HCuPINTENB [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCuPINTENB),
2007
-
isp1362_read_reg16(isp1362_hcd, HCuPINTENB));
2008
-
seq_printf(s, "HCCHIPID [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCCHIPID),
2009
-
isp1362_read_reg16(isp1362_hcd, HCCHIPID));
2010
-
seq_printf(s, "HCSCRATCH [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCSCRATCH),
2011
-
isp1362_read_reg16(isp1362_hcd, HCSCRATCH));
2012
-
seq_printf(s, "HCBUFSTAT [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCBUFSTAT),
2013
-
isp1362_read_reg16(isp1362_hcd, HCBUFSTAT));
2014
-
seq_printf(s, "HCDIRADDR [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCDIRADDR),
2015
-
isp1362_read_reg32(isp1362_hcd, HCDIRADDR));
2016
-
#if 0
2017
-
seq_printf(s, "HCDIRDATA [%02x] %04x\n", ISP1362_REG_NO(HCDIRDATA),
2018
-
isp1362_read_reg16(isp1362_hcd, HCDIRDATA));
2019
-
#endif
2020
-
seq_printf(s, "HCISTLBUFSZ[%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCISTLBUFSZ),
2021
-
isp1362_read_reg16(isp1362_hcd, HCISTLBUFSZ));
2022
-
seq_printf(s, "HCISTLRATE [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCISTLRATE),
2023
-
isp1362_read_reg16(isp1362_hcd, HCISTLRATE));
2024
-
seq_printf(s, "\n");
2025
-
seq_printf(s, "HCINTLBUFSZ[%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLBUFSZ),
2026
-
isp1362_read_reg16(isp1362_hcd, HCINTLBUFSZ));
2027
-
seq_printf(s, "HCINTLBLKSZ[%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLBLKSZ),
2028
-
isp1362_read_reg16(isp1362_hcd, HCINTLBLKSZ));
2029
-
seq_printf(s, "HCINTLDONE [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLDONE),
2030
-
isp1362_read_reg32(isp1362_hcd, HCINTLDONE));
2031
-
seq_printf(s, "HCINTLSKIP [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLSKIP),
2032
-
isp1362_read_reg32(isp1362_hcd, HCINTLSKIP));
2033
-
seq_printf(s, "HCINTLLAST [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLLAST),
2034
-
isp1362_read_reg32(isp1362_hcd, HCINTLLAST));
2035
-
seq_printf(s, "HCINTLCURR [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLCURR),
2036
-
isp1362_read_reg16(isp1362_hcd, HCINTLCURR));
2037
-
seq_printf(s, "\n");
2038
-
seq_printf(s, "HCATLBUFSZ [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLBUFSZ),
2039
-
isp1362_read_reg16(isp1362_hcd, HCATLBUFSZ));
2040
-
seq_printf(s, "HCATLBLKSZ [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLBLKSZ),
2041
-
isp1362_read_reg16(isp1362_hcd, HCATLBLKSZ));
2042
-
#if 0
2043
-
seq_printf(s, "HCATLDONE [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDONE),
2044
-
isp1362_read_reg32(isp1362_hcd, HCATLDONE));
2045
-
#endif
2046
-
seq_printf(s, "HCATLSKIP [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLSKIP),
2047
-
isp1362_read_reg32(isp1362_hcd, HCATLSKIP));
2048
-
seq_printf(s, "HCATLLAST [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLLAST),
2049
-
isp1362_read_reg32(isp1362_hcd, HCATLLAST));
2050
-
seq_printf(s, "HCATLCURR [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLCURR),
2051
-
isp1362_read_reg16(isp1362_hcd, HCATLCURR));
2052
-
seq_printf(s, "\n");
2053
-
seq_printf(s, "HCATLDTC [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDTC),
2054
-
isp1362_read_reg16(isp1362_hcd, HCATLDTC));
2055
-
seq_printf(s, "HCATLDTCTO [%02x] %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDTCTO),
2056
-
isp1362_read_reg16(isp1362_hcd, HCATLDTCTO));
2057
-
}
2058
-
2059
-
static int isp1362_show(struct seq_file *s, void *unused)
2060
-
{
2061
-
struct isp1362_hcd *isp1362_hcd = s->private;
2062
-
struct isp1362_ep *ep;
2063
-
int i;
2064
-
2065
-
seq_printf(s, "%s\n%s version %s\n",
2066
-
isp1362_hcd_to_hcd(isp1362_hcd)->product_desc, hcd_name, DRIVER_VERSION);
2067
-
2068
-
/* collect statistics to help estimate potential win for
2069
-
* DMA engines that care about alignment (PXA)
2070
-
*/
2071
-
seq_printf(s, "alignment: 16b/%ld 8b/%ld 4b/%ld 2b/%ld 1b/%ld\n",
2072
-
isp1362_hcd->stat16, isp1362_hcd->stat8, isp1362_hcd->stat4,
2073
-
isp1362_hcd->stat2, isp1362_hcd->stat1);
2074
-
seq_printf(s, "max # ptds in ATL fifo: %d\n", isp1362_hcd->atl_queue.stat_maxptds);
2075
-
seq_printf(s, "max # ptds in INTL fifo: %d\n", isp1362_hcd->intl_queue.stat_maxptds);
2076
-
seq_printf(s, "max # ptds in ISTL fifo: %d\n",
2077
-
max(isp1362_hcd->istl_queue[0] .stat_maxptds,
2078
-
isp1362_hcd->istl_queue[1] .stat_maxptds));
2079
-
2080
-
/* FIXME: don't show the following in suspended state */
2081
-
spin_lock_irq(&isp1362_hcd->lock);
2082
-
2083
-
dump_irq(s, "hc_irq_enable", isp1362_read_reg16(isp1362_hcd, HCuPINTENB));
2084
-
dump_irq(s, "hc_irq_status", isp1362_read_reg16(isp1362_hcd, HCuPINT));
2085
-
dump_int(s, "ohci_int_enable", isp1362_read_reg32(isp1362_hcd, HCINTENB));
2086
-
dump_int(s, "ohci_int_status", isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
2087
-
dump_ctrl(s, "ohci_control", isp1362_read_reg32(isp1362_hcd, HCCONTROL));
2088
-
2089
-
for (i = 0; i < NUM_ISP1362_IRQS; i++)
2090
-
if (isp1362_hcd->irq_stat[i])
2091
-
seq_printf(s, "%-15s: %d\n",
2092
-
ISP1362_INT_NAME(i), isp1362_hcd->irq_stat[i]);
2093
-
2094
-
dump_regs(s, isp1362_hcd);
2095
-
list_for_each_entry(ep, &isp1362_hcd->async, schedule) {
2096
-
struct urb *urb;
2097
-
2098
-
seq_printf(s, "%p, ep%d%s, maxpacket %d:\n", ep, ep->epnum,
2099
-
({
2100
-
char *s;
2101
-
switch (ep->nextpid) {
2102
-
case USB_PID_IN:
2103
-
s = "in";
2104
-
break;
2105
-
case USB_PID_OUT:
2106
-
s = "out";
2107
-
break;
2108
-
case USB_PID_SETUP:
2109
-
s = "setup";
2110
-
break;
2111
-
case USB_PID_ACK:
2112
-
s = "status";
2113
-
break;
2114
-
default:
2115
-
s = "?";
2116
-
break;
2117
-
}
2118
-
s;}), ep->maxpacket) ;
2119
-
list_for_each_entry(urb, &ep->hep->urb_list, urb_list) {
2120
-
seq_printf(s, " urb%p, %d/%d\n", urb,
2121
-
urb->actual_length,
2122
-
urb->transfer_buffer_length);
2123
-
}
2124
-
}
2125
-
if (!list_empty(&isp1362_hcd->async))
2126
-
seq_printf(s, "\n");
2127
-
dump_ptd_queue(&isp1362_hcd->atl_queue);
2128
-
2129
-
seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
2130
-
2131
-
list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) {
2132
-
seq_printf(s, "branch:%2d load:%3d PTD[%d] $%04x:\n", ep->branch,
2133
-
isp1362_hcd->load[ep->branch], ep->ptd_index, ep->ptd_offset);
2134
-
2135
-
seq_printf(s, " %d/%p (%sdev%d ep%d%s max %d)\n",
2136
-
ep->interval, ep,
2137
-
(ep->udev->speed == USB_SPEED_FULL) ? "" : "ls ",
2138
-
ep->udev->devnum, ep->epnum,
2139
-
(ep->epnum == 0) ? "" :
2140
-
((ep->nextpid == USB_PID_IN) ?
2141
-
"in" : "out"), ep->maxpacket);
2142
-
}
2143
-
dump_ptd_queue(&isp1362_hcd->intl_queue);
2144
-
2145
-
seq_printf(s, "ISO:\n");
2146
-
2147
-
list_for_each_entry(ep, &isp1362_hcd->isoc, schedule) {
2148
-
seq_printf(s, " %d/%p (%sdev%d ep%d%s max %d)\n",
2149
-
ep->interval, ep,
2150
-
(ep->udev->speed == USB_SPEED_FULL) ? "" : "ls ",
2151
-
ep->udev->devnum, ep->epnum,
2152
-
(ep->epnum == 0) ? "" :
2153
-
((ep->nextpid == USB_PID_IN) ?
2154
-
"in" : "out"), ep->maxpacket);
2155
-
}
2156
-
2157
-
spin_unlock_irq(&isp1362_hcd->lock);
2158
-
seq_printf(s, "\n");
2159
-
2160
-
return 0;
2161
-
}
2162
-
DEFINE_SHOW_ATTRIBUTE(isp1362);
2163
-
2164
-
/* expect just one isp1362_hcd per system */
2165
-
static void create_debug_file(struct isp1362_hcd *isp1362_hcd)
2166
-
{
2167
-
debugfs_create_file("isp1362", S_IRUGO, usb_debug_root, isp1362_hcd,
2168
-
&isp1362_fops);
2169
-
}
2170
-
2171
-
static void remove_debug_file(struct isp1362_hcd *isp1362_hcd)
2172
-
{
2173
-
debugfs_lookup_and_remove("isp1362", usb_debug_root);
2174
-
}
2175
-
2176
-
/*-------------------------------------------------------------------------*/
2177
-
2178
-
static void __isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd)
2179
-
{
2180
-
int tmp = 20;
2181
-
2182
-
isp1362_write_reg16(isp1362_hcd, HCSWRES, HCSWRES_MAGIC);
2183
-
isp1362_write_reg32(isp1362_hcd, HCCMDSTAT, OHCI_HCR);
2184
-
while (--tmp) {
2185
-
mdelay(1);
2186
-
if (!(isp1362_read_reg32(isp1362_hcd, HCCMDSTAT) & OHCI_HCR))
2187
-
break;
2188
-
}
2189
-
if (!tmp)
2190
-
pr_err("Software reset timeout\n");
2191
-
}
2192
-
2193
-
static void isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd)
2194
-
{
2195
-
unsigned long flags;
2196
-
2197
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2198
-
__isp1362_sw_reset(isp1362_hcd);
2199
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2200
-
}
2201
-
2202
-
static int isp1362_mem_config(struct usb_hcd *hcd)
2203
-
{
2204
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2205
-
unsigned long flags;
2206
-
u32 total;
2207
-
u16 istl_size = ISP1362_ISTL_BUFSIZE;
2208
-
u16 intl_blksize = ISP1362_INTL_BLKSIZE + PTD_HEADER_SIZE;
2209
-
u16 intl_size = ISP1362_INTL_BUFFERS * intl_blksize;
2210
-
u16 atl_blksize = ISP1362_ATL_BLKSIZE + PTD_HEADER_SIZE;
2211
-
u16 atl_buffers = (ISP1362_BUF_SIZE - (istl_size + intl_size)) / atl_blksize;
2212
-
u16 atl_size;
2213
-
int i;
2214
-
2215
-
WARN_ON(istl_size & 3);
2216
-
WARN_ON(atl_blksize & 3);
2217
-
WARN_ON(intl_blksize & 3);
2218
-
WARN_ON(atl_blksize < PTD_HEADER_SIZE);
2219
-
WARN_ON(intl_blksize < PTD_HEADER_SIZE);
2220
-
2221
-
BUG_ON((unsigned)ISP1362_INTL_BUFFERS > 32);
2222
-
if (atl_buffers > 32)
2223
-
atl_buffers = 32;
2224
-
atl_size = atl_buffers * atl_blksize;
2225
-
total = atl_size + intl_size + istl_size;
2226
-
dev_info(hcd->self.controller, "ISP1362 Memory usage:\n");
2227
-
dev_info(hcd->self.controller, " ISTL: 2 * %4d: %4d @ $%04x:$%04x\n",
2228
-
istl_size / 2, istl_size, 0, istl_size / 2);
2229
-
dev_info(hcd->self.controller, " INTL: %4d * (%3zu+8): %4d @ $%04x\n",
2230
-
ISP1362_INTL_BUFFERS, intl_blksize - PTD_HEADER_SIZE,
2231
-
intl_size, istl_size);
2232
-
dev_info(hcd->self.controller, " ATL : %4d * (%3zu+8): %4d @ $%04x\n",
2233
-
atl_buffers, atl_blksize - PTD_HEADER_SIZE,
2234
-
atl_size, istl_size + intl_size);
2235
-
dev_info(hcd->self.controller, " USED/FREE: %4d %4d\n", total,
2236
-
ISP1362_BUF_SIZE - total);
2237
-
2238
-
if (total > ISP1362_BUF_SIZE) {
2239
-
dev_err(hcd->self.controller, "%s: Memory requested: %d, available %d\n",
2240
-
__func__, total, ISP1362_BUF_SIZE);
2241
-
return -ENOMEM;
2242
-
}
2243
-
2244
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2245
-
2246
-
for (i = 0; i < 2; i++) {
2247
-
isp1362_hcd->istl_queue[i].buf_start = i * istl_size / 2,
2248
-
isp1362_hcd->istl_queue[i].buf_size = istl_size / 2;
2249
-
isp1362_hcd->istl_queue[i].blk_size = 4;
2250
-
INIT_LIST_HEAD(&isp1362_hcd->istl_queue[i].active);
2251
-
snprintf(isp1362_hcd->istl_queue[i].name,
2252
-
sizeof(isp1362_hcd->istl_queue[i].name), "ISTL%d", i);
2253
-
DBG(3, "%s: %5s buf $%04x %d\n", __func__,
2254
-
isp1362_hcd->istl_queue[i].name,
2255
-
isp1362_hcd->istl_queue[i].buf_start,
2256
-
isp1362_hcd->istl_queue[i].buf_size);
2257
-
}
2258
-
isp1362_write_reg16(isp1362_hcd, HCISTLBUFSZ, istl_size / 2);
2259
-
2260
-
isp1362_hcd->intl_queue.buf_start = istl_size;
2261
-
isp1362_hcd->intl_queue.buf_size = intl_size;
2262
-
isp1362_hcd->intl_queue.buf_count = ISP1362_INTL_BUFFERS;
2263
-
isp1362_hcd->intl_queue.blk_size = intl_blksize;
2264
-
isp1362_hcd->intl_queue.buf_avail = isp1362_hcd->intl_queue.buf_count;
2265
-
isp1362_hcd->intl_queue.skip_map = ~0;
2266
-
INIT_LIST_HEAD(&isp1362_hcd->intl_queue.active);
2267
-
2268
-
isp1362_write_reg16(isp1362_hcd, HCINTLBUFSZ,
2269
-
isp1362_hcd->intl_queue.buf_size);
2270
-
isp1362_write_reg16(isp1362_hcd, HCINTLBLKSZ,
2271
-
isp1362_hcd->intl_queue.blk_size - PTD_HEADER_SIZE);
2272
-
isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0);
2273
-
isp1362_write_reg32(isp1362_hcd, HCINTLLAST,
2274
-
1 << (ISP1362_INTL_BUFFERS - 1));
2275
-
2276
-
isp1362_hcd->atl_queue.buf_start = istl_size + intl_size;
2277
-
isp1362_hcd->atl_queue.buf_size = atl_size;
2278
-
isp1362_hcd->atl_queue.buf_count = atl_buffers;
2279
-
isp1362_hcd->atl_queue.blk_size = atl_blksize;
2280
-
isp1362_hcd->atl_queue.buf_avail = isp1362_hcd->atl_queue.buf_count;
2281
-
isp1362_hcd->atl_queue.skip_map = ~0;
2282
-
INIT_LIST_HEAD(&isp1362_hcd->atl_queue.active);
2283
-
2284
-
isp1362_write_reg16(isp1362_hcd, HCATLBUFSZ,
2285
-
isp1362_hcd->atl_queue.buf_size);
2286
-
isp1362_write_reg16(isp1362_hcd, HCATLBLKSZ,
2287
-
isp1362_hcd->atl_queue.blk_size - PTD_HEADER_SIZE);
2288
-
isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0);
2289
-
isp1362_write_reg32(isp1362_hcd, HCATLLAST,
2290
-
1 << (atl_buffers - 1));
2291
-
2292
-
snprintf(isp1362_hcd->atl_queue.name,
2293
-
sizeof(isp1362_hcd->atl_queue.name), "ATL");
2294
-
snprintf(isp1362_hcd->intl_queue.name,
2295
-
sizeof(isp1362_hcd->intl_queue.name), "INTL");
2296
-
DBG(3, "%s: %5s buf $%04x %2d * %4d = %4d\n", __func__,
2297
-
isp1362_hcd->intl_queue.name,
2298
-
isp1362_hcd->intl_queue.buf_start,
2299
-
ISP1362_INTL_BUFFERS, isp1362_hcd->intl_queue.blk_size,
2300
-
isp1362_hcd->intl_queue.buf_size);
2301
-
DBG(3, "%s: %5s buf $%04x %2d * %4d = %4d\n", __func__,
2302
-
isp1362_hcd->atl_queue.name,
2303
-
isp1362_hcd->atl_queue.buf_start,
2304
-
atl_buffers, isp1362_hcd->atl_queue.blk_size,
2305
-
isp1362_hcd->atl_queue.buf_size);
2306
-
2307
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2308
-
2309
-
return 0;
2310
-
}
2311
-
2312
-
static int isp1362_hc_reset(struct usb_hcd *hcd)
2313
-
{
2314
-
int ret = 0;
2315
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2316
-
unsigned long t;
2317
-
unsigned long timeout = 100;
2318
-
unsigned long flags;
2319
-
int clkrdy = 0;
2320
-
2321
-
pr_debug("%s:\n", __func__);
2322
-
2323
-
if (isp1362_hcd->board && isp1362_hcd->board->reset) {
2324
-
isp1362_hcd->board->reset(hcd->self.controller, 1);
2325
-
msleep(20);
2326
-
if (isp1362_hcd->board->clock)
2327
-
isp1362_hcd->board->clock(hcd->self.controller, 1);
2328
-
isp1362_hcd->board->reset(hcd->self.controller, 0);
2329
-
} else
2330
-
isp1362_sw_reset(isp1362_hcd);
2331
-
2332
-
/* chip has been reset. First we need to see a clock */
2333
-
t = jiffies + msecs_to_jiffies(timeout);
2334
-
while (!clkrdy && time_before_eq(jiffies, t)) {
2335
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2336
-
clkrdy = isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_CLKRDY;
2337
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2338
-
if (!clkrdy)
2339
-
msleep(4);
2340
-
}
2341
-
2342
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2343
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_CLKRDY);
2344
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2345
-
if (!clkrdy) {
2346
-
pr_err("Clock not ready after %lums\n", timeout);
2347
-
ret = -ENODEV;
2348
-
}
2349
-
return ret;
2350
-
}
2351
-
2352
-
static void isp1362_hc_stop(struct usb_hcd *hcd)
2353
-
{
2354
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2355
-
unsigned long flags;
2356
-
u32 tmp;
2357
-
2358
-
pr_debug("%s:\n", __func__);
2359
-
2360
-
timer_delete_sync(&hcd->rh_timer);
2361
-
2362
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2363
-
2364
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
2365
-
2366
-
/* Switch off power for all ports */
2367
-
tmp = isp1362_read_reg32(isp1362_hcd, HCRHDESCA);
2368
-
tmp &= ~(RH_A_NPS | RH_A_PSM);
2369
-
isp1362_write_reg32(isp1362_hcd, HCRHDESCA, tmp);
2370
-
isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS);
2371
-
2372
-
/* Reset the chip */
2373
-
if (isp1362_hcd->board && isp1362_hcd->board->reset)
2374
-
isp1362_hcd->board->reset(hcd->self.controller, 1);
2375
-
else
2376
-
__isp1362_sw_reset(isp1362_hcd);
2377
-
2378
-
if (isp1362_hcd->board && isp1362_hcd->board->clock)
2379
-
isp1362_hcd->board->clock(hcd->self.controller, 0);
2380
-
2381
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2382
-
}
2383
-
2384
-
#ifdef CHIP_BUFFER_TEST
2385
-
static int isp1362_chip_test(struct isp1362_hcd *isp1362_hcd)
2386
-
{
2387
-
int ret = 0;
2388
-
u16 *ref;
2389
-
unsigned long flags;
2390
-
2391
-
ref = kmalloc(2 * ISP1362_BUF_SIZE, GFP_KERNEL);
2392
-
if (ref) {
2393
-
int offset;
2394
-
u16 *tst = &ref[ISP1362_BUF_SIZE / 2];
2395
-
2396
-
for (offset = 0; offset < ISP1362_BUF_SIZE / 2; offset++) {
2397
-
ref[offset] = ~offset;
2398
-
tst[offset] = offset;
2399
-
}
2400
-
2401
-
for (offset = 0; offset < 4; offset++) {
2402
-
int j;
2403
-
2404
-
for (j = 0; j < 8; j++) {
2405
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2406
-
isp1362_write_buffer(isp1362_hcd, (u8 *)ref + offset, 0, j);
2407
-
isp1362_read_buffer(isp1362_hcd, (u8 *)tst + offset, 0, j);
2408
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2409
-
2410
-
if (memcmp(ref, tst, j)) {
2411
-
ret = -ENODEV;
2412
-
pr_err("%s: memory check with %d byte offset %d failed\n",
2413
-
__func__, j, offset);
2414
-
dump_data((u8 *)ref + offset, j);
2415
-
dump_data((u8 *)tst + offset, j);
2416
-
}
2417
-
}
2418
-
}
2419
-
2420
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2421
-
isp1362_write_buffer(isp1362_hcd, ref, 0, ISP1362_BUF_SIZE);
2422
-
isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2423
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2424
-
2425
-
if (memcmp(ref, tst, ISP1362_BUF_SIZE)) {
2426
-
ret = -ENODEV;
2427
-
pr_err("%s: memory check failed\n", __func__);
2428
-
dump_data((u8 *)tst, ISP1362_BUF_SIZE / 2);
2429
-
}
2430
-
2431
-
for (offset = 0; offset < 256; offset++) {
2432
-
int test_size = 0;
2433
-
2434
-
yield();
2435
-
2436
-
memset(tst, 0, ISP1362_BUF_SIZE);
2437
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2438
-
isp1362_write_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2439
-
isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2440
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2441
-
if (memcmp(tst, tst + (ISP1362_BUF_SIZE / (2 * sizeof(*tst))),
2442
-
ISP1362_BUF_SIZE / 2)) {
2443
-
pr_err("%s: Failed to clear buffer\n", __func__);
2444
-
dump_data((u8 *)tst, ISP1362_BUF_SIZE);
2445
-
break;
2446
-
}
2447
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2448
-
isp1362_write_buffer(isp1362_hcd, ref, offset * 2, PTD_HEADER_SIZE);
2449
-
isp1362_write_buffer(isp1362_hcd, ref + PTD_HEADER_SIZE / sizeof(*ref),
2450
-
offset * 2 + PTD_HEADER_SIZE, test_size);
2451
-
isp1362_read_buffer(isp1362_hcd, tst, offset * 2,
2452
-
PTD_HEADER_SIZE + test_size);
2453
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2454
-
if (memcmp(ref, tst, PTD_HEADER_SIZE + test_size)) {
2455
-
dump_data(((u8 *)ref) + offset, PTD_HEADER_SIZE + test_size);
2456
-
dump_data((u8 *)tst, PTD_HEADER_SIZE + test_size);
2457
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2458
-
isp1362_read_buffer(isp1362_hcd, tst, offset * 2,
2459
-
PTD_HEADER_SIZE + test_size);
2460
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2461
-
if (memcmp(ref, tst, PTD_HEADER_SIZE + test_size)) {
2462
-
ret = -ENODEV;
2463
-
pr_err("%s: memory check with offset %02x failed\n",
2464
-
__func__, offset);
2465
-
break;
2466
-
}
2467
-
pr_warn("%s: memory check with offset %02x ok after second read\n",
2468
-
__func__, offset);
2469
-
}
2470
-
}
2471
-
kfree(ref);
2472
-
}
2473
-
return ret;
2474
-
}
2475
-
#endif
2476
-
2477
-
static int isp1362_hc_start(struct usb_hcd *hcd)
2478
-
{
2479
-
int ret;
2480
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2481
-
struct isp1362_platform_data *board = isp1362_hcd->board;
2482
-
u16 hwcfg;
2483
-
u16 chipid;
2484
-
unsigned long flags;
2485
-
2486
-
pr_debug("%s:\n", __func__);
2487
-
2488
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2489
-
chipid = isp1362_read_reg16(isp1362_hcd, HCCHIPID);
2490
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2491
-
2492
-
if ((chipid & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
2493
-
pr_err("%s: Invalid chip ID %04x\n", __func__, chipid);
2494
-
return -ENODEV;
2495
-
}
2496
-
2497
-
#ifdef CHIP_BUFFER_TEST
2498
-
ret = isp1362_chip_test(isp1362_hcd);
2499
-
if (ret)
2500
-
return -ENODEV;
2501
-
#endif
2502
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2503
-
/* clear interrupt status and disable all interrupt sources */
2504
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, 0xff);
2505
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
2506
-
2507
-
/* HW conf */
2508
-
hwcfg = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
2509
-
if (board->sel15Kres)
2510
-
hwcfg |= HCHWCFG_PULLDOWN_DS2 |
2511
-
((MAX_ROOT_PORTS > 1) ? HCHWCFG_PULLDOWN_DS1 : 0);
2512
-
if (board->clknotstop)
2513
-
hwcfg |= HCHWCFG_CLKNOTSTOP;
2514
-
if (board->oc_enable)
2515
-
hwcfg |= HCHWCFG_ANALOG_OC;
2516
-
if (board->int_act_high)
2517
-
hwcfg |= HCHWCFG_INT_POL;
2518
-
if (board->int_edge_triggered)
2519
-
hwcfg |= HCHWCFG_INT_TRIGGER;
2520
-
if (board->dreq_act_high)
2521
-
hwcfg |= HCHWCFG_DREQ_POL;
2522
-
if (board->dack_act_high)
2523
-
hwcfg |= HCHWCFG_DACK_POL;
2524
-
isp1362_write_reg16(isp1362_hcd, HCHWCFG, hwcfg);
2525
-
isp1362_show_reg(isp1362_hcd, HCHWCFG);
2526
-
isp1362_write_reg16(isp1362_hcd, HCDMACFG, 0);
2527
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2528
-
2529
-
ret = isp1362_mem_config(hcd);
2530
-
if (ret)
2531
-
return ret;
2532
-
2533
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2534
-
2535
-
/* Root hub conf */
2536
-
isp1362_hcd->rhdesca = 0;
2537
-
if (board->no_power_switching)
2538
-
isp1362_hcd->rhdesca |= RH_A_NPS;
2539
-
if (board->power_switching_mode)
2540
-
isp1362_hcd->rhdesca |= RH_A_PSM;
2541
-
if (board->potpg)
2542
-
isp1362_hcd->rhdesca |= (board->potpg << 24) & RH_A_POTPGT;
2543
-
else
2544
-
isp1362_hcd->rhdesca |= (25 << 24) & RH_A_POTPGT;
2545
-
2546
-
isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca & ~RH_A_OCPM);
2547
-
isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca | RH_A_OCPM);
2548
-
isp1362_hcd->rhdesca = isp1362_read_reg32(isp1362_hcd, HCRHDESCA);
2549
-
2550
-
isp1362_hcd->rhdescb = RH_B_PPCM;
2551
-
isp1362_write_reg32(isp1362_hcd, HCRHDESCB, isp1362_hcd->rhdescb);
2552
-
isp1362_hcd->rhdescb = isp1362_read_reg32(isp1362_hcd, HCRHDESCB);
2553
-
2554
-
isp1362_read_reg32(isp1362_hcd, HCFMINTVL);
2555
-
isp1362_write_reg32(isp1362_hcd, HCFMINTVL, (FSMP(FI) << 16) | FI);
2556
-
isp1362_write_reg32(isp1362_hcd, HCLSTHRESH, LSTHRESH);
2557
-
2558
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2559
-
2560
-
isp1362_hcd->hc_control = OHCI_USB_OPER;
2561
-
hcd->state = HC_STATE_RUNNING;
2562
-
2563
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2564
-
/* Set up interrupts */
2565
-
isp1362_hcd->intenb = OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE;
2566
-
isp1362_hcd->intenb |= OHCI_INTR_RD;
2567
-
isp1362_hcd->irqenb = HCuPINT_OPR | HCuPINT_SUSP;
2568
-
isp1362_write_reg32(isp1362_hcd, HCINTENB, isp1362_hcd->intenb);
2569
-
isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
2570
-
2571
-
/* Go operational */
2572
-
isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
2573
-
/* enable global power */
2574
-
isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC | RH_HS_DRWE);
2575
-
2576
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2577
-
2578
-
return 0;
2579
-
}
2580
-
2581
-
/*-------------------------------------------------------------------------*/
2582
-
2583
-
static const struct hc_driver isp1362_hc_driver = {
2584
-
.description = hcd_name,
2585
-
.product_desc = "ISP1362 Host Controller",
2586
-
.hcd_priv_size = sizeof(struct isp1362_hcd),
2587
-
2588
-
.irq = isp1362_irq,
2589
-
.flags = HCD_USB11 | HCD_MEMORY,
2590
-
2591
-
.reset = isp1362_hc_reset,
2592
-
.start = isp1362_hc_start,
2593
-
.stop = isp1362_hc_stop,
2594
-
2595
-
.urb_enqueue = isp1362_urb_enqueue,
2596
-
.urb_dequeue = isp1362_urb_dequeue,
2597
-
.endpoint_disable = isp1362_endpoint_disable,
2598
-
2599
-
.get_frame_number = isp1362_get_frame,
2600
-
2601
-
.hub_status_data = isp1362_hub_status_data,
2602
-
.hub_control = isp1362_hub_control,
2603
-
.bus_suspend = isp1362_bus_suspend,
2604
-
.bus_resume = isp1362_bus_resume,
2605
-
};
2606
-
2607
-
/*-------------------------------------------------------------------------*/
2608
-
2609
-
static void isp1362_remove(struct platform_device *pdev)
2610
-
{
2611
-
struct usb_hcd *hcd = platform_get_drvdata(pdev);
2612
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2613
-
2614
-
remove_debug_file(isp1362_hcd);
2615
-
DBG(0, "%s: Removing HCD\n", __func__);
2616
-
usb_remove_hcd(hcd);
2617
-
DBG(0, "%s: put_hcd\n", __func__);
2618
-
usb_put_hcd(hcd);
2619
-
DBG(0, "%s: Done\n", __func__);
2620
-
}
2621
-
2622
-
static int isp1362_probe(struct platform_device *pdev)
2623
-
{
2624
-
struct usb_hcd *hcd;
2625
-
struct isp1362_hcd *isp1362_hcd;
2626
-
struct resource *data, *irq_res;
2627
-
void __iomem *addr_reg;
2628
-
void __iomem *data_reg;
2629
-
int irq;
2630
-
int retval = 0;
2631
-
unsigned int irq_flags = 0;
2632
-
2633
-
if (usb_disabled())
2634
-
return -ENODEV;
2635
-
2636
-
/* basic sanity checks first. board-specific init logic should
2637
-
* have initialized this the three resources and probably board
2638
-
* specific platform_data. we don't probe for IRQs, and do only
2639
-
* minimal sanity checking.
2640
-
*/
2641
-
if (pdev->num_resources < 3)
2642
-
return -ENODEV;
2643
-
2644
-
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2645
-
if (!irq_res)
2646
-
return -ENODEV;
2647
-
2648
-
irq = irq_res->start;
2649
-
2650
-
addr_reg = devm_platform_ioremap_resource(pdev, 1);
2651
-
if (IS_ERR(addr_reg))
2652
-
return PTR_ERR(addr_reg);
2653
-
2654
-
data_reg = devm_platform_get_and_ioremap_resource(pdev, 0, &data);
2655
-
if (IS_ERR(data_reg))
2656
-
return PTR_ERR(data_reg);
2657
-
2658
-
/* allocate and initialize hcd */
2659
-
hcd = usb_create_hcd(&isp1362_hc_driver, &pdev->dev, dev_name(&pdev->dev));
2660
-
if (!hcd)
2661
-
return -ENOMEM;
2662
-
2663
-
hcd->rsrc_start = data->start;
2664
-
isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2665
-
isp1362_hcd->data_reg = data_reg;
2666
-
isp1362_hcd->addr_reg = addr_reg;
2667
-
2668
-
isp1362_hcd->next_statechange = jiffies;
2669
-
spin_lock_init(&isp1362_hcd->lock);
2670
-
INIT_LIST_HEAD(&isp1362_hcd->async);
2671
-
INIT_LIST_HEAD(&isp1362_hcd->periodic);
2672
-
INIT_LIST_HEAD(&isp1362_hcd->isoc);
2673
-
INIT_LIST_HEAD(&isp1362_hcd->remove_list);
2674
-
isp1362_hcd->board = dev_get_platdata(&pdev->dev);
2675
-
#if USE_PLATFORM_DELAY
2676
-
if (!isp1362_hcd->board->delay) {
2677
-
dev_err(hcd->self.controller, "No platform delay function given\n");
2678
-
retval = -ENODEV;
2679
-
goto err;
2680
-
}
2681
-
#endif
2682
-
2683
-
if (irq_res->flags & IORESOURCE_IRQ_HIGHEDGE)
2684
-
irq_flags |= IRQF_TRIGGER_RISING;
2685
-
if (irq_res->flags & IORESOURCE_IRQ_LOWEDGE)
2686
-
irq_flags |= IRQF_TRIGGER_FALLING;
2687
-
if (irq_res->flags & IORESOURCE_IRQ_HIGHLEVEL)
2688
-
irq_flags |= IRQF_TRIGGER_HIGH;
2689
-
if (irq_res->flags & IORESOURCE_IRQ_LOWLEVEL)
2690
-
irq_flags |= IRQF_TRIGGER_LOW;
2691
-
2692
-
retval = usb_add_hcd(hcd, irq, irq_flags | IRQF_SHARED);
2693
-
if (retval != 0)
2694
-
goto err;
2695
-
device_wakeup_enable(hcd->self.controller);
2696
-
2697
-
dev_info(&pdev->dev, "%s, irq %d\n", hcd->product_desc, irq);
2698
-
2699
-
create_debug_file(isp1362_hcd);
2700
-
2701
-
return 0;
2702
-
2703
-
err:
2704
-
usb_put_hcd(hcd);
2705
-
2706
-
return retval;
2707
-
}
2708
-
2709
-
#ifdef CONFIG_PM
2710
-
static int isp1362_suspend(struct platform_device *pdev, pm_message_t state)
2711
-
{
2712
-
struct usb_hcd *hcd = platform_get_drvdata(pdev);
2713
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2714
-
unsigned long flags;
2715
-
int retval = 0;
2716
-
2717
-
DBG(0, "%s: Suspending device\n", __func__);
2718
-
2719
-
if (state.event == PM_EVENT_FREEZE) {
2720
-
DBG(0, "%s: Suspending root hub\n", __func__);
2721
-
retval = isp1362_bus_suspend(hcd);
2722
-
} else {
2723
-
DBG(0, "%s: Suspending RH ports\n", __func__);
2724
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2725
-
isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS);
2726
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2727
-
}
2728
-
if (retval == 0)
2729
-
pdev->dev.power.power_state = state;
2730
-
return retval;
2731
-
}
2732
-
2733
-
static int isp1362_resume(struct platform_device *pdev)
2734
-
{
2735
-
struct usb_hcd *hcd = platform_get_drvdata(pdev);
2736
-
struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2737
-
unsigned long flags;
2738
-
2739
-
DBG(0, "%s: Resuming\n", __func__);
2740
-
2741
-
if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
2742
-
DBG(0, "%s: Resume RH ports\n", __func__);
2743
-
spin_lock_irqsave(&isp1362_hcd->lock, flags);
2744
-
isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC);
2745
-
spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2746
-
return 0;
2747
-
}
2748
-
2749
-
pdev->dev.power.power_state = PMSG_ON;
2750
-
2751
-
return isp1362_bus_resume(isp1362_hcd_to_hcd(isp1362_hcd));
2752
-
}
2753
-
#else
2754
-
#define isp1362_suspend NULL
2755
-
#define isp1362_resume NULL
2756
-
#endif
2757
-
2758
-
static struct platform_driver isp1362_driver = {
2759
-
.probe = isp1362_probe,
2760
-
.remove = isp1362_remove,
2761
-
2762
-
.suspend = isp1362_suspend,
2763
-
.resume = isp1362_resume,
2764
-
.driver = {
2765
-
.name = hcd_name,
2766
-
},
2767
-
};
2768
-
2769
-
module_platform_driver(isp1362_driver);
-914
drivers/usb/host/isp1362.h
-914
drivers/usb/host/isp1362.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
2
-
/*
3
-
* ISP1362 HCD (Host Controller Driver) for USB.
4
-
*
5
-
* COPYRIGHT (C) by L. Wassmann <LW@KARO-electronics.de>
6
-
*/
7
-
8
-
/* ------------------------------------------------------------------------- */
9
-
10
-
#define MAX_ROOT_PORTS 2
11
-
12
-
#define USE_32BIT 0
13
-
14
-
/* These options are mutually exclusive */
15
-
#define USE_PLATFORM_DELAY 0
16
-
#define USE_NDELAY 0
17
-
18
-
#define DUMMY_DELAY_ACCESS do {} while (0)
19
-
20
-
/* ------------------------------------------------------------------------- */
21
-
22
-
#define USB_RESET_WIDTH 50
23
-
#define MAX_XFER_SIZE 1023
24
-
25
-
/* Buffer sizes */
26
-
#define ISP1362_BUF_SIZE 4096
27
-
#define ISP1362_ISTL_BUFSIZE 512
28
-
#define ISP1362_INTL_BLKSIZE 64
29
-
#define ISP1362_INTL_BUFFERS 16
30
-
#define ISP1362_ATL_BLKSIZE 64
31
-
32
-
#define ISP1362_REG_WRITE_OFFSET 0x80
33
-
34
-
#define REG_WIDTH_16 0x000
35
-
#define REG_WIDTH_32 0x100
36
-
#define REG_WIDTH_MASK 0x100
37
-
#define REG_NO_MASK 0x0ff
38
-
39
-
#ifdef ISP1362_DEBUG
40
-
typedef const unsigned int isp1362_reg_t;
41
-
42
-
#define REG_ACCESS_R 0x200
43
-
#define REG_ACCESS_W 0x400
44
-
#define REG_ACCESS_RW 0x600
45
-
#define REG_ACCESS_MASK 0x600
46
-
47
-
#define ISP1362_REG_NO(r) ((r) & REG_NO_MASK)
48
-
49
-
#define ISP1362_REG(name, addr, width, rw) \
50
-
static isp1362_reg_t ISP1362_REG_##name = ((addr) | (width) | (rw))
51
-
52
-
#define REG_ACCESS_TEST(r) BUG_ON(((r) & ISP1362_REG_WRITE_OFFSET) && !((r) & REG_ACCESS_W))
53
-
#define REG_WIDTH_TEST(r, w) BUG_ON(((r) & REG_WIDTH_MASK) != (w))
54
-
#else
55
-
typedef const unsigned char isp1362_reg_t;
56
-
#define ISP1362_REG_NO(r) (r)
57
-
58
-
#define ISP1362_REG(name, addr, width, rw) \
59
-
static isp1362_reg_t __maybe_unused ISP1362_REG_##name = addr
60
-
61
-
#define REG_ACCESS_TEST(r) do {} while (0)
62
-
#define REG_WIDTH_TEST(r, w) do {} while (0)
63
-
#endif
64
-
65
-
/* OHCI compatible registers */
66
-
/*
67
-
* Note: Some of the ISP1362 'OHCI' registers implement only
68
-
* a subset of the bits defined in the OHCI spec.
69
-
*
70
-
* Bitmasks for the individual bits of these registers are defined in "ohci.h"
71
-
*/
72
-
ISP1362_REG(HCREVISION, 0x00, REG_WIDTH_32, REG_ACCESS_R);
73
-
ISP1362_REG(HCCONTROL, 0x01, REG_WIDTH_32, REG_ACCESS_RW);
74
-
ISP1362_REG(HCCMDSTAT, 0x02, REG_WIDTH_32, REG_ACCESS_RW);
75
-
ISP1362_REG(HCINTSTAT, 0x03, REG_WIDTH_32, REG_ACCESS_RW);
76
-
ISP1362_REG(HCINTENB, 0x04, REG_WIDTH_32, REG_ACCESS_RW);
77
-
ISP1362_REG(HCINTDIS, 0x05, REG_WIDTH_32, REG_ACCESS_RW);
78
-
ISP1362_REG(HCFMINTVL, 0x0d, REG_WIDTH_32, REG_ACCESS_RW);
79
-
ISP1362_REG(HCFMREM, 0x0e, REG_WIDTH_32, REG_ACCESS_RW);
80
-
ISP1362_REG(HCFMNUM, 0x0f, REG_WIDTH_32, REG_ACCESS_RW);
81
-
ISP1362_REG(HCLSTHRESH, 0x11, REG_WIDTH_32, REG_ACCESS_RW);
82
-
ISP1362_REG(HCRHDESCA, 0x12, REG_WIDTH_32, REG_ACCESS_RW);
83
-
ISP1362_REG(HCRHDESCB, 0x13, REG_WIDTH_32, REG_ACCESS_RW);
84
-
ISP1362_REG(HCRHSTATUS, 0x14, REG_WIDTH_32, REG_ACCESS_RW);
85
-
ISP1362_REG(HCRHPORT1, 0x15, REG_WIDTH_32, REG_ACCESS_RW);
86
-
ISP1362_REG(HCRHPORT2, 0x16, REG_WIDTH_32, REG_ACCESS_RW);
87
-
88
-
/* Philips ISP1362 specific registers */
89
-
ISP1362_REG(HCHWCFG, 0x20, REG_WIDTH_16, REG_ACCESS_RW);
90
-
#define HCHWCFG_DISABLE_SUSPEND (1 << 15)
91
-
#define HCHWCFG_GLOBAL_PWRDOWN (1 << 14)
92
-
#define HCHWCFG_PULLDOWN_DS2 (1 << 13)
93
-
#define HCHWCFG_PULLDOWN_DS1 (1 << 12)
94
-
#define HCHWCFG_CLKNOTSTOP (1 << 11)
95
-
#define HCHWCFG_ANALOG_OC (1 << 10)
96
-
#define HCHWCFG_ONEINT (1 << 9)
97
-
#define HCHWCFG_DACK_MODE (1 << 8)
98
-
#define HCHWCFG_ONEDMA (1 << 7)
99
-
#define HCHWCFG_DACK_POL (1 << 6)
100
-
#define HCHWCFG_DREQ_POL (1 << 5)
101
-
#define HCHWCFG_DBWIDTH_MASK (0x03 << 3)
102
-
#define HCHWCFG_DBWIDTH(n) (((n) << 3) & HCHWCFG_DBWIDTH_MASK)
103
-
#define HCHWCFG_INT_POL (1 << 2)
104
-
#define HCHWCFG_INT_TRIGGER (1 << 1)
105
-
#define HCHWCFG_INT_ENABLE (1 << 0)
106
-
107
-
ISP1362_REG(HCDMACFG, 0x21, REG_WIDTH_16, REG_ACCESS_RW);
108
-
#define HCDMACFG_CTR_ENABLE (1 << 7)
109
-
#define HCDMACFG_BURST_LEN_MASK (0x03 << 5)
110
-
#define HCDMACFG_BURST_LEN(n) (((n) << 5) & HCDMACFG_BURST_LEN_MASK)
111
-
#define HCDMACFG_BURST_LEN_1 HCDMACFG_BURST_LEN(0)
112
-
#define HCDMACFG_BURST_LEN_4 HCDMACFG_BURST_LEN(1)
113
-
#define HCDMACFG_BURST_LEN_8 HCDMACFG_BURST_LEN(2)
114
-
#define HCDMACFG_DMA_ENABLE (1 << 4)
115
-
#define HCDMACFG_BUF_TYPE_MASK (0x07 << 1)
116
-
#define HCDMACFG_BUF_TYPE(n) (((n) << 1) & HCDMACFG_BUF_TYPE_MASK)
117
-
#define HCDMACFG_BUF_ISTL0 HCDMACFG_BUF_TYPE(0)
118
-
#define HCDMACFG_BUF_ISTL1 HCDMACFG_BUF_TYPE(1)
119
-
#define HCDMACFG_BUF_INTL HCDMACFG_BUF_TYPE(2)
120
-
#define HCDMACFG_BUF_ATL HCDMACFG_BUF_TYPE(3)
121
-
#define HCDMACFG_BUF_DIRECT HCDMACFG_BUF_TYPE(4)
122
-
#define HCDMACFG_DMA_RW_SELECT (1 << 0)
123
-
124
-
ISP1362_REG(HCXFERCTR, 0x22, REG_WIDTH_16, REG_ACCESS_RW);
125
-
126
-
ISP1362_REG(HCuPINT, 0x24, REG_WIDTH_16, REG_ACCESS_RW);
127
-
#define HCuPINT_SOF (1 << 0)
128
-
#define HCuPINT_ISTL0 (1 << 1)
129
-
#define HCuPINT_ISTL1 (1 << 2)
130
-
#define HCuPINT_EOT (1 << 3)
131
-
#define HCuPINT_OPR (1 << 4)
132
-
#define HCuPINT_SUSP (1 << 5)
133
-
#define HCuPINT_CLKRDY (1 << 6)
134
-
#define HCuPINT_INTL (1 << 7)
135
-
#define HCuPINT_ATL (1 << 8)
136
-
#define HCuPINT_OTG (1 << 9)
137
-
138
-
ISP1362_REG(HCuPINTENB, 0x25, REG_WIDTH_16, REG_ACCESS_RW);
139
-
/* same bit definitions apply as for HCuPINT */
140
-
141
-
ISP1362_REG(HCCHIPID, 0x27, REG_WIDTH_16, REG_ACCESS_R);
142
-
#define HCCHIPID_MASK 0xff00
143
-
#define HCCHIPID_MAGIC 0x3600
144
-
145
-
ISP1362_REG(HCSCRATCH, 0x28, REG_WIDTH_16, REG_ACCESS_RW);
146
-
147
-
ISP1362_REG(HCSWRES, 0x29, REG_WIDTH_16, REG_ACCESS_W);
148
-
#define HCSWRES_MAGIC 0x00f6
149
-
150
-
ISP1362_REG(HCBUFSTAT, 0x2c, REG_WIDTH_16, REG_ACCESS_RW);
151
-
#define HCBUFSTAT_ISTL0_FULL (1 << 0)
152
-
#define HCBUFSTAT_ISTL1_FULL (1 << 1)
153
-
#define HCBUFSTAT_INTL_ACTIVE (1 << 2)
154
-
#define HCBUFSTAT_ATL_ACTIVE (1 << 3)
155
-
#define HCBUFSTAT_RESET_HWPP (1 << 4)
156
-
#define HCBUFSTAT_ISTL0_ACTIVE (1 << 5)
157
-
#define HCBUFSTAT_ISTL1_ACTIVE (1 << 6)
158
-
#define HCBUFSTAT_ISTL0_DONE (1 << 8)
159
-
#define HCBUFSTAT_ISTL1_DONE (1 << 9)
160
-
#define HCBUFSTAT_PAIRED_PTDPP (1 << 10)
161
-
162
-
ISP1362_REG(HCDIRADDR, 0x32, REG_WIDTH_32, REG_ACCESS_RW);
163
-
#define HCDIRADDR_ADDR_MASK 0x0000ffff
164
-
#define HCDIRADDR_ADDR(n) (((n) << 0) & HCDIRADDR_ADDR_MASK)
165
-
#define HCDIRADDR_COUNT_MASK 0xffff0000
166
-
#define HCDIRADDR_COUNT(n) (((n) << 16) & HCDIRADDR_COUNT_MASK)
167
-
ISP1362_REG(HCDIRDATA, 0x45, REG_WIDTH_16, REG_ACCESS_RW);
168
-
169
-
ISP1362_REG(HCISTLBUFSZ, 0x30, REG_WIDTH_16, REG_ACCESS_RW);
170
-
ISP1362_REG(HCISTL0PORT, 0x40, REG_WIDTH_16, REG_ACCESS_RW);
171
-
ISP1362_REG(HCISTL1PORT, 0x42, REG_WIDTH_16, REG_ACCESS_RW);
172
-
ISP1362_REG(HCISTLRATE, 0x47, REG_WIDTH_16, REG_ACCESS_RW);
173
-
174
-
ISP1362_REG(HCINTLBUFSZ, 0x33, REG_WIDTH_16, REG_ACCESS_RW);
175
-
ISP1362_REG(HCINTLPORT, 0x43, REG_WIDTH_16, REG_ACCESS_RW);
176
-
ISP1362_REG(HCINTLBLKSZ, 0x53, REG_WIDTH_16, REG_ACCESS_RW);
177
-
ISP1362_REG(HCINTLDONE, 0x17, REG_WIDTH_32, REG_ACCESS_R);
178
-
ISP1362_REG(HCINTLSKIP, 0x18, REG_WIDTH_32, REG_ACCESS_RW);
179
-
ISP1362_REG(HCINTLLAST, 0x19, REG_WIDTH_32, REG_ACCESS_RW);
180
-
ISP1362_REG(HCINTLCURR, 0x1a, REG_WIDTH_16, REG_ACCESS_R);
181
-
182
-
ISP1362_REG(HCATLBUFSZ, 0x34, REG_WIDTH_16, REG_ACCESS_RW);
183
-
ISP1362_REG(HCATLPORT, 0x44, REG_WIDTH_16, REG_ACCESS_RW);
184
-
ISP1362_REG(HCATLBLKSZ, 0x54, REG_WIDTH_16, REG_ACCESS_RW);
185
-
ISP1362_REG(HCATLDONE, 0x1b, REG_WIDTH_32, REG_ACCESS_R);
186
-
ISP1362_REG(HCATLSKIP, 0x1c, REG_WIDTH_32, REG_ACCESS_RW);
187
-
ISP1362_REG(HCATLLAST, 0x1d, REG_WIDTH_32, REG_ACCESS_RW);
188
-
ISP1362_REG(HCATLCURR, 0x1e, REG_WIDTH_16, REG_ACCESS_R);
189
-
190
-
ISP1362_REG(HCATLDTC, 0x51, REG_WIDTH_16, REG_ACCESS_RW);
191
-
ISP1362_REG(HCATLDTCTO, 0x52, REG_WIDTH_16, REG_ACCESS_RW);
192
-
193
-
194
-
ISP1362_REG(OTGCONTROL, 0x62, REG_WIDTH_16, REG_ACCESS_RW);
195
-
ISP1362_REG(OTGSTATUS, 0x67, REG_WIDTH_16, REG_ACCESS_R);
196
-
ISP1362_REG(OTGINT, 0x68, REG_WIDTH_16, REG_ACCESS_RW);
197
-
ISP1362_REG(OTGINTENB, 0x69, REG_WIDTH_16, REG_ACCESS_RW);
198
-
ISP1362_REG(OTGTIMER, 0x6A, REG_WIDTH_16, REG_ACCESS_RW);
199
-
ISP1362_REG(OTGALTTMR, 0x6C, REG_WIDTH_16, REG_ACCESS_RW);
200
-
201
-
/* Philips transfer descriptor, cpu-endian */
202
-
struct ptd {
203
-
u16 count;
204
-
#define PTD_COUNT_MSK (0x3ff << 0)
205
-
#define PTD_TOGGLE_MSK (1 << 10)
206
-
#define PTD_ACTIVE_MSK (1 << 11)
207
-
#define PTD_CC_MSK (0xf << 12)
208
-
u16 mps;
209
-
#define PTD_MPS_MSK (0x3ff << 0)
210
-
#define PTD_SPD_MSK (1 << 10)
211
-
#define PTD_LAST_MSK (1 << 11)
212
-
#define PTD_EP_MSK (0xf << 12)
213
-
u16 len;
214
-
#define PTD_LEN_MSK (0x3ff << 0)
215
-
#define PTD_DIR_MSK (3 << 10)
216
-
#define PTD_DIR_SETUP (0)
217
-
#define PTD_DIR_OUT (1)
218
-
#define PTD_DIR_IN (2)
219
-
u16 faddr;
220
-
#define PTD_FA_MSK (0x7f << 0)
221
-
/* PTD Byte 7: [StartingFrame (if ISO PTD) | StartingFrame[0..4], PollingRate[0..2] (if INT PTD)] */
222
-
#define PTD_SF_ISO_MSK (0xff << 8)
223
-
#define PTD_SF_INT_MSK (0x1f << 8)
224
-
#define PTD_PR_MSK (0x07 << 13)
225
-
} __attribute__ ((packed, aligned(2)));
226
-
#define PTD_HEADER_SIZE sizeof(struct ptd)
227
-
228
-
/* ------------------------------------------------------------------------- */
229
-
/* Copied from ohci.h: */
230
-
/*
231
-
* Hardware transfer status codes -- CC from PTD
232
-
*/
233
-
#define PTD_CC_NOERROR 0x00
234
-
#define PTD_CC_CRC 0x01
235
-
#define PTD_CC_BITSTUFFING 0x02
236
-
#define PTD_CC_DATATOGGLEM 0x03
237
-
#define PTD_CC_STALL 0x04
238
-
#define PTD_DEVNOTRESP 0x05
239
-
#define PTD_PIDCHECKFAIL 0x06
240
-
#define PTD_UNEXPECTEDPID 0x07
241
-
#define PTD_DATAOVERRUN 0x08
242
-
#define PTD_DATAUNDERRUN 0x09
243
-
/* 0x0A, 0x0B reserved for hardware */
244
-
#define PTD_BUFFEROVERRUN 0x0C
245
-
#define PTD_BUFFERUNDERRUN 0x0D
246
-
/* 0x0E, 0x0F reserved for HCD */
247
-
#define PTD_NOTACCESSED 0x0F
248
-
249
-
250
-
/* map OHCI TD status codes (CC) to errno values */
251
-
static const int cc_to_error[16] = {
252
-
/* No Error */ 0,
253
-
/* CRC Error */ -EILSEQ,
254
-
/* Bit Stuff */ -EPROTO,
255
-
/* Data Togg */ -EILSEQ,
256
-
/* Stall */ -EPIPE,
257
-
/* DevNotResp */ -ETIMEDOUT,
258
-
/* PIDCheck */ -EPROTO,
259
-
/* UnExpPID */ -EPROTO,
260
-
/* DataOver */ -EOVERFLOW,
261
-
/* DataUnder */ -EREMOTEIO,
262
-
/* (for hw) */ -EIO,
263
-
/* (for hw) */ -EIO,
264
-
/* BufferOver */ -ECOMM,
265
-
/* BuffUnder */ -ENOSR,
266
-
/* (for HCD) */ -EALREADY,
267
-
/* (for HCD) */ -EALREADY
268
-
};
269
-
270
-
271
-
/*
272
-
* HcControl (control) register masks
273
-
*/
274
-
#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */
275
-
#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
276
-
#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */
277
-
278
-
/* pre-shifted values for HCFS */
279
-
# define OHCI_USB_RESET (0 << 6)
280
-
# define OHCI_USB_RESUME (1 << 6)
281
-
# define OHCI_USB_OPER (2 << 6)
282
-
# define OHCI_USB_SUSPEND (3 << 6)
283
-
284
-
/*
285
-
* HcCommandStatus (cmdstatus) register masks
286
-
*/
287
-
#define OHCI_HCR (1 << 0) /* host controller reset */
288
-
#define OHCI_SOC (3 << 16) /* scheduling overrun count */
289
-
290
-
/*
291
-
* masks used with interrupt registers:
292
-
* HcInterruptStatus (intrstatus)
293
-
* HcInterruptEnable (intrenable)
294
-
* HcInterruptDisable (intrdisable)
295
-
*/
296
-
#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */
297
-
#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */
298
-
#define OHCI_INTR_SF (1 << 2) /* start frame */
299
-
#define OHCI_INTR_RD (1 << 3) /* resume detect */
300
-
#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */
301
-
#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */
302
-
#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */
303
-
#define OHCI_INTR_OC (1 << 30) /* ownership change */
304
-
#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
305
-
306
-
/* roothub.portstatus [i] bits */
307
-
#define RH_PS_CCS 0x00000001 /* current connect status */
308
-
#define RH_PS_PES 0x00000002 /* port enable status*/
309
-
#define RH_PS_PSS 0x00000004 /* port suspend status */
310
-
#define RH_PS_POCI 0x00000008 /* port over current indicator */
311
-
#define RH_PS_PRS 0x00000010 /* port reset status */
312
-
#define RH_PS_PPS 0x00000100 /* port power status */
313
-
#define RH_PS_LSDA 0x00000200 /* low speed device attached */
314
-
#define RH_PS_CSC 0x00010000 /* connect status change */
315
-
#define RH_PS_PESC 0x00020000 /* port enable status change */
316
-
#define RH_PS_PSSC 0x00040000 /* port suspend status change */
317
-
#define RH_PS_OCIC 0x00080000 /* over current indicator change */
318
-
#define RH_PS_PRSC 0x00100000 /* port reset status change */
319
-
320
-
/* roothub.status bits */
321
-
#define RH_HS_LPS 0x00000001 /* local power status */
322
-
#define RH_HS_OCI 0x00000002 /* over current indicator */
323
-
#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
324
-
#define RH_HS_LPSC 0x00010000 /* local power status change */
325
-
#define RH_HS_OCIC 0x00020000 /* over current indicator change */
326
-
#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
327
-
328
-
/* roothub.b masks */
329
-
#define RH_B_DR 0x0000ffff /* device removable flags */
330
-
#define RH_B_PPCM 0xffff0000 /* port power control mask */
331
-
332
-
/* roothub.a masks */
333
-
#define RH_A_NDP (0xff << 0) /* number of downstream ports */
334
-
#define RH_A_PSM (1 << 8) /* power switching mode */
335
-
#define RH_A_NPS (1 << 9) /* no power switching */
336
-
#define RH_A_DT (1 << 10) /* device type (mbz) */
337
-
#define RH_A_OCPM (1 << 11) /* over current protection mode */
338
-
#define RH_A_NOCP (1 << 12) /* no over current protection */
339
-
#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
340
-
341
-
#define FI 0x2edf /* 12000 bits per frame (-1) */
342
-
#define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
343
-
#define LSTHRESH 0x628 /* lowspeed bit threshold */
344
-
345
-
/* ------------------------------------------------------------------------- */
346
-
347
-
/* PTD accessor macros. */
348
-
#define PTD_GET_COUNT(p) (((p)->count & PTD_COUNT_MSK) >> 0)
349
-
#define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK)
350
-
#define PTD_GET_TOGGLE(p) (((p)->count & PTD_TOGGLE_MSK) >> 10)
351
-
#define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK)
352
-
#define PTD_GET_ACTIVE(p) (((p)->count & PTD_ACTIVE_MSK) >> 11)
353
-
#define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK)
354
-
#define PTD_GET_CC(p) (((p)->count & PTD_CC_MSK) >> 12)
355
-
#define PTD_CC(v) (((v) << 12) & PTD_CC_MSK)
356
-
#define PTD_GET_MPS(p) (((p)->mps & PTD_MPS_MSK) >> 0)
357
-
#define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK)
358
-
#define PTD_GET_SPD(p) (((p)->mps & PTD_SPD_MSK) >> 10)
359
-
#define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK)
360
-
#define PTD_GET_LAST(p) (((p)->mps & PTD_LAST_MSK) >> 11)
361
-
#define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK)
362
-
#define PTD_GET_EP(p) (((p)->mps & PTD_EP_MSK) >> 12)
363
-
#define PTD_EP(v) (((v) << 12) & PTD_EP_MSK)
364
-
#define PTD_GET_LEN(p) (((p)->len & PTD_LEN_MSK) >> 0)
365
-
#define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK)
366
-
#define PTD_GET_DIR(p) (((p)->len & PTD_DIR_MSK) >> 10)
367
-
#define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK)
368
-
#define PTD_GET_FA(p) (((p)->faddr & PTD_FA_MSK) >> 0)
369
-
#define PTD_FA(v) (((v) << 0) & PTD_FA_MSK)
370
-
#define PTD_GET_SF_INT(p) (((p)->faddr & PTD_SF_INT_MSK) >> 8)
371
-
#define PTD_SF_INT(v) (((v) << 8) & PTD_SF_INT_MSK)
372
-
#define PTD_GET_SF_ISO(p) (((p)->faddr & PTD_SF_ISO_MSK) >> 8)
373
-
#define PTD_SF_ISO(v) (((v) << 8) & PTD_SF_ISO_MSK)
374
-
#define PTD_GET_PR(p) (((p)->faddr & PTD_PR_MSK) >> 13)
375
-
#define PTD_PR(v) (((v) << 13) & PTD_PR_MSK)
376
-
377
-
#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */
378
-
#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE)
379
-
380
-
struct isp1362_ep {
381
-
struct usb_host_endpoint *hep;
382
-
struct usb_device *udev;
383
-
384
-
/* philips transfer descriptor */
385
-
struct ptd ptd;
386
-
387
-
u8 maxpacket;
388
-
u8 epnum;
389
-
u8 nextpid;
390
-
u16 error_count;
391
-
u16 length; /* of current packet */
392
-
s16 ptd_offset; /* buffer offset in ISP1362 where
393
-
PTD has been stored
394
-
(for access thru HCDIRDATA) */
395
-
int ptd_index;
396
-
int num_ptds;
397
-
void *data; /* to databuf */
398
-
/* queue of active EPs (the ones transmitted to the chip) */
399
-
struct list_head active;
400
-
401
-
/* periodic schedule */
402
-
u8 branch;
403
-
u16 interval;
404
-
u16 load;
405
-
u16 last_iso;
406
-
407
-
/* async schedule */
408
-
struct list_head schedule; /* list of all EPs that need processing */
409
-
struct list_head remove_list;
410
-
int num_req;
411
-
};
412
-
413
-
struct isp1362_ep_queue {
414
-
struct list_head active; /* list of PTDs currently processed by HC */
415
-
atomic_t finishing;
416
-
unsigned long buf_map;
417
-
unsigned long skip_map;
418
-
int free_ptd;
419
-
u16 buf_start;
420
-
u16 buf_size;
421
-
u16 blk_size; /* PTD buffer block size for ATL and INTL */
422
-
u8 buf_count;
423
-
u8 buf_avail;
424
-
char name[16];
425
-
426
-
/* for statistical tracking */
427
-
u8 stat_maxptds; /* Max # of ptds seen simultaneously in fifo */
428
-
u8 ptd_count; /* number of ptds submitted to this queue */
429
-
};
430
-
431
-
struct isp1362_hcd {
432
-
spinlock_t lock;
433
-
void __iomem *addr_reg;
434
-
void __iomem *data_reg;
435
-
436
-
struct isp1362_platform_data *board;
437
-
438
-
unsigned long stat1, stat2, stat4, stat8, stat16;
439
-
440
-
/* HC registers */
441
-
u32 intenb; /* "OHCI" interrupts */
442
-
u16 irqenb; /* uP interrupts */
443
-
444
-
/* Root hub registers */
445
-
u32 rhdesca;
446
-
u32 rhdescb;
447
-
u32 rhstatus;
448
-
u32 rhport[MAX_ROOT_PORTS];
449
-
unsigned long next_statechange;
450
-
451
-
/* HC control reg shadow copy */
452
-
u32 hc_control;
453
-
454
-
/* async schedule: control, bulk */
455
-
struct list_head async;
456
-
457
-
/* periodic schedule: int */
458
-
u16 load[PERIODIC_SIZE];
459
-
struct list_head periodic;
460
-
u16 fmindex;
461
-
462
-
/* periodic schedule: isochronous */
463
-
struct list_head isoc;
464
-
unsigned int istl_flip:1;
465
-
unsigned int irq_active:1;
466
-
467
-
/* Schedules for the current frame */
468
-
struct isp1362_ep_queue atl_queue;
469
-
struct isp1362_ep_queue intl_queue;
470
-
struct isp1362_ep_queue istl_queue[2];
471
-
472
-
/* list of PTDs retrieved from HC */
473
-
struct list_head remove_list;
474
-
enum {
475
-
ISP1362_INT_SOF,
476
-
ISP1362_INT_ISTL0,
477
-
ISP1362_INT_ISTL1,
478
-
ISP1362_INT_EOT,
479
-
ISP1362_INT_OPR,
480
-
ISP1362_INT_SUSP,
481
-
ISP1362_INT_CLKRDY,
482
-
ISP1362_INT_INTL,
483
-
ISP1362_INT_ATL,
484
-
ISP1362_INT_OTG,
485
-
NUM_ISP1362_IRQS
486
-
} IRQ_NAMES;
487
-
unsigned int irq_stat[NUM_ISP1362_IRQS];
488
-
int req_serial;
489
-
};
490
-
491
-
static inline const char *ISP1362_INT_NAME(int n)
492
-
{
493
-
switch (n) {
494
-
case ISP1362_INT_SOF: return "SOF";
495
-
case ISP1362_INT_ISTL0: return "ISTL0";
496
-
case ISP1362_INT_ISTL1: return "ISTL1";
497
-
case ISP1362_INT_EOT: return "EOT";
498
-
case ISP1362_INT_OPR: return "OPR";
499
-
case ISP1362_INT_SUSP: return "SUSP";
500
-
case ISP1362_INT_CLKRDY: return "CLKRDY";
501
-
case ISP1362_INT_INTL: return "INTL";
502
-
case ISP1362_INT_ATL: return "ATL";
503
-
case ISP1362_INT_OTG: return "OTG";
504
-
default: return "unknown";
505
-
}
506
-
}
507
-
508
-
static inline void ALIGNSTAT(struct isp1362_hcd *isp1362_hcd, void *ptr)
509
-
{
510
-
unsigned long p = (unsigned long)ptr;
511
-
if (!(p & 0xf))
512
-
isp1362_hcd->stat16++;
513
-
else if (!(p & 0x7))
514
-
isp1362_hcd->stat8++;
515
-
else if (!(p & 0x3))
516
-
isp1362_hcd->stat4++;
517
-
else if (!(p & 0x1))
518
-
isp1362_hcd->stat2++;
519
-
else
520
-
isp1362_hcd->stat1++;
521
-
}
522
-
523
-
static inline struct isp1362_hcd *hcd_to_isp1362_hcd(struct usb_hcd *hcd)
524
-
{
525
-
return (struct isp1362_hcd *) (hcd->hcd_priv);
526
-
}
527
-
528
-
static inline struct usb_hcd *isp1362_hcd_to_hcd(struct isp1362_hcd *isp1362_hcd)
529
-
{
530
-
return container_of((void *)isp1362_hcd, struct usb_hcd, hcd_priv);
531
-
}
532
-
533
-
#define frame_before(f1, f2) ((s16)((u16)f1 - (u16)f2) < 0)
534
-
535
-
/*
536
-
* ISP1362 HW Interface
537
-
*/
538
-
539
-
#define DBG(level, fmt...) \
540
-
do { \
541
-
if (dbg_level > level) \
542
-
pr_debug(fmt); \
543
-
} while (0)
544
-
545
-
#ifdef VERBOSE
546
-
# define VDBG(fmt...) DBG(3, fmt)
547
-
#else
548
-
# define VDBG(fmt...) do {} while (0)
549
-
#endif
550
-
551
-
#ifdef REGISTERS
552
-
# define RDBG(fmt...) DBG(1, fmt)
553
-
#else
554
-
# define RDBG(fmt...) do {} while (0)
555
-
#endif
556
-
557
-
#ifdef URB_TRACE
558
-
#define URB_DBG(fmt...) DBG(0, fmt)
559
-
#else
560
-
#define URB_DBG(fmt...) do {} while (0)
561
-
#endif
562
-
563
-
564
-
#if USE_PLATFORM_DELAY
565
-
#if USE_NDELAY
566
-
#error USE_PLATFORM_DELAY and USE_NDELAY defined simultaneously.
567
-
#endif
568
-
#define isp1362_delay(h, d) (h)->board->delay(isp1362_hcd_to_hcd(h)->self.controller, d)
569
-
#elif USE_NDELAY
570
-
#define isp1362_delay(h, d) ndelay(d)
571
-
#else
572
-
#define isp1362_delay(h, d) do {} while (0)
573
-
#endif
574
-
575
-
#define get_urb(ep) ({ \
576
-
BUG_ON(list_empty(&ep->hep->urb_list)); \
577
-
container_of(ep->hep->urb_list.next, struct urb, urb_list); \
578
-
})
579
-
580
-
/* basic access functions for ISP1362 chip registers */
581
-
/* NOTE: The contents of the address pointer register cannot be read back! The driver must ensure,
582
-
* that all register accesses are performed with interrupts disabled, since the interrupt
583
-
* handler has no way of restoring the previous state.
584
-
*/
585
-
static void isp1362_write_addr(struct isp1362_hcd *isp1362_hcd, isp1362_reg_t reg)
586
-
{
587
-
REG_ACCESS_TEST(reg);
588
-
DUMMY_DELAY_ACCESS;
589
-
writew(ISP1362_REG_NO(reg), isp1362_hcd->addr_reg);
590
-
DUMMY_DELAY_ACCESS;
591
-
isp1362_delay(isp1362_hcd, 1);
592
-
}
593
-
594
-
static void isp1362_write_data16(struct isp1362_hcd *isp1362_hcd, u16 val)
595
-
{
596
-
DUMMY_DELAY_ACCESS;
597
-
writew(val, isp1362_hcd->data_reg);
598
-
}
599
-
600
-
static u16 isp1362_read_data16(struct isp1362_hcd *isp1362_hcd)
601
-
{
602
-
u16 val;
603
-
604
-
DUMMY_DELAY_ACCESS;
605
-
val = readw(isp1362_hcd->data_reg);
606
-
607
-
return val;
608
-
}
609
-
610
-
static void isp1362_write_data32(struct isp1362_hcd *isp1362_hcd, u32 val)
611
-
{
612
-
#if USE_32BIT
613
-
DUMMY_DELAY_ACCESS;
614
-
writel(val, isp1362_hcd->data_reg);
615
-
#else
616
-
DUMMY_DELAY_ACCESS;
617
-
writew((u16)val, isp1362_hcd->data_reg);
618
-
DUMMY_DELAY_ACCESS;
619
-
writew(val >> 16, isp1362_hcd->data_reg);
620
-
#endif
621
-
}
622
-
623
-
static u32 isp1362_read_data32(struct isp1362_hcd *isp1362_hcd)
624
-
{
625
-
u32 val;
626
-
627
-
#if USE_32BIT
628
-
DUMMY_DELAY_ACCESS;
629
-
val = readl(isp1362_hcd->data_reg);
630
-
#else
631
-
DUMMY_DELAY_ACCESS;
632
-
val = (u32)readw(isp1362_hcd->data_reg);
633
-
DUMMY_DELAY_ACCESS;
634
-
val |= (u32)readw(isp1362_hcd->data_reg) << 16;
635
-
#endif
636
-
return val;
637
-
}
638
-
639
-
/* use readsw/writesw to access the fifo whenever possible */
640
-
/* assume HCDIRDATA or XFERCTR & addr_reg have been set up */
641
-
static void isp1362_read_fifo(struct isp1362_hcd *isp1362_hcd, void *buf, u16 len)
642
-
{
643
-
u8 *dp = buf;
644
-
u16 data;
645
-
646
-
if (!len)
647
-
return;
648
-
649
-
RDBG("%s: Reading %d byte from fifo to mem @ %p\n", __func__, len, buf);
650
-
#if USE_32BIT
651
-
if (len >= 4) {
652
-
RDBG("%s: Using readsl for %d dwords\n", __func__, len >> 2);
653
-
readsl(isp1362_hcd->data_reg, dp, len >> 2);
654
-
dp += len & ~3;
655
-
len &= 3;
656
-
}
657
-
#endif
658
-
if (len >= 2) {
659
-
RDBG("%s: Using readsw for %d words\n", __func__, len >> 1);
660
-
insw((unsigned long)isp1362_hcd->data_reg, dp, len >> 1);
661
-
dp += len & ~1;
662
-
len &= 1;
663
-
}
664
-
665
-
BUG_ON(len & ~1);
666
-
if (len > 0) {
667
-
data = isp1362_read_data16(isp1362_hcd);
668
-
RDBG("%s: Reading trailing byte %02x to mem @ %08x\n", __func__,
669
-
(u8)data, (u32)dp);
670
-
*dp = (u8)data;
671
-
}
672
-
}
673
-
674
-
static void isp1362_write_fifo(struct isp1362_hcd *isp1362_hcd, void *buf, u16 len)
675
-
{
676
-
u8 *dp = buf;
677
-
u16 data;
678
-
679
-
if (!len)
680
-
return;
681
-
682
-
if ((unsigned long)dp & 0x1) {
683
-
/* not aligned */
684
-
for (; len > 1; len -= 2) {
685
-
data = *dp++;
686
-
data |= *dp++ << 8;
687
-
isp1362_write_data16(isp1362_hcd, data);
688
-
}
689
-
if (len)
690
-
isp1362_write_data16(isp1362_hcd, *dp);
691
-
return;
692
-
}
693
-
694
-
RDBG("%s: Writing %d byte to fifo from memory @%p\n", __func__, len, buf);
695
-
#if USE_32BIT
696
-
if (len >= 4) {
697
-
RDBG("%s: Using writesl for %d dwords\n", __func__, len >> 2);
698
-
writesl(isp1362_hcd->data_reg, dp, len >> 2);
699
-
dp += len & ~3;
700
-
len &= 3;
701
-
}
702
-
#endif
703
-
if (len >= 2) {
704
-
RDBG("%s: Using writesw for %d words\n", __func__, len >> 1);
705
-
outsw((unsigned long)isp1362_hcd->data_reg, dp, len >> 1);
706
-
dp += len & ~1;
707
-
len &= 1;
708
-
}
709
-
710
-
BUG_ON(len & ~1);
711
-
if (len > 0) {
712
-
/* finally write any trailing byte; we don't need to care
713
-
* about the high byte of the last word written
714
-
*/
715
-
data = (u16)*dp;
716
-
RDBG("%s: Sending trailing byte %02x from mem @ %08x\n", __func__,
717
-
data, (u32)dp);
718
-
isp1362_write_data16(isp1362_hcd, data);
719
-
}
720
-
}
721
-
722
-
#define isp1362_read_reg16(d, r) ({ \
723
-
u16 __v; \
724
-
REG_WIDTH_TEST(ISP1362_REG_##r, REG_WIDTH_16); \
725
-
isp1362_write_addr(d, ISP1362_REG_##r); \
726
-
__v = isp1362_read_data16(d); \
727
-
RDBG("%s: Read %04x from %s[%02x]\n", __func__, __v, #r, \
728
-
ISP1362_REG_NO(ISP1362_REG_##r)); \
729
-
__v; \
730
-
})
731
-
732
-
#define isp1362_read_reg32(d, r) ({ \
733
-
u32 __v; \
734
-
REG_WIDTH_TEST(ISP1362_REG_##r, REG_WIDTH_32); \
735
-
isp1362_write_addr(d, ISP1362_REG_##r); \
736
-
__v = isp1362_read_data32(d); \
737
-
RDBG("%s: Read %08x from %s[%02x]\n", __func__, __v, #r, \
738
-
ISP1362_REG_NO(ISP1362_REG_##r)); \
739
-
__v; \
740
-
})
741
-
742
-
#define isp1362_write_reg16(d, r, v) { \
743
-
REG_WIDTH_TEST(ISP1362_REG_##r, REG_WIDTH_16); \
744
-
isp1362_write_addr(d, (ISP1362_REG_##r) | ISP1362_REG_WRITE_OFFSET); \
745
-
isp1362_write_data16(d, (u16)(v)); \
746
-
RDBG("%s: Wrote %04x to %s[%02x]\n", __func__, (u16)(v), #r, \
747
-
ISP1362_REG_NO(ISP1362_REG_##r)); \
748
-
}
749
-
750
-
#define isp1362_write_reg32(d, r, v) { \
751
-
REG_WIDTH_TEST(ISP1362_REG_##r, REG_WIDTH_32); \
752
-
isp1362_write_addr(d, (ISP1362_REG_##r) | ISP1362_REG_WRITE_OFFSET); \
753
-
isp1362_write_data32(d, (u32)(v)); \
754
-
RDBG("%s: Wrote %08x to %s[%02x]\n", __func__, (u32)(v), #r, \
755
-
ISP1362_REG_NO(ISP1362_REG_##r)); \
756
-
}
757
-
758
-
#define isp1362_set_mask16(d, r, m) { \
759
-
u16 __v; \
760
-
__v = isp1362_read_reg16(d, r); \
761
-
if ((__v | m) != __v) \
762
-
isp1362_write_reg16(d, r, __v | m); \
763
-
}
764
-
765
-
#define isp1362_clr_mask16(d, r, m) { \
766
-
u16 __v; \
767
-
__v = isp1362_read_reg16(d, r); \
768
-
if ((__v & ~m) != __v) \
769
-
isp1362_write_reg16(d, r, __v & ~m); \
770
-
}
771
-
772
-
#define isp1362_set_mask32(d, r, m) { \
773
-
u32 __v; \
774
-
__v = isp1362_read_reg32(d, r); \
775
-
if ((__v | m) != __v) \
776
-
isp1362_write_reg32(d, r, __v | m); \
777
-
}
778
-
779
-
#define isp1362_clr_mask32(d, r, m) { \
780
-
u32 __v; \
781
-
__v = isp1362_read_reg32(d, r); \
782
-
if ((__v & ~m) != __v) \
783
-
isp1362_write_reg32(d, r, __v & ~m); \
784
-
}
785
-
786
-
#define isp1362_show_reg(d, r) { \
787
-
if ((ISP1362_REG_##r & REG_WIDTH_MASK) == REG_WIDTH_32) \
788
-
DBG(0, "%-12s[%02x]: %08x\n", #r, \
789
-
ISP1362_REG_NO(ISP1362_REG_##r), isp1362_read_reg32(d, r)); \
790
-
else \
791
-
DBG(0, "%-12s[%02x]: %04x\n", #r, \
792
-
ISP1362_REG_NO(ISP1362_REG_##r), isp1362_read_reg16(d, r)); \
793
-
}
794
-
795
-
static void isp1362_write_diraddr(struct isp1362_hcd *isp1362_hcd, u16 offset, u16 len)
796
-
{
797
-
len = (len + 1) & ~1;
798
-
799
-
isp1362_clr_mask16(isp1362_hcd, HCDMACFG, HCDMACFG_CTR_ENABLE);
800
-
isp1362_write_reg32(isp1362_hcd, HCDIRADDR,
801
-
HCDIRADDR_ADDR(offset) | HCDIRADDR_COUNT(len));
802
-
}
803
-
804
-
static void isp1362_read_buffer(struct isp1362_hcd *isp1362_hcd, void *buf, u16 offset, int len)
805
-
{
806
-
isp1362_write_diraddr(isp1362_hcd, offset, len);
807
-
808
-
DBG(3, "%s: Reading %d byte from buffer @%04x to memory @ %p\n",
809
-
__func__, len, offset, buf);
810
-
811
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_EOT);
812
-
813
-
isp1362_write_addr(isp1362_hcd, ISP1362_REG_HCDIRDATA);
814
-
815
-
isp1362_read_fifo(isp1362_hcd, buf, len);
816
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_EOT);
817
-
}
818
-
819
-
static void isp1362_write_buffer(struct isp1362_hcd *isp1362_hcd, void *buf, u16 offset, int len)
820
-
{
821
-
isp1362_write_diraddr(isp1362_hcd, offset, len);
822
-
823
-
DBG(3, "%s: Writing %d byte to buffer @%04x from memory @ %p\n",
824
-
__func__, len, offset, buf);
825
-
826
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_EOT);
827
-
828
-
isp1362_write_addr(isp1362_hcd, ISP1362_REG_HCDIRDATA | ISP1362_REG_WRITE_OFFSET);
829
-
isp1362_write_fifo(isp1362_hcd, buf, len);
830
-
831
-
isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_EOT);
832
-
}
833
-
834
-
static void __attribute__((unused)) dump_data(char *buf, int len)
835
-
{
836
-
if (dbg_level > 0) {
837
-
int k;
838
-
int lf = 0;
839
-
840
-
for (k = 0; k < len; ++k) {
841
-
if (!lf)
842
-
DBG(0, "%04x:", k);
843
-
printk(" %02x", ((u8 *) buf)[k]);
844
-
lf = 1;
845
-
if (!k)
846
-
continue;
847
-
if (k % 16 == 15) {
848
-
printk("\n");
849
-
lf = 0;
850
-
continue;
851
-
}
852
-
if (k % 8 == 7)
853
-
printk(" ");
854
-
if (k % 4 == 3)
855
-
printk(" ");
856
-
}
857
-
if (lf)
858
-
printk("\n");
859
-
}
860
-
}
861
-
862
-
#if defined(PTD_TRACE)
863
-
864
-
static void dump_ptd(struct ptd *ptd)
865
-
{
866
-
DBG(0, "EP %p: CC=%x EP=%d DIR=%x CNT=%d LEN=%d MPS=%d TGL=%x ACT=%x FA=%d SPD=%x SF=%x PR=%x LST=%x\n",
867
-
container_of(ptd, struct isp1362_ep, ptd),
868
-
PTD_GET_CC(ptd), PTD_GET_EP(ptd), PTD_GET_DIR(ptd),
869
-
PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
870
-
PTD_GET_TOGGLE(ptd), PTD_GET_ACTIVE(ptd), PTD_GET_FA(ptd),
871
-
PTD_GET_SPD(ptd), PTD_GET_SF_INT(ptd), PTD_GET_PR(ptd), PTD_GET_LAST(ptd));
872
-
DBG(0, " %04x %04x %04x %04x\n", ptd->count, ptd->mps, ptd->len, ptd->faddr);
873
-
}
874
-
875
-
static void dump_ptd_out_data(struct ptd *ptd, u8 *buf)
876
-
{
877
-
if (dbg_level > 0) {
878
-
if (PTD_GET_DIR(ptd) != PTD_DIR_IN && PTD_GET_LEN(ptd)) {
879
-
DBG(0, "--out->\n");
880
-
dump_data(buf, PTD_GET_LEN(ptd));
881
-
}
882
-
}
883
-
}
884
-
885
-
static void dump_ptd_in_data(struct ptd *ptd, u8 *buf)
886
-
{
887
-
if (dbg_level > 0) {
888
-
if (PTD_GET_DIR(ptd) == PTD_DIR_IN && PTD_GET_COUNT(ptd)) {
889
-
DBG(0, "<--in--\n");
890
-
dump_data(buf, PTD_GET_COUNT(ptd));
891
-
}
892
-
DBG(0, "-----\n");
893
-
}
894
-
}
895
-
896
-
static void dump_ptd_queue(struct isp1362_ep_queue *epq)
897
-
{
898
-
struct isp1362_ep *ep;
899
-
int dbg = dbg_level;
900
-
901
-
dbg_level = 1;
902
-
list_for_each_entry(ep, &epq->active, active) {
903
-
dump_ptd(&ep->ptd);
904
-
dump_data(ep->data, ep->length);
905
-
}
906
-
dbg_level = dbg;
907
-
}
908
-
#else
909
-
#define dump_ptd(ptd) do {} while (0)
910
-
#define dump_ptd_in_data(ptd, buf) do {} while (0)
911
-
#define dump_ptd_out_data(ptd, buf) do {} while (0)
912
-
#define dump_ptd_data(ptd, buf) do {} while (0)
913
-
#define dump_ptd_queue(epq) do {} while (0)
914
-
#endif
-3
drivers/usb/host/ohci-hcd.c
-3
drivers/usb/host/ohci-hcd.c
···
1282
1282
1283
1283
pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1284
1284
sizeof (struct ed), sizeof (struct td));
1285
-
set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1286
1285
1287
1286
ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1288
1287
···
1331
1332
debugfs_remove(ohci_debug_root);
1332
1333
ohci_debug_root = NULL;
1333
1334
1334
-
clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1335
1335
return retval;
1336
1336
}
1337
1337
module_init(ohci_hcd_mod_init);
···
1350
1352
ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1351
1353
#endif
1352
1354
debugfs_remove(ohci_debug_root);
1353
-
clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1354
1355
}
1355
1356
module_exit(ohci_hcd_mod_exit);
1356
1357
-5
drivers/usb/host/uhci-hcd.c
-5
drivers/usb/host/uhci-hcd.c
···
867
867
if (usb_disabled())
868
868
return -ENODEV;
869
869
870
-
set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
871
-
872
870
#ifdef CONFIG_DYNAMIC_DEBUG
873
871
errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
874
872
if (!errbuf)
···
910
912
911
913
errbuf_failed:
912
914
#endif
913
-
914
-
clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
915
915
return retval;
916
916
}
917
917
···
926
930
#ifdef CONFIG_DYNAMIC_DEBUG
927
931
kfree(errbuf);
928
932
#endif
929
-
clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
930
933
}
931
934
932
935
module_init(uhci_hcd_init);
+192
-67
drivers/usb/host/xhci-dbgcap.c
+192
-67
drivers/usb/host/xhci-dbgcap.c
···
29
29
#include "xhci-trace.h"
30
30
#include "xhci-dbgcap.h"
31
31
32
+
static const struct dbc_str dbc_str_default = {
33
+
.manufacturer = "Linux Foundation",
34
+
.product = "Linux USB Debug Target",
35
+
.serial = "0001",
36
+
};
37
+
32
38
static void dbc_free_ctx(struct device *dev, struct xhci_container_ctx *ctx)
33
39
{
34
40
if (!ctx)
···
56
50
kfree(ring->first_seg);
57
51
}
58
52
kfree(ring);
59
-
}
60
-
61
-
static u32 xhci_dbc_populate_strings(struct dbc_str_descs *strings)
62
-
{
63
-
struct usb_string_descriptor *s_desc;
64
-
u32 string_length;
65
-
66
-
/* Serial string: */
67
-
s_desc = (struct usb_string_descriptor *)strings->serial;
68
-
utf8s_to_utf16s(DBC_STRING_SERIAL, strlen(DBC_STRING_SERIAL),
69
-
UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
70
-
DBC_MAX_STRING_LENGTH);
71
-
72
-
s_desc->bLength = (strlen(DBC_STRING_SERIAL) + 1) * 2;
73
-
s_desc->bDescriptorType = USB_DT_STRING;
74
-
string_length = s_desc->bLength;
75
-
string_length <<= 8;
76
-
77
-
/* Product string: */
78
-
s_desc = (struct usb_string_descriptor *)strings->product;
79
-
utf8s_to_utf16s(DBC_STRING_PRODUCT, strlen(DBC_STRING_PRODUCT),
80
-
UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
81
-
DBC_MAX_STRING_LENGTH);
82
-
83
-
s_desc->bLength = (strlen(DBC_STRING_PRODUCT) + 1) * 2;
84
-
s_desc->bDescriptorType = USB_DT_STRING;
85
-
string_length += s_desc->bLength;
86
-
string_length <<= 8;
87
-
88
-
/* Manufacture string: */
89
-
s_desc = (struct usb_string_descriptor *)strings->manufacturer;
90
-
utf8s_to_utf16s(DBC_STRING_MANUFACTURER,
91
-
strlen(DBC_STRING_MANUFACTURER),
92
-
UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
93
-
DBC_MAX_STRING_LENGTH);
94
-
95
-
s_desc->bLength = (strlen(DBC_STRING_MANUFACTURER) + 1) * 2;
96
-
s_desc->bDescriptorType = USB_DT_STRING;
97
-
string_length += s_desc->bLength;
98
-
string_length <<= 8;
99
-
100
-
/* String0: */
101
-
strings->string0[0] = 4;
102
-
strings->string0[1] = USB_DT_STRING;
103
-
strings->string0[2] = 0x09;
104
-
strings->string0[3] = 0x04;
105
-
string_length += 4;
106
-
107
-
return string_length;
108
53
}
109
54
110
55
static void xhci_dbc_init_ep_contexts(struct xhci_dbc *dbc)
···
81
124
ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
82
125
}
83
126
84
-
static void xhci_dbc_init_contexts(struct xhci_dbc *dbc, u32 string_length)
127
+
static u8 get_str_desc_len(const char *desc)
128
+
{
129
+
return ((struct usb_string_descriptor *)desc)->bLength;
130
+
}
131
+
132
+
static u32 dbc_prepare_info_context_str_len(struct dbc_str_descs *descs)
133
+
{
134
+
u32 len;
135
+
136
+
len = get_str_desc_len(descs->serial);
137
+
len <<= 8;
138
+
len += get_str_desc_len(descs->product);
139
+
len <<= 8;
140
+
len += get_str_desc_len(descs->manufacturer);
141
+
len <<= 8;
142
+
len += get_str_desc_len(descs->string0);
143
+
144
+
return len;
145
+
}
146
+
147
+
static int xhci_dbc_populate_str_desc(char *desc, const char *src)
148
+
{
149
+
struct usb_string_descriptor *s_desc;
150
+
int len;
151
+
152
+
s_desc = (struct usb_string_descriptor *)desc;
153
+
154
+
/* len holds number of 2 byte UTF-16 characters */
155
+
len = utf8s_to_utf16s(src, strlen(src), UTF16_LITTLE_ENDIAN,
156
+
(wchar_t *)s_desc->wData, USB_MAX_STRING_LEN * 2);
157
+
if (len < 0)
158
+
return len;
159
+
160
+
s_desc->bLength = len * 2 + 2;
161
+
s_desc->bDescriptorType = USB_DT_STRING;
162
+
163
+
return s_desc->bLength;
164
+
}
165
+
166
+
static void xhci_dbc_populate_str_descs(struct dbc_str_descs *str_descs,
167
+
struct dbc_str *str)
168
+
{
169
+
/* Serial string: */
170
+
xhci_dbc_populate_str_desc(str_descs->serial, str->serial);
171
+
172
+
/* Product string: */
173
+
xhci_dbc_populate_str_desc(str_descs->product, str->product);
174
+
175
+
/* Manufacturer string: */
176
+
xhci_dbc_populate_str_desc(str_descs->manufacturer, str->manufacturer);
177
+
178
+
/* String0: */
179
+
str_descs->string0[0] = 4;
180
+
str_descs->string0[1] = USB_DT_STRING;
181
+
str_descs->string0[2] = 0x09;
182
+
str_descs->string0[3] = 0x04;
183
+
}
184
+
185
+
static void xhci_dbc_init_contexts(struct xhci_dbc *dbc)
85
186
{
86
187
struct dbc_info_context *info;
87
188
u32 dev_info;
···
150
135
151
136
/* Populate info Context: */
152
137
info = (struct dbc_info_context *)dbc->ctx->bytes;
153
-
dma = dbc->string_dma;
138
+
dma = dbc->str_descs_dma;
154
139
info->string0 = cpu_to_le64(dma);
155
-
info->manufacturer = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH);
156
-
info->product = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 2);
157
-
info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
158
-
info->length = cpu_to_le32(string_length);
140
+
info->manufacturer = cpu_to_le64(dma + USB_MAX_STRING_DESC_LEN);
141
+
info->product = cpu_to_le64(dma + USB_MAX_STRING_DESC_LEN * 2);
142
+
info->serial = cpu_to_le64(dma + USB_MAX_STRING_DESC_LEN * 3);
143
+
info->length = cpu_to_le32(dbc_prepare_info_context_str_len(dbc->str_descs));
159
144
160
145
/* Populate bulk in and out endpoint contexts: */
161
146
xhci_dbc_init_ep_contexts(dbc);
···
540
525
{
541
526
int ret;
542
527
dma_addr_t deq;
543
-
u32 string_length;
544
528
struct device *dev = dbc->dev;
545
529
546
530
/* Allocate various rings for events and transfers: */
···
566
552
goto ctx_fail;
567
553
568
554
/* Allocate the string table: */
569
-
dbc->string_size = sizeof(*dbc->string);
570
-
dbc->string = dma_alloc_coherent(dev, dbc->string_size,
571
-
&dbc->string_dma, flags);
572
-
if (!dbc->string)
573
-
goto string_fail;
555
+
dbc->str_descs_size = sizeof(*dbc->str_descs);
556
+
dbc->str_descs = dma_alloc_coherent(dev, dbc->str_descs_size,
557
+
&dbc->str_descs_dma, flags);
558
+
if (!dbc->str_descs)
559
+
goto str_descs_fail;
574
560
575
561
/* Setup ERST register: */
576
562
writel(dbc->erst.num_entries, &dbc->regs->ersts);
···
580
566
dbc->ring_evt->dequeue);
581
567
lo_hi_writeq(deq, &dbc->regs->erdp);
582
568
583
-
/* Setup strings and contexts: */
584
-
string_length = xhci_dbc_populate_strings(dbc->string);
585
-
xhci_dbc_init_contexts(dbc, string_length);
569
+
/* Setup string descriptors and contexts: */
570
+
xhci_dbc_populate_str_descs(dbc->str_descs, &dbc->str);
571
+
xhci_dbc_init_contexts(dbc);
586
572
587
573
xhci_dbc_eps_init(dbc);
588
574
dbc->state = DS_INITIALIZED;
589
575
590
576
return 0;
591
577
592
-
string_fail:
578
+
str_descs_fail:
593
579
dbc_free_ctx(dev, dbc->ctx);
594
580
dbc->ctx = NULL;
595
581
ctx_fail:
···
614
600
615
601
xhci_dbc_eps_exit(dbc);
616
602
617
-
dma_free_coherent(dbc->dev, dbc->string_size, dbc->string, dbc->string_dma);
618
-
dbc->string = NULL;
603
+
dma_free_coherent(dbc->dev, dbc->str_descs_size, dbc->str_descs, dbc->str_descs_dma);
604
+
dbc->str_descs = NULL;
619
605
620
606
dbc_free_ctx(dbc->dev, dbc->ctx);
621
607
dbc->ctx = NULL;
···
1210
1196
return size;
1211
1197
}
1212
1198
1199
+
static ssize_t dbc_manufacturer_show(struct device *dev,
1200
+
struct device_attribute *attr,
1201
+
char *buf)
1202
+
{
1203
+
struct xhci_hcd *xhci = hcd_to_xhci(dev_get_drvdata(dev));
1204
+
struct xhci_dbc *dbc = xhci->dbc;
1205
+
1206
+
return sysfs_emit(buf, "%s\n", dbc->str.manufacturer);
1207
+
}
1208
+
1209
+
static ssize_t dbc_manufacturer_store(struct device *dev,
1210
+
struct device_attribute *attr,
1211
+
const char *buf, size_t size)
1212
+
{
1213
+
struct xhci_hcd *xhci = hcd_to_xhci(dev_get_drvdata(dev));
1214
+
struct xhci_dbc *dbc = xhci->dbc;
1215
+
size_t len;
1216
+
1217
+
if (dbc->state != DS_DISABLED)
1218
+
return -EBUSY;
1219
+
1220
+
len = strcspn(buf, "\n");
1221
+
if (!len)
1222
+
return -EINVAL;
1223
+
1224
+
if (len > USB_MAX_STRING_LEN)
1225
+
return -E2BIG;
1226
+
1227
+
memcpy(dbc->str.manufacturer, buf, len);
1228
+
dbc->str.manufacturer[len] = '\0';
1229
+
1230
+
return size;
1231
+
}
1232
+
1233
+
static ssize_t dbc_product_show(struct device *dev,
1234
+
struct device_attribute *attr,
1235
+
char *buf)
1236
+
{
1237
+
struct xhci_hcd *xhci = hcd_to_xhci(dev_get_drvdata(dev));
1238
+
struct xhci_dbc *dbc = xhci->dbc;
1239
+
1240
+
return sysfs_emit(buf, "%s\n", dbc->str.product);
1241
+
}
1242
+
1243
+
static ssize_t dbc_product_store(struct device *dev,
1244
+
struct device_attribute *attr,
1245
+
const char *buf, size_t size)
1246
+
{
1247
+
struct xhci_hcd *xhci = hcd_to_xhci(dev_get_drvdata(dev));
1248
+
struct xhci_dbc *dbc = xhci->dbc;
1249
+
size_t len;
1250
+
1251
+
if (dbc->state != DS_DISABLED)
1252
+
return -EBUSY;
1253
+
1254
+
len = strcspn(buf, "\n");
1255
+
if (!len)
1256
+
return -EINVAL;
1257
+
1258
+
if (len > USB_MAX_STRING_LEN)
1259
+
return -E2BIG;
1260
+
1261
+
memcpy(dbc->str.product, buf, len);
1262
+
dbc->str.product[len] = '\0';
1263
+
1264
+
return size;
1265
+
}
1266
+
1267
+
static ssize_t dbc_serial_show(struct device *dev,
1268
+
struct device_attribute *attr,
1269
+
char *buf)
1270
+
{
1271
+
struct xhci_hcd *xhci = hcd_to_xhci(dev_get_drvdata(dev));
1272
+
struct xhci_dbc *dbc = xhci->dbc;
1273
+
1274
+
return sysfs_emit(buf, "%s\n", dbc->str.serial);
1275
+
}
1276
+
1277
+
static ssize_t dbc_serial_store(struct device *dev,
1278
+
struct device_attribute *attr,
1279
+
const char *buf, size_t size)
1280
+
{
1281
+
struct xhci_hcd *xhci = hcd_to_xhci(dev_get_drvdata(dev));
1282
+
struct xhci_dbc *dbc = xhci->dbc;
1283
+
size_t len;
1284
+
1285
+
if (dbc->state != DS_DISABLED)
1286
+
return -EBUSY;
1287
+
1288
+
len = strcspn(buf, "\n");
1289
+
if (!len)
1290
+
return -EINVAL;
1291
+
1292
+
if (len > USB_MAX_STRING_LEN)
1293
+
return -E2BIG;
1294
+
1295
+
memcpy(dbc->str.serial, buf, len);
1296
+
dbc->str.serial[len] = '\0';
1297
+
1298
+
return size;
1299
+
}
1300
+
1213
1301
static ssize_t dbc_bInterfaceProtocol_show(struct device *dev,
1214
1302
struct device_attribute *attr,
1215
1303
char *buf)
···
1399
1283
static DEVICE_ATTR_RW(dbc_idVendor);
1400
1284
static DEVICE_ATTR_RW(dbc_idProduct);
1401
1285
static DEVICE_ATTR_RW(dbc_bcdDevice);
1286
+
static DEVICE_ATTR_RW(dbc_serial);
1287
+
static DEVICE_ATTR_RW(dbc_product);
1288
+
static DEVICE_ATTR_RW(dbc_manufacturer);
1402
1289
static DEVICE_ATTR_RW(dbc_bInterfaceProtocol);
1403
1290
static DEVICE_ATTR_RW(dbc_poll_interval_ms);
1404
1291
···
1410
1291
&dev_attr_dbc_idVendor.attr,
1411
1292
&dev_attr_dbc_idProduct.attr,
1412
1293
&dev_attr_dbc_bcdDevice.attr,
1294
+
&dev_attr_dbc_serial.attr,
1295
+
&dev_attr_dbc_product.attr,
1296
+
&dev_attr_dbc_manufacturer.attr,
1413
1297
&dev_attr_dbc_bInterfaceProtocol.attr,
1414
1298
&dev_attr_dbc_poll_interval_ms.attr,
1415
1299
NULL
···
1437
1315
dbc->bcdDevice = DBC_DEVICE_REV;
1438
1316
dbc->bInterfaceProtocol = DBC_PROTOCOL;
1439
1317
dbc->poll_interval = DBC_POLL_INTERVAL_DEFAULT;
1318
+
1319
+
/* initialize serial, product and manufacturer with default values */
1320
+
dbc->str = dbc_str_default;
1440
1321
1441
1322
if (readl(&dbc->regs->control) & DBC_CTRL_DBC_ENABLE)
1442
1323
goto err;
+28
-11
drivers/usb/host/xhci-dbgcap.h
+28
-11
drivers/usb/host/xhci-dbgcap.h
···
47
47
#define DBC_DOOR_BELL_TARGET(p) (((p) & 0xff) << 8)
48
48
49
49
#define DBC_MAX_PACKET 1024
50
-
#define DBC_MAX_STRING_LENGTH 64
51
-
#define DBC_STRING_MANUFACTURER "Linux Foundation"
52
-
#define DBC_STRING_PRODUCT "Linux USB Debug Target"
53
-
#define DBC_STRING_SERIAL "0001"
54
50
#define DBC_CONTEXT_SIZE 64
55
51
56
52
/*
···
59
63
#define DBC_PORTSC_LINK_CHANGE BIT(22)
60
64
#define DBC_PORTSC_CONFIG_CHANGE BIT(23)
61
65
66
+
/*
67
+
* The maximum length of a string descriptor is 255, because the bLength
68
+
* field in the usb_string_descriptor struct is __u8. In practice the
69
+
* maximum length is 254, because a string descriptor consists of a 2 byte
70
+
* header followed by UTF-16 characters (2 bytes each). This allows for
71
+
* only 126 characters (code points) in the string, which is where
72
+
* USB_MAX_STRING_LEN comes from.
73
+
*/
74
+
#define USB_MAX_STRING_DESC_LEN 254
75
+
62
76
struct dbc_str_descs {
63
-
char string0[DBC_MAX_STRING_LENGTH];
64
-
char manufacturer[DBC_MAX_STRING_LENGTH];
65
-
char product[DBC_MAX_STRING_LENGTH];
66
-
char serial[DBC_MAX_STRING_LENGTH];
77
+
char string0[USB_MAX_STRING_DESC_LEN];
78
+
char manufacturer[USB_MAX_STRING_DESC_LEN];
79
+
char product[USB_MAX_STRING_DESC_LEN];
80
+
char serial[USB_MAX_STRING_DESC_LEN];
81
+
};
82
+
83
+
/*
84
+
* NULL terminated UTF-8 strings used to create UTF-16 strings
85
+
* (with maxiumum USB_MAX_STRING_LEN 2 byte characters).
86
+
*/
87
+
struct dbc_str {
88
+
char manufacturer[USB_MAX_STRING_LEN+1];
89
+
char product[USB_MAX_STRING_LEN+1];
90
+
char serial[USB_MAX_STRING_LEN+1];
67
91
};
68
92
69
93
#define DBC_PROTOCOL 1 /* GNU Remote Debug Command */
···
149
133
struct xhci_erst erst;
150
134
struct xhci_container_ctx *ctx;
151
135
152
-
struct dbc_str_descs *string;
153
-
dma_addr_t string_dma;
154
-
size_t string_size;
136
+
struct dbc_str_descs *str_descs;
137
+
dma_addr_t str_descs_dma;
138
+
size_t str_descs_size;
139
+
struct dbc_str str;
155
140
u16 idVendor;
156
141
u16 idProduct;
157
142
u16 bcdDevice;
+2
-19
drivers/usb/host/xhci-tegra.c
+2
-19
drivers/usb/host/xhci-tegra.c
···
1570
1570
data = irq_get_irq_data(tegra->wake_irqs[i]);
1571
1571
if (!data) {
1572
1572
dev_warn(tegra->dev, "get wake event %d irq data fail\n", i);
1573
-
irq_dispose_mapping(tegra->wake_irqs[i]);
1574
1573
break;
1575
1574
}
1576
1575
···
1580
1581
dev_dbg(tegra->dev, "setup %d wake events\n", tegra->num_wakes);
1581
1582
1582
1583
return 0;
1583
-
}
1584
-
1585
-
static void tegra_xusb_dispose_wake(struct tegra_xusb *tegra)
1586
-
{
1587
-
unsigned int i;
1588
-
1589
-
for (i = 0; i < tegra->num_wakes; i++)
1590
-
irq_dispose_mapping(tegra->wake_irqs[i]);
1591
-
1592
-
tegra->num_wakes = 0;
1593
1584
}
1594
1585
1595
1586
static int tegra_xusb_probe(struct platform_device *pdev)
···
1637
1648
return err;
1638
1649
1639
1650
tegra->padctl = tegra_xusb_padctl_get(&pdev->dev);
1640
-
if (IS_ERR(tegra->padctl)) {
1641
-
err = PTR_ERR(tegra->padctl);
1642
-
goto dispose_wake;
1643
-
}
1651
+
if (IS_ERR(tegra->padctl))
1652
+
return PTR_ERR(tegra->padctl);
1644
1653
1645
1654
np = of_parse_phandle(pdev->dev.of_node, "nvidia,xusb-padctl", 0);
1646
1655
if (!np) {
···
1962
1975
put_padctl:
1963
1976
of_node_put(np);
1964
1977
tegra_xusb_padctl_put(tegra->padctl);
1965
-
dispose_wake:
1966
-
tegra_xusb_dispose_wake(tegra);
1967
1978
return err;
1968
1979
}
1969
1980
···
1993
2008
1994
2009
if (tegra->padctl_irq)
1995
2010
pm_runtime_disable(&pdev->dev);
1996
-
1997
-
tegra_xusb_dispose_wake(tegra);
1998
2011
1999
2012
pm_runtime_put(&pdev->dev);
2000
2013
+8
drivers/usb/misc/onboard_usb_dev.h
+8
drivers/usb/misc/onboard_usb_dev.h
···
115
115
.is_hub = true,
116
116
};
117
117
118
+
static const struct onboard_dev_pdata wch_ch334_data = {
119
+
.reset_us = 14000,
120
+
.num_supplies = 2,
121
+
.supply_names = { "vdd33", "v5" },
122
+
.is_hub = true,
123
+
};
124
+
118
125
static const struct onboard_dev_pdata xmos_xvf3500_data = {
119
126
.reset_us = 1,
120
127
.num_supplies = 2,
···
153
146
{ .compatible = "usbbda,5411", .data = &realtek_rts5411_data, },
154
147
{ .compatible = "usbbda,414", .data = &realtek_rts5411_data, },
155
148
{ .compatible = "usbbda,5414", .data = &realtek_rts5411_data, },
149
+
{ .compatible = "usb1a86,8091", .data = &wch_ch334_data, },
156
150
{ .compatible = "usb1da0,5511", .data = ¶de_ps5511_data, },
157
151
{ .compatible = "usb1da0,55a1", .data = ¶de_ps5511_data, },
158
152
{ .compatible = "usb2109,817", .data = &vialab_vl817_data, },
+26
-48
drivers/usb/phy/phy-generic.c
+26
-48
drivers/usb/phy/phy-generic.c
···
20
20
#include <linux/slab.h>
21
21
#include <linux/clk.h>
22
22
#include <linux/regulator/consumer.h>
23
-
#include <linux/of.h>
23
+
#include <linux/property.h>
24
24
#include <linux/gpio/consumer.h>
25
25
#include <linux/delay.h>
26
26
···
49
49
int ret = 0;
50
50
51
51
if (suspend) {
52
-
if (!IS_ERR(nop->clk))
53
-
clk_disable_unprepare(nop->clk);
52
+
clk_disable_unprepare(nop->clk);
54
53
if (!IS_ERR(nop->vcc) && !device_may_wakeup(x->dev))
55
54
ret = regulator_disable(nop->vcc);
56
55
} else {
57
56
if (!IS_ERR(nop->vcc) && !device_may_wakeup(x->dev))
58
57
ret = regulator_enable(nop->vcc);
59
-
if (!IS_ERR(nop->clk))
60
-
clk_prepare_enable(nop->clk);
58
+
clk_prepare_enable(nop->clk);
61
59
}
62
60
63
61
return ret;
···
135
137
dev_err(phy->dev, "Failed to enable power\n");
136
138
}
137
139
138
-
if (!IS_ERR(nop->clk)) {
139
-
ret = clk_prepare_enable(nop->clk);
140
-
if (ret)
141
-
return ret;
142
-
}
140
+
ret = clk_prepare_enable(nop->clk);
141
+
if (ret)
142
+
return ret;
143
143
144
144
nop_reset(nop);
145
145
···
151
155
152
156
gpiod_set_value_cansleep(nop->gpiod_reset, 1);
153
157
154
-
if (!IS_ERR(nop->clk))
155
-
clk_disable_unprepare(nop->clk);
158
+
clk_disable_unprepare(nop->clk);
156
159
157
160
if (!IS_ERR(nop->vcc)) {
158
161
if (regulator_disable(nop->vcc))
···
197
202
{
198
203
enum usb_phy_type type = USB_PHY_TYPE_USB2;
199
204
int err = 0;
200
-
201
205
u32 clk_rate = 0;
202
-
bool needs_clk = false;
203
206
204
-
if (dev->of_node) {
205
-
struct device_node *node = dev->of_node;
206
-
207
-
if (of_property_read_u32(node, "clock-frequency", &clk_rate))
208
-
clk_rate = 0;
209
-
210
-
needs_clk = of_property_present(node, "clocks");
211
-
}
207
+
device_property_read_u32(dev, "clock-frequency", &clk_rate);
212
208
nop->gpiod_reset = devm_gpiod_get_optional(dev, "reset",
213
209
GPIOD_ASIS);
214
210
err = PTR_ERR_OR_ZERO(nop->gpiod_reset);
···
221
235
if (!nop->phy.otg)
222
236
return -ENOMEM;
223
237
224
-
nop->clk = devm_clk_get(dev, "main_clk");
225
-
if (IS_ERR(nop->clk)) {
226
-
dev_dbg(dev, "Can't get phy clock: %ld\n",
227
-
PTR_ERR(nop->clk));
228
-
if (needs_clk)
229
-
return PTR_ERR(nop->clk);
230
-
}
238
+
nop->clk = devm_clk_get_optional(dev, "main_clk");
239
+
if (IS_ERR(nop->clk))
240
+
return dev_err_probe(dev, PTR_ERR(nop->clk),
241
+
"Can't get phy clock\n");
231
242
232
-
if (!IS_ERR(nop->clk) && clk_rate) {
243
+
if (clk_rate) {
233
244
err = clk_set_rate(nop->clk, clk_rate);
234
-
if (err) {
235
-
dev_err(dev, "Error setting clock rate\n");
236
-
return err;
237
-
}
245
+
if (err)
246
+
return dev_err_probe(dev, err,
247
+
"Error setting clock rate\n");
238
248
}
239
249
240
250
nop->vcc = devm_regulator_get_optional(dev, "vcc");
···
264
282
static int usb_phy_generic_probe(struct platform_device *pdev)
265
283
{
266
284
struct device *dev = &pdev->dev;
267
-
struct device_node *dn = dev->of_node;
268
285
struct usb_phy_generic *nop;
269
286
int err;
270
287
···
274
293
err = usb_phy_gen_create_phy(dev, nop);
275
294
if (err)
276
295
return err;
296
+
277
297
if (nop->gpiod_vbus) {
278
-
err = devm_request_threaded_irq(&pdev->dev,
298
+
err = devm_request_threaded_irq(dev,
279
299
gpiod_to_irq(nop->gpiod_vbus),
280
300
NULL, nop_gpio_vbus_thread,
281
301
VBUS_IRQ_FLAGS, "vbus_detect",
282
302
nop);
283
-
if (err) {
284
-
dev_err(&pdev->dev, "can't request irq %i, err: %d\n",
285
-
gpiod_to_irq(nop->gpiod_vbus), err);
286
-
return err;
287
-
}
303
+
if (err)
304
+
return dev_err_probe(dev, err, "can't request irq %i\n",
305
+
gpiod_to_irq(nop->gpiod_vbus));
306
+
288
307
nop->phy.otg->state = gpiod_get_value(nop->gpiod_vbus) ?
289
308
OTG_STATE_B_PERIPHERAL : OTG_STATE_B_IDLE;
290
309
}
···
293
312
nop->phy.shutdown = usb_gen_phy_shutdown;
294
313
295
314
err = usb_add_phy_dev(&nop->phy);
296
-
if (err) {
297
-
dev_err(&pdev->dev, "can't register transceiver, err: %d\n",
298
-
err);
299
-
return err;
300
-
}
315
+
if (err)
316
+
return dev_err_probe(dev, err, "can't register transceiver\n");
301
317
302
318
platform_set_drvdata(pdev, nop);
303
319
304
-
device_set_wakeup_capable(&pdev->dev,
305
-
of_property_read_bool(dn, "wakeup-source"));
320
+
device_set_wakeup_capable(dev,
321
+
device_property_read_bool(dev, "wakeup-source"));
306
322
307
323
return 0;
308
324
}
+267
-30
drivers/usb/phy/phy-tegra-usb.c
+267
-30
drivers/usb/phy/phy-tegra-usb.c
···
29
29
#include <linux/usb/tegra_usb_phy.h>
30
30
#include <linux/usb/ulpi.h>
31
31
32
+
#define USB_TXFILLTUNING 0x154
33
+
#define USB_FIFO_TXFILL_THRES(x) (((x) & 0x1f) << 16)
34
+
#define USB_FIFO_TXFILL_MASK 0x1f0000
35
+
32
36
#define ULPI_VIEWPORT 0x170
33
37
34
38
/* PORTSC PTS/PHCD bits, Tegra20 only */
35
39
#define TEGRA_USB_PORTSC1 0x184
36
-
#define TEGRA_USB_PORTSC1_PTS(x) (((x) & 0x3) << 30)
37
-
#define TEGRA_USB_PORTSC1_PHCD BIT(23)
40
+
#define TEGRA_USB_PORTSC1_PTS(x) (((x) & 0x3) << 30)
41
+
#define TEGRA_USB_PORTSC1_PHCD BIT(23)
42
+
#define TEGRA_USB_PORTSC1_WKOC BIT(22)
43
+
#define TEGRA_USB_PORTSC1_WKDS BIT(21)
44
+
#define TEGRA_USB_PORTSC1_WKCN BIT(20)
38
45
39
46
/* HOSTPC1 PTS/PHCD bits, Tegra30 and above */
47
+
#define TEGRA30_USB_PORTSC1 0x174
40
48
#define TEGRA_USB_HOSTPC1_DEVLC 0x1b4
41
-
#define TEGRA_USB_HOSTPC1_DEVLC_PTS(x) (((x) & 0x7) << 29)
42
-
#define TEGRA_USB_HOSTPC1_DEVLC_PHCD BIT(22)
49
+
#define TEGRA_USB_HOSTPC1_DEVLC_PTS(x) (((x) & 0x7) << 29)
50
+
#define TEGRA_USB_HOSTPC1_DEVLC_PHCD BIT(22)
51
+
#define TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC 4
43
52
44
53
/* Bits of PORTSC1, which will get cleared by writing 1 into them */
45
54
#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
···
60
51
#define USB_SUSP_CLR BIT(5)
61
52
#define USB_PHY_CLK_VALID BIT(7)
62
53
#define UTMIP_RESET BIT(11)
63
-
#define UHSIC_RESET BIT(11)
64
54
#define UTMIP_PHY_ENABLE BIT(12)
65
55
#define ULPI_PHY_ENABLE BIT(13)
66
56
#define USB_SUSP_SET BIT(14)
57
+
#define UHSIC_RESET BIT(14)
67
58
#define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16)
59
+
#define UHSIC_PHY_ENABLE BIT(19)
68
60
69
61
#define USB_PHY_VBUS_SENSORS 0x404
70
62
#define B_SESS_VLD_WAKEUP_EN BIT(14)
···
166
156
#define UTMIP_BIAS_CFG1 0x83c
167
157
#define UTMIP_BIAS_PDTRK_COUNT(x) (((x) & 0x1f) << 3)
168
158
159
+
/*
160
+
* Tegra20 has no UTMIP registers on PHY2 and UHSIC registers start from 0x800
161
+
* just where UTMIP registers should have been. This is the case only with Tegra20
162
+
* Tegra30+ have UTMIP registers at 0x800 and UHSIC registers are shifted by 0x400
163
+
* to 0xc00, but register layout is preserved.
164
+
*/
165
+
#define UHSIC_PLL_CFG1 0x804
166
+
#define UHSIC_XTAL_FREQ_COUNT(x) (((x) & 0xfff) << 0)
167
+
#define UHSIC_PLLU_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 14)
168
+
169
+
#define UHSIC_HSRX_CFG0 0x808
170
+
#define UHSIC_ELASTIC_UNDERRUN_LIMIT(x) (((x) & 0x1f) << 2)
171
+
#define UHSIC_ELASTIC_OVERRUN_LIMIT(x) (((x) & 0x1f) << 8)
172
+
#define UHSIC_IDLE_WAIT(x) (((x) & 0x1f) << 13)
173
+
174
+
#define UHSIC_HSRX_CFG1 0x80c
175
+
#define UHSIC_HS_SYNC_START_DLY(x) (((x) & 0x1f) << 1)
176
+
177
+
#define UHSIC_TX_CFG0 0x810
178
+
#define UHSIC_HS_READY_WAIT_FOR_VALID BIT(9)
179
+
180
+
#define UHSIC_MISC_CFG0 0x814
181
+
#define UHSIC_SUSPEND_EXIT_ON_EDGE BIT(7)
182
+
#define UHSIC_DETECT_SHORT_CONNECT BIT(8)
183
+
#define UHSIC_FORCE_XCVR_MODE BIT(15)
184
+
#define UHSIC_DISABLE_BUSRESET BIT(20)
185
+
186
+
#define UHSIC_MISC_CFG1 0x818
187
+
#define UHSIC_PLLU_STABLE_COUNT(x) (((x) & 0xfff) << 2)
188
+
189
+
#define UHSIC_PADS_CFG0 0x81c
190
+
#define UHSIC_TX_RTUNEN 0xf000
191
+
#define UHSIC_TX_RTUNE(x) (((x) & 0xf) << 12)
192
+
193
+
#define UHSIC_PADS_CFG1 0x820
194
+
#define UHSIC_PD_BG BIT(2)
195
+
#define UHSIC_PD_TX BIT(3)
196
+
#define UHSIC_PD_TRK BIT(4)
197
+
#define UHSIC_PD_RX BIT(5)
198
+
#define UHSIC_PD_ZI BIT(6)
199
+
#define UHSIC_RX_SEL BIT(7)
200
+
#define UHSIC_RPD_DATA BIT(9)
201
+
#define UHSIC_RPD_STROBE BIT(10)
202
+
#define UHSIC_RPU_DATA BIT(11)
203
+
#define UHSIC_RPU_STROBE BIT(12)
204
+
205
+
#define UHSIC_CMD_CFG0 0x824
206
+
#define UHSIC_PRETEND_CONNECT_DETECT BIT(5)
207
+
208
+
#define UHSIC_STAT_CFG0 0x828
209
+
#define UHSIC_CONNECT_DETECT BIT(0)
210
+
169
211
/* For Tegra30 and above only, the address is different in Tegra20 */
170
212
#define USB_USBMODE 0x1f8
171
213
#define USB_USBMODE_MASK (3 << 0)
···
236
174
u8 enable_delay;
237
175
u8 stable_count;
238
176
u8 active_delay;
239
-
u8 xtal_freq_count;
177
+
u8 utmi_xtal_freq_count;
178
+
u16 hsic_xtal_freq_count;
240
179
u16 debounce;
241
180
};
242
181
···
247
184
.enable_delay = 0x02,
248
185
.stable_count = 0x2F,
249
186
.active_delay = 0x04,
250
-
.xtal_freq_count = 0x76,
187
+
.utmi_xtal_freq_count = 0x76,
188
+
.hsic_xtal_freq_count = 0x1CA,
251
189
.debounce = 0x7530,
252
190
},
253
191
{
···
256
192
.enable_delay = 0x02,
257
193
.stable_count = 0x33,
258
194
.active_delay = 0x05,
259
-
.xtal_freq_count = 0x7F,
195
+
.utmi_xtal_freq_count = 0x7F,
196
+
.hsic_xtal_freq_count = 0x1F0,
260
197
.debounce = 0x7EF4,
261
198
},
262
199
{
···
265
200
.enable_delay = 0x03,
266
201
.stable_count = 0x4B,
267
202
.active_delay = 0x06,
268
-
.xtal_freq_count = 0xBB,
203
+
.utmi_xtal_freq_count = 0xBB,
204
+
.hsic_xtal_freq_count = 0x2DD,
269
205
.debounce = 0xBB80,
270
206
},
271
207
{
···
274
208
.enable_delay = 0x04,
275
209
.stable_count = 0x66,
276
210
.active_delay = 0x09,
277
-
.xtal_freq_count = 0xFE,
211
+
.utmi_xtal_freq_count = 0xFE,
212
+
.hsic_xtal_freq_count = 0x3E0,
278
213
.debounce = 0xFDE8,
279
214
},
280
215
};
···
599
532
val = readl_relaxed(base + UTMIP_PLL_CFG1);
600
533
val &= ~(UTMIP_XTAL_FREQ_COUNT(~0) |
601
534
UTMIP_PLLU_ENABLE_DLY_COUNT(~0));
602
-
val |= UTMIP_XTAL_FREQ_COUNT(phy->freq->xtal_freq_count) |
535
+
val |= UTMIP_XTAL_FREQ_COUNT(phy->freq->utmi_xtal_freq_count) |
603
536
UTMIP_PLLU_ENABLE_DLY_COUNT(phy->freq->enable_delay);
604
537
writel_relaxed(val, base + UTMIP_PLL_CFG1);
605
538
}
···
870
803
return 0;
871
804
}
872
805
806
+
static u32 tegra_hsic_readl(struct tegra_usb_phy *phy, u32 reg)
807
+
{
808
+
void __iomem *base = phy->regs;
809
+
u32 shift = phy->soc_config->uhsic_registers_offset;
810
+
811
+
return readl_relaxed(base + shift + reg);
812
+
}
813
+
814
+
static void tegra_hsic_writel(struct tegra_usb_phy *phy, u32 reg, u32 value)
815
+
{
816
+
void __iomem *base = phy->regs;
817
+
u32 shift = phy->soc_config->uhsic_registers_offset;
818
+
819
+
writel_relaxed(value, base + shift + reg);
820
+
}
821
+
822
+
static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
823
+
{
824
+
struct tegra_utmip_config *config = phy->config;
825
+
void __iomem *base = phy->regs;
826
+
u32 val;
827
+
int err = 0;
828
+
829
+
val = tegra_hsic_readl(phy, UHSIC_PADS_CFG1);
830
+
val &= ~(UHSIC_PD_BG | UHSIC_PD_TX | UHSIC_PD_TRK | UHSIC_PD_RX |
831
+
UHSIC_PD_ZI | UHSIC_RPD_DATA | UHSIC_RPD_STROBE);
832
+
val |= UHSIC_RX_SEL;
833
+
tegra_hsic_writel(phy, UHSIC_PADS_CFG1, val);
834
+
835
+
udelay(2);
836
+
837
+
val = readl_relaxed(base + USB_SUSP_CTRL);
838
+
val |= UHSIC_RESET;
839
+
writel_relaxed(val, base + USB_SUSP_CTRL);
840
+
841
+
udelay(30);
842
+
843
+
val = readl_relaxed(base + USB_SUSP_CTRL);
844
+
val |= UHSIC_PHY_ENABLE;
845
+
writel_relaxed(val, base + USB_SUSP_CTRL);
846
+
847
+
val = tegra_hsic_readl(phy, UHSIC_HSRX_CFG0);
848
+
val &= ~(UHSIC_IDLE_WAIT(~0) |
849
+
UHSIC_ELASTIC_UNDERRUN_LIMIT(~0) |
850
+
UHSIC_ELASTIC_OVERRUN_LIMIT(~0));
851
+
val |= UHSIC_IDLE_WAIT(config->idle_wait_delay) |
852
+
UHSIC_ELASTIC_UNDERRUN_LIMIT(config->elastic_limit) |
853
+
UHSIC_ELASTIC_OVERRUN_LIMIT(config->elastic_limit);
854
+
tegra_hsic_writel(phy, UHSIC_HSRX_CFG0, val);
855
+
856
+
val = tegra_hsic_readl(phy, UHSIC_HSRX_CFG1);
857
+
val &= ~UHSIC_HS_SYNC_START_DLY(~0);
858
+
val |= UHSIC_HS_SYNC_START_DLY(config->hssync_start_delay);
859
+
tegra_hsic_writel(phy, UHSIC_HSRX_CFG1, val);
860
+
861
+
val = tegra_hsic_readl(phy, UHSIC_MISC_CFG0);
862
+
val |= UHSIC_SUSPEND_EXIT_ON_EDGE;
863
+
tegra_hsic_writel(phy, UHSIC_MISC_CFG0, val);
864
+
865
+
val = tegra_hsic_readl(phy, UHSIC_MISC_CFG1);
866
+
val &= ~UHSIC_PLLU_STABLE_COUNT(~0);
867
+
val |= UHSIC_PLLU_STABLE_COUNT(phy->freq->stable_count);
868
+
tegra_hsic_writel(phy, UHSIC_MISC_CFG1, val);
869
+
870
+
val = tegra_hsic_readl(phy, UHSIC_PLL_CFG1);
871
+
val &= ~(UHSIC_XTAL_FREQ_COUNT(~0) |
872
+
UHSIC_PLLU_ENABLE_DLY_COUNT(~0));
873
+
val |= UHSIC_XTAL_FREQ_COUNT(phy->freq->hsic_xtal_freq_count) |
874
+
UHSIC_PLLU_ENABLE_DLY_COUNT(phy->freq->enable_delay);
875
+
tegra_hsic_writel(phy, UHSIC_PLL_CFG1, val);
876
+
877
+
val = readl_relaxed(base + USB_SUSP_CTRL);
878
+
val &= ~UHSIC_RESET;
879
+
writel_relaxed(val, base + USB_SUSP_CTRL);
880
+
881
+
udelay(2);
882
+
883
+
if (phy->soc_config->requires_usbmode_setup) {
884
+
val = readl_relaxed(base + USB_USBMODE);
885
+
val &= ~USB_USBMODE_MASK;
886
+
if (phy->mode == USB_DR_MODE_HOST)
887
+
val |= USB_USBMODE_HOST;
888
+
else
889
+
val |= USB_USBMODE_DEVICE;
890
+
writel_relaxed(val, base + USB_USBMODE);
891
+
}
892
+
893
+
set_pts(phy, phy->soc_config->uhsic_pts_value);
894
+
895
+
val = readl_relaxed(base + USB_TXFILLTUNING);
896
+
if ((val & USB_FIFO_TXFILL_MASK) != USB_FIFO_TXFILL_THRES(0x10)) {
897
+
val = USB_FIFO_TXFILL_THRES(0x10);
898
+
writel_relaxed(val, base + USB_TXFILLTUNING);
899
+
}
900
+
901
+
val = readl_relaxed(base + phy->soc_config->portsc1_offset);
902
+
val &= ~(TEGRA_USB_PORTSC1_WKOC | TEGRA_USB_PORTSC1_WKDS |
903
+
TEGRA_USB_PORTSC1_WKCN);
904
+
writel_relaxed(val, base + phy->soc_config->portsc1_offset);
905
+
906
+
val = tegra_hsic_readl(phy, UHSIC_PADS_CFG0);
907
+
val &= ~UHSIC_TX_RTUNEN;
908
+
val |= UHSIC_TX_RTUNE(phy->soc_config->uhsic_tx_rtune);
909
+
tegra_hsic_writel(phy, UHSIC_PADS_CFG0, val);
910
+
911
+
err = utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
912
+
USB_PHY_CLK_VALID);
913
+
914
+
if (err)
915
+
dev_err(phy->u_phy.dev,
916
+
"Timeout waiting for PHY to stabilize on enable (HSIC)\n");
917
+
918
+
return err;
919
+
}
920
+
921
+
static int uhsic_phy_power_off(struct tegra_usb_phy *phy)
922
+
{
923
+
void __iomem *base = phy->regs;
924
+
u32 val;
925
+
926
+
set_phcd(phy, true);
927
+
928
+
val = tegra_hsic_readl(phy, UHSIC_PADS_CFG1);
929
+
val |= (UHSIC_PD_BG | UHSIC_PD_TX | UHSIC_PD_TRK | UHSIC_PD_RX |
930
+
UHSIC_PD_ZI | UHSIC_RPD_DATA | UHSIC_RPD_STROBE);
931
+
tegra_hsic_writel(phy, UHSIC_PADS_CFG1, val);
932
+
933
+
val = readl_relaxed(base + USB_SUSP_CTRL);
934
+
val |= UHSIC_RESET;
935
+
writel_relaxed(val, base + USB_SUSP_CTRL);
936
+
937
+
udelay(30);
938
+
939
+
val = readl_relaxed(base + USB_SUSP_CTRL);
940
+
val &= ~UHSIC_PHY_ENABLE;
941
+
writel_relaxed(val, base + USB_SUSP_CTRL);
942
+
943
+
return 0;
944
+
}
945
+
873
946
static int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
874
947
{
875
-
int err;
948
+
int err = 0;
876
949
877
950
if (phy->powered_on)
878
951
return 0;
879
952
880
-
if (phy->is_ulpi_phy)
881
-
err = ulpi_phy_power_on(phy);
882
-
else
953
+
switch (phy->phy_type) {
954
+
case USBPHY_INTERFACE_MODE_UTMI:
883
955
err = utmi_phy_power_on(phy);
956
+
break;
957
+
958
+
case USBPHY_INTERFACE_MODE_ULPI:
959
+
err = ulpi_phy_power_on(phy);
960
+
break;
961
+
962
+
case USBPHY_INTERFACE_MODE_HSIC:
963
+
err = uhsic_phy_power_on(phy);
964
+
break;
965
+
966
+
default:
967
+
break;
968
+
}
969
+
884
970
if (err)
885
971
return err;
886
972
···
1047
827
1048
828
static int tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
1049
829
{
1050
-
int err;
830
+
int err = 0;
1051
831
1052
832
if (!phy->powered_on)
1053
833
return 0;
1054
834
1055
-
if (phy->is_ulpi_phy)
1056
-
err = ulpi_phy_power_off(phy);
1057
-
else
835
+
switch (phy->phy_type) {
836
+
case USBPHY_INTERFACE_MODE_UTMI:
1058
837
err = utmi_phy_power_off(phy);
838
+
break;
839
+
840
+
case USBPHY_INTERFACE_MODE_ULPI:
841
+
err = ulpi_phy_power_off(phy);
842
+
break;
843
+
844
+
case USBPHY_INTERFACE_MODE_HSIC:
845
+
err = uhsic_phy_power_off(phy);
846
+
break;
847
+
848
+
default:
849
+
break;
850
+
}
851
+
1059
852
if (err)
1060
853
return err;
1061
854
···
1087
854
usb_phy_set_wakeup(u_phy, false);
1088
855
tegra_usb_phy_power_off(phy);
1089
856
1090
-
if (!phy->is_ulpi_phy)
857
+
if (phy->phy_type == USBPHY_INTERFACE_MODE_UTMI)
1091
858
utmip_pad_close(phy);
1092
859
1093
860
regulator_disable(phy->vbus);
···
1273
1040
goto disable_clk;
1274
1041
}
1275
1042
1276
-
if (!phy->is_ulpi_phy) {
1043
+
if (phy->phy_type == USBPHY_INTERFACE_MODE_UTMI) {
1277
1044
err = utmip_pad_open(phy);
1278
1045
if (err)
1279
1046
goto disable_vbus;
···
1290
1057
return 0;
1291
1058
1292
1059
close_phy:
1293
-
if (!phy->is_ulpi_phy)
1060
+
if (phy->phy_type == USBPHY_INTERFACE_MODE_UTMI)
1294
1061
utmip_pad_close(phy);
1295
1062
1296
1063
disable_vbus:
···
1327
1094
struct tegra_utmip_config *config;
1328
1095
struct resource *res;
1329
1096
int err;
1330
-
1331
-
tegra_phy->is_ulpi_phy = false;
1332
1097
1333
1098
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1334
1099
if (!res) {
···
1462
1231
.requires_usbmode_setup = false,
1463
1232
.requires_extra_tuning_parameters = false,
1464
1233
.requires_pmc_ao_power_up = false,
1234
+
.uhsic_registers_offset = 0,
1235
+
.uhsic_tx_rtune = 0, /* 40 ohm */
1236
+
.uhsic_pts_value = 0, /* UTMI */
1237
+
.portsc1_offset = TEGRA_USB_PORTSC1,
1465
1238
};
1466
1239
1467
1240
static const struct tegra_phy_soc_config tegra30_soc_config = {
···
1474
1239
.requires_usbmode_setup = true,
1475
1240
.requires_extra_tuning_parameters = true,
1476
1241
.requires_pmc_ao_power_up = true,
1242
+
.uhsic_registers_offset = 0x400,
1243
+
.uhsic_tx_rtune = 8, /* 50 ohm */
1244
+
.uhsic_pts_value = TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC,
1245
+
.portsc1_offset = TEGRA30_USB_PORTSC1,
1477
1246
};
1478
1247
1479
1248
static const struct of_device_id tegra_usb_phy_id_table[] = {
···
1491
1252
{
1492
1253
struct device_node *np = pdev->dev.of_node;
1493
1254
struct tegra_usb_phy *tegra_phy;
1494
-
enum usb_phy_interface phy_type;
1495
1255
struct reset_control *reset;
1496
1256
struct gpio_desc *gpiod;
1497
1257
struct resource *res;
···
1552
1314
return err;
1553
1315
}
1554
1316
1555
-
phy_type = of_usb_get_phy_mode(np);
1556
-
switch (phy_type) {
1317
+
tegra_phy->phy_type = of_usb_get_phy_mode(np);
1318
+
switch (tegra_phy->phy_type) {
1557
1319
case USBPHY_INTERFACE_MODE_UTMI:
1320
+
case USBPHY_INTERFACE_MODE_HSIC:
1558
1321
err = utmi_phy_probe(tegra_phy, pdev);
1559
1322
if (err)
1560
1323
return err;
···
1580
1341
break;
1581
1342
1582
1343
case USBPHY_INTERFACE_MODE_ULPI:
1583
-
tegra_phy->is_ulpi_phy = true;
1584
-
1585
1344
tegra_phy->clk = devm_clk_get(&pdev->dev, "ulpi-link");
1586
1345
err = PTR_ERR_OR_ZERO(tegra_phy->clk);
1587
1346
if (err) {
···
1619
1382
1620
1383
default:
1621
1384
dev_err(&pdev->dev, "phy_type %u is invalid or unsupported\n",
1622
-
phy_type);
1385
+
tegra_phy->phy_type);
1623
1386
return -EINVAL;
1624
1387
}
1625
1388
+6
drivers/usb/serial/option.c
+6
drivers/usb/serial/option.c
···
1401
1401
.driver_info = NCTRL(0) | RSVD(1) },
1402
1402
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a0, 0xff), /* Telit FN20C04 (rmnet) */
1403
1403
.driver_info = RSVD(0) | NCTRL(3) },
1404
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a1, 0xff), /* Telit FN20C04 (RNDIS) */
1405
+
.driver_info = NCTRL(4) },
1404
1406
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a2, 0xff), /* Telit FN920C04 (MBIM) */
1405
1407
.driver_info = NCTRL(4) },
1406
1408
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a3, 0xff), /* Telit FN920C04 (ECM) */
1407
1409
.driver_info = NCTRL(4) },
1408
1410
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a4, 0xff), /* Telit FN20C04 (rmnet) */
1409
1411
.driver_info = RSVD(0) | NCTRL(3) },
1412
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a6, 0xff), /* Telit FN920C04 (RNDIS) */
1413
+
.driver_info = NCTRL(4) },
1410
1414
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a7, 0xff), /* Telit FN920C04 (MBIM) */
1411
1415
.driver_info = NCTRL(4) },
1412
1416
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a8, 0xff), /* Telit FN920C04 (ECM) */
···
1418
1414
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a9, 0xff), /* Telit FN20C04 (rmnet) */
1419
1415
.driver_info = RSVD(0) | NCTRL(2) | RSVD(3) | RSVD(4) },
1420
1416
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10aa, 0xff), /* Telit FN920C04 (MBIM) */
1417
+
.driver_info = NCTRL(3) | RSVD(4) | RSVD(5) },
1418
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10ab, 0xff), /* Telit FN920C04 (RNDIS) */
1421
1419
.driver_info = NCTRL(3) | RSVD(4) | RSVD(5) },
1422
1420
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10b0, 0xff, 0xff, 0x30), /* Telit FE990B (rmnet) */
1423
1421
.driver_info = NCTRL(5) },
+1
-1
drivers/usb/typec/Makefile
+1
-1
drivers/usb/typec/Makefile
···
1
1
# SPDX-License-Identifier: GPL-2.0
2
2
obj-$(CONFIG_TYPEC) += typec.o
3
-
typec-y := class.o mux.o bus.o pd.o retimer.o
3
+
typec-y := class.o mux.o bus.o pd.o retimer.o mode_selection.o
4
4
typec-$(CONFIG_ACPI) += port-mapper.o
5
5
obj-$(CONFIG_TYPEC) += altmodes/
6
6
obj-$(CONFIG_TYPEC_TCPM) += tcpm/
+4
-2
drivers/usb/typec/altmodes/displayport.c
+4
-2
drivers/usb/typec/altmodes/displayport.c
···
804
804
if (plug)
805
805
typec_altmode_set_drvdata(plug, dp);
806
806
807
-
dp->state = plug ? DP_STATE_ENTER_PRIME : DP_STATE_ENTER;
808
-
schedule_work(&dp->work);
807
+
if (!alt->mode_selection) {
808
+
dp->state = plug ? DP_STATE_ENTER_PRIME : DP_STATE_ENTER;
809
+
schedule_work(&dp->work);
810
+
}
809
811
810
812
return 0;
811
813
}
+1
-1
drivers/usb/typec/altmodes/thunderbolt.c
+1
-1
drivers/usb/typec/altmodes/thunderbolt.c
···
307
307
typec_altmode_set_drvdata(alt, tbt);
308
308
typec_altmode_set_ops(alt, &tbt_altmode_ops);
309
309
310
-
if (tbt_ready(alt)) {
310
+
if (!alt->mode_selection && tbt_ready(alt)) {
311
311
if (tbt->plug[TYPEC_PLUG_SOP_P])
312
312
tbt->state = TBT_STATE_SOP_P_ENTER;
313
313
else if (tbt->plug[TYPEC_PLUG_SOP_PP])
+24
-1
drivers/usb/typec/bus.c
+24
-1
drivers/usb/typec/bus.c
···
445
445
&dev_attr_description.attr,
446
446
NULL
447
447
};
448
-
ATTRIBUTE_GROUPS(typec);
448
+
449
+
static umode_t typec_is_visible(struct kobject *kobj, struct attribute *attr, int n)
450
+
{
451
+
if (is_typec_partner_altmode(kobj_to_dev(kobj)))
452
+
return attr->mode;
453
+
return 0;
454
+
}
455
+
456
+
static const struct attribute_group typec_group = {
457
+
.is_visible = typec_is_visible,
458
+
.attrs = typec_attrs,
459
+
};
460
+
461
+
static const struct attribute_group *typec_groups[] = {
462
+
&typec_group,
463
+
NULL
464
+
};
449
465
450
466
static int typec_match(struct device *dev, const struct device_driver *driver)
451
467
{
452
468
const struct typec_altmode_driver *drv = to_altmode_driver(driver);
453
469
struct typec_altmode *altmode = to_typec_altmode(dev);
454
470
const struct typec_device_id *id;
471
+
472
+
if (!is_typec_partner_altmode(dev))
473
+
return 0;
455
474
456
475
for (id = drv->id_table; id->svid; id++)
457
476
if (id->svid == altmode->svid)
···
481
462
static int typec_uevent(const struct device *dev, struct kobj_uevent_env *env)
482
463
{
483
464
const struct typec_altmode *altmode = to_typec_altmode(dev);
465
+
466
+
if (!is_typec_partner_altmode(dev))
467
+
return 0;
484
468
485
469
if (add_uevent_var(env, "SVID=%04X", altmode->svid))
486
470
return -ENOMEM;
···
569
547
.probe = typec_probe,
570
548
.remove = typec_remove,
571
549
};
550
+
EXPORT_SYMBOL_GPL(typec_bus);
-6
drivers/usb/typec/bus.h
-6
drivers/usb/typec/bus.h
···
5
5
6
6
#include <linux/usb/typec_altmode.h>
7
7
8
-
struct bus_type;
9
8
struct typec_mux;
10
9
struct typec_retimer;
11
10
···
26
27
};
27
28
28
29
#define to_altmode(d) container_of(d, struct altmode, adev)
29
-
30
-
extern const struct bus_type typec_bus;
31
-
extern const struct device_type typec_altmode_dev_type;
32
-
33
-
#define is_typec_altmode(_dev_) (_dev_->type == &typec_altmode_dev_type)
34
30
35
31
#endif /* __USB_TYPEC_ALTMODE_H__ */
+121
-15
drivers/usb/typec/class.c
+121
-15
drivers/usb/typec/class.c
···
235
235
struct typec_altmode *adev = to_typec_altmode(dev);
236
236
const struct typec_device_id *id = data;
237
237
238
-
if (!is_typec_altmode(dev))
238
+
if (!is_typec_port_altmode(dev))
239
239
return 0;
240
240
241
241
return (adev->svid == id->svid);
···
445
445
}
446
446
static DEVICE_ATTR_RO(svid);
447
447
448
+
static int increment_duplicated_priority(struct device *dev, void *data)
449
+
{
450
+
if (is_typec_port_altmode(dev)) {
451
+
struct typec_altmode **alt_target = (struct typec_altmode **)data;
452
+
struct typec_altmode *alt = to_typec_altmode(dev);
453
+
454
+
if (alt != *alt_target && alt->priority == (*alt_target)->priority) {
455
+
alt->priority++;
456
+
*alt_target = alt;
457
+
return 1;
458
+
}
459
+
}
460
+
return 0;
461
+
}
462
+
463
+
static int find_duplicated_priority(struct device *dev, void *data)
464
+
{
465
+
if (is_typec_port_altmode(dev)) {
466
+
struct typec_altmode **alt_target = (struct typec_altmode **)data;
467
+
struct typec_altmode *alt = to_typec_altmode(dev);
468
+
469
+
if (alt != *alt_target && alt->priority == (*alt_target)->priority)
470
+
return 1;
471
+
}
472
+
return 0;
473
+
}
474
+
475
+
static int typec_mode_set_priority(struct typec_altmode *alt, const u8 priority)
476
+
{
477
+
struct typec_port *port = to_typec_port(alt->dev.parent);
478
+
const u8 old_priority = alt->priority;
479
+
int res = 1;
480
+
481
+
alt->priority = priority;
482
+
while (res) {
483
+
res = device_for_each_child(&port->dev, &alt, find_duplicated_priority);
484
+
if (res) {
485
+
alt->priority++;
486
+
if (alt->priority == 0) {
487
+
alt->priority = old_priority;
488
+
return -EOVERFLOW;
489
+
}
490
+
}
491
+
}
492
+
493
+
res = 1;
494
+
alt->priority = priority;
495
+
while (res)
496
+
res = device_for_each_child(&port->dev, &alt,
497
+
increment_duplicated_priority);
498
+
499
+
return 0;
500
+
}
501
+
502
+
static ssize_t priority_store(struct device *dev,
503
+
struct device_attribute *attr,
504
+
const char *buf, size_t size)
505
+
{
506
+
u8 val;
507
+
int err = kstrtou8(buf, 10, &val);
508
+
509
+
if (!err)
510
+
err = typec_mode_set_priority(to_typec_altmode(dev), val);
511
+
512
+
if (!err)
513
+
return size;
514
+
return err;
515
+
}
516
+
517
+
static ssize_t priority_show(struct device *dev,
518
+
struct device_attribute *attr, char *buf)
519
+
{
520
+
return sysfs_emit(buf, "%u\n", to_typec_altmode(dev)->priority);
521
+
}
522
+
static DEVICE_ATTR_RW(priority);
523
+
448
524
static struct attribute *typec_altmode_attrs[] = {
449
525
&dev_attr_active.attr,
450
526
&dev_attr_mode.attr,
451
527
&dev_attr_svid.attr,
452
528
&dev_attr_vdo.attr,
529
+
&dev_attr_priority.attr,
453
530
NULL
454
531
};
455
532
···
534
457
struct attribute *attr, int n)
535
458
{
536
459
struct typec_altmode *adev = to_typec_altmode(kobj_to_dev(kobj));
460
+
struct typec_port *port = typec_altmode2port(adev);
537
461
538
-
if (attr == &dev_attr_active.attr)
539
-
if (!is_typec_port(adev->dev.parent) &&
540
-
(!adev->ops || !adev->ops->activate))
541
-
return 0444;
462
+
if (attr == &dev_attr_active.attr) {
463
+
if (!is_typec_port(adev->dev.parent)) {
464
+
if (!port->mode_control || !adev->ops || !adev->ops->activate)
465
+
return 0444;
466
+
}
467
+
} else if (attr == &dev_attr_priority.attr) {
468
+
if (!is_typec_port(adev->dev.parent) || !port->mode_control)
469
+
return 0;
470
+
}
542
471
543
472
return attr->mode;
544
473
}
···
615
532
kfree(alt);
616
533
}
617
534
618
-
const struct device_type typec_altmode_dev_type = {
619
-
.name = "typec_alternate_mode",
535
+
const struct device_type typec_port_altmode_dev_type = {
536
+
.name = "typec_port_alternate_mode",
620
537
.groups = typec_altmode_groups,
621
538
.release = typec_altmode_release,
622
539
};
540
+
EXPORT_SYMBOL_GPL(typec_port_altmode_dev_type);
541
+
542
+
const struct device_type typec_plug_altmode_dev_type = {
543
+
.name = "typec_plug_alternate_mode",
544
+
.groups = typec_altmode_groups,
545
+
.release = typec_altmode_release,
546
+
};
547
+
EXPORT_SYMBOL_GPL(typec_plug_altmode_dev_type);
548
+
549
+
const struct device_type typec_partner_altmode_dev_type = {
550
+
.name = "typec_partner_alternate_mode",
551
+
.groups = typec_altmode_groups,
552
+
.release = typec_altmode_release,
553
+
};
554
+
EXPORT_SYMBOL_GPL(typec_partner_altmode_dev_type);
623
555
624
556
static struct typec_altmode *
625
557
typec_register_altmode(struct device *parent,
626
-
const struct typec_altmode_desc *desc)
558
+
const struct typec_altmode_desc *desc,
559
+
const struct device_type *type)
627
560
{
628
561
unsigned int id = altmode_id_get(parent);
629
562
bool is_port = is_typec_port(parent);
···
655
556
alt->adev.svid = desc->svid;
656
557
alt->adev.mode = desc->mode;
657
558
alt->adev.vdo = desc->vdo;
559
+
alt->adev.mode_selection = desc->mode_selection;
658
560
alt->roles = desc->roles;
659
561
alt->id = id;
660
562
···
675
575
676
576
alt->adev.dev.parent = parent;
677
577
alt->adev.dev.groups = alt->groups;
678
-
alt->adev.dev.type = &typec_altmode_dev_type;
578
+
alt->adev.dev.type = type;
679
579
dev_set_name(&alt->adev.dev, "%s.%u", dev_name(parent), id);
680
580
681
581
get_device(alt->adev.dev.parent);
···
684
584
if (!is_port)
685
585
typec_altmode_set_partner(alt);
686
586
687
-
/* The partners are bind to drivers */
688
-
if (is_typec_partner(parent))
689
-
alt->adev.dev.bus = &typec_bus;
587
+
alt->adev.dev.bus = &typec_bus;
690
588
691
589
/* Plug alt modes need a class to generate udev events. */
692
590
if (is_typec_plug(parent))
···
1061
963
typec_partner_register_altmode(struct typec_partner *partner,
1062
964
const struct typec_altmode_desc *desc)
1063
965
{
1064
-
return typec_register_altmode(&partner->dev, desc);
966
+
return typec_register_altmode(&partner->dev, desc, &typec_partner_altmode_dev_type);
1065
967
}
1066
968
EXPORT_SYMBOL_GPL(typec_partner_register_altmode);
1067
969
···
1291
1193
typec_plug_register_altmode(struct typec_plug *plug,
1292
1194
const struct typec_altmode_desc *desc)
1293
1195
{
1294
-
return typec_register_altmode(&plug->dev, desc);
1196
+
return typec_register_altmode(&plug->dev, desc, &typec_plug_altmode_dev_type);
1295
1197
}
1296
1198
EXPORT_SYMBOL_GPL(typec_plug_register_altmode);
1297
1199
···
2580
2482
struct typec_altmode *adev;
2581
2483
struct typec_mux *mux;
2582
2484
struct typec_retimer *retimer;
2485
+
int ret;
2583
2486
2584
2487
mux = typec_mux_get(&port->dev);
2585
2488
if (IS_ERR(mux))
···
2592
2493
return ERR_CAST(retimer);
2593
2494
}
2594
2495
2595
-
adev = typec_register_altmode(&port->dev, desc);
2496
+
adev = typec_register_altmode(&port->dev, desc, &typec_port_altmode_dev_type);
2596
2497
if (IS_ERR(adev)) {
2597
2498
typec_retimer_put(retimer);
2598
2499
typec_mux_put(mux);
2599
2500
} else {
2600
2501
to_altmode(adev)->mux = mux;
2601
2502
to_altmode(adev)->retimer = retimer;
2503
+
2504
+
ret = typec_mode_set_priority(adev, 0);
2505
+
if (ret) {
2506
+
typec_unregister_altmode(adev);
2507
+
return ERR_PTR(ret);
2508
+
}
2602
2509
}
2603
2510
2604
2511
return adev;
···
2799
2694
}
2800
2695
2801
2696
port->pd = cap->pd;
2697
+
port->mode_control = !cap->no_mode_control;
2802
2698
2803
2699
ret = device_add(&port->dev);
2804
2700
if (ret) {
+3
drivers/usb/typec/class.h
+3
drivers/usb/typec/class.h
···
9
9
struct typec_mux;
10
10
struct typec_switch;
11
11
struct usb_device;
12
+
struct mode_selection;
12
13
13
14
struct typec_plug {
14
15
struct device dev;
···
40
39
u8 usb_capability;
41
40
42
41
struct usb_power_delivery *pd;
42
+
struct mode_selection *sel;
43
43
44
44
void (*attach)(struct typec_partner *partner, struct device *dev);
45
45
void (*deattach)(struct typec_partner *partner, struct device *dev);
···
64
62
struct mutex partner_link_lock;
65
63
66
64
enum typec_orientation orientation;
65
+
bool mode_control;
67
66
struct typec_switch *sw;
68
67
struct typec_mux *mux;
69
68
struct typec_retimer *retimer;
+21
-9
drivers/usb/typec/hd3ss3220.c
+21
-9
drivers/usb/typec/hd3ss3220.c
···
204
204
.port_type_set = hd3ss3220_port_type_set,
205
205
};
206
206
207
+
static void hd3ss3220_regulator_control(struct hd3ss3220 *hd3ss3220, bool on)
208
+
{
209
+
int ret;
210
+
211
+
if (regulator_is_enabled(hd3ss3220->vbus) == on)
212
+
return;
213
+
214
+
if (on)
215
+
ret = regulator_enable(hd3ss3220->vbus);
216
+
else
217
+
ret = regulator_disable(hd3ss3220->vbus);
218
+
219
+
if (ret)
220
+
dev_err(hd3ss3220->dev,
221
+
"vbus regulator %s failed: %d\n", on ? "disable" : "enable", ret);
222
+
}
223
+
207
224
static void hd3ss3220_set_role(struct hd3ss3220 *hd3ss3220)
208
225
{
209
226
enum usb_role role_state = hd3ss3220_get_attached_state(hd3ss3220);
···
237
220
default:
238
221
break;
239
222
}
223
+
224
+
if (hd3ss3220->vbus && !hd3ss3220->id_gpiod)
225
+
hd3ss3220_regulator_control(hd3ss3220, role_state == USB_ROLE_HOST);
240
226
241
227
hd3ss3220->role_state = role_state;
242
228
}
···
350
330
static irqreturn_t hd3ss3220_id_isr(int irq, void *dev_id)
351
331
{
352
332
struct hd3ss3220 *hd3ss3220 = dev_id;
353
-
int ret;
354
333
int id;
355
334
356
335
id = gpiod_get_value_cansleep(hd3ss3220->id_gpiod);
357
-
if (!id)
358
-
ret = regulator_enable(hd3ss3220->vbus);
359
-
else
360
-
ret = regulator_disable(hd3ss3220->vbus);
361
-
362
-
if (ret)
363
-
dev_err(hd3ss3220->dev,
364
-
"vbus regulator %s failed: %d\n", id ? "disable" : "enable", ret);
336
+
hd3ss3220_regulator_control(hd3ss3220, !id);
365
337
366
338
return IRQ_HANDLED;
367
339
}
+283
drivers/usb/typec/mode_selection.c
+283
drivers/usb/typec/mode_selection.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/*
3
+
* Copyright 2025 Google LLC.
4
+
*/
5
+
6
+
#include <linux/types.h>
7
+
#include <linux/list_sort.h>
8
+
#include <linux/slab.h>
9
+
#include <linux/mutex.h>
10
+
#include <linux/workqueue.h>
11
+
#include <linux/usb/typec_altmode.h>
12
+
13
+
#include "class.h"
14
+
15
+
/**
16
+
* struct mode_state - State tracking for a specific Type-C alternate mode
17
+
* @svid: Standard or Vendor ID of the Alternate Mode
18
+
* @priority: Mode priority
19
+
* @error: Outcome of the last attempt to enter the mode
20
+
* @list: List head to link this mode state into a prioritized list
21
+
*/
22
+
struct mode_state {
23
+
u16 svid;
24
+
u8 priority;
25
+
int error;
26
+
struct list_head list;
27
+
};
28
+
29
+
/**
30
+
* struct mode_selection - Manages the selection and state of Alternate Modes
31
+
* @mode_list: Prioritized list of available Alternate Modes
32
+
* @lock: Mutex to protect mode_list
33
+
* @work: Work structure
34
+
* @partner: Handle to the Type-C partner device
35
+
* @active_svid: svid of currently active mode
36
+
* @timeout: Timeout for a mode entry attempt, ms
37
+
* @delay: Delay between mode entry/exit attempts, ms
38
+
*/
39
+
struct mode_selection {
40
+
struct list_head mode_list;
41
+
/* Protects the mode_list*/
42
+
struct mutex lock;
43
+
struct delayed_work work;
44
+
struct typec_partner *partner;
45
+
u16 active_svid;
46
+
unsigned int timeout;
47
+
unsigned int delay;
48
+
};
49
+
50
+
/**
51
+
* struct mode_order - Mode activation tracking
52
+
* @svid: Standard or Vendor ID of the Alternate Mode
53
+
* @enter: Flag indicating if the driver is currently attempting to enter or
54
+
* exit the mode
55
+
* @result: Outcome of the attempt to activate the mode
56
+
*/
57
+
struct mode_order {
58
+
u16 svid;
59
+
int enter;
60
+
int result;
61
+
};
62
+
63
+
static int activate_altmode(struct device *dev, void *data)
64
+
{
65
+
if (is_typec_partner_altmode(dev)) {
66
+
struct typec_altmode *alt = to_typec_altmode(dev);
67
+
struct mode_order *order = (struct mode_order *)data;
68
+
69
+
if (order->svid == alt->svid) {
70
+
if (alt->ops && alt->ops->activate)
71
+
order->result = alt->ops->activate(alt, order->enter);
72
+
else
73
+
order->result = -EOPNOTSUPP;
74
+
return 1;
75
+
}
76
+
}
77
+
return 0;
78
+
}
79
+
80
+
static int mode_selection_activate(struct mode_selection *sel,
81
+
const u16 svid, const int enter)
82
+
83
+
__must_hold(&sel->lock)
84
+
{
85
+
struct mode_order order = {.svid = svid, .enter = enter, .result = -ENODEV};
86
+
87
+
/*
88
+
* The port driver may acquire its internal mutex during alternate mode
89
+
* activation. Since this is the same mutex that may be held during the
90
+
* execution of typec_altmode_state_update(), it is crucial to release
91
+
* sel->mutex before activation to avoid potential deadlock.
92
+
* Note that sel->mode_list must remain invariant throughout this unlocked
93
+
* interval.
94
+
*/
95
+
mutex_unlock(&sel->lock);
96
+
device_for_each_child(&sel->partner->dev, &order, activate_altmode);
97
+
mutex_lock(&sel->lock);
98
+
99
+
return order.result;
100
+
}
101
+
102
+
static void mode_list_clean(struct mode_selection *sel)
103
+
{
104
+
struct mode_state *ms, *tmp;
105
+
106
+
list_for_each_entry_safe(ms, tmp, &sel->mode_list, list) {
107
+
list_del(&ms->list);
108
+
kfree(ms);
109
+
}
110
+
}
111
+
112
+
/**
113
+
* mode_selection_work_fn() - Alternate mode activation task
114
+
* @work: work structure
115
+
*
116
+
* - If the Alternate Mode currently prioritized at the top of the list is already
117
+
* active, the entire selection process is considered finished.
118
+
* - If a different Alternate Mode is currently active, the system must exit that
119
+
* active mode first before attempting any new entry.
120
+
*
121
+
* The function then checks the result of the attempt to entre the current mode,
122
+
* stored in the `ms->error` field:
123
+
* - if the attempt FAILED, the mode is deactivated and removed from the list.
124
+
* - `ms->error` value of 0 signifies that the mode has not yet been activated.
125
+
*
126
+
* Once successfully activated, the task is scheduled for subsequent entry after
127
+
* a timeout period. The alternate mode driver is expected to call back with the
128
+
* actual mode entry result via `typec_altmode_state_update()`.
129
+
*/
130
+
static void mode_selection_work_fn(struct work_struct *work)
131
+
{
132
+
struct mode_selection *sel = container_of(work,
133
+
struct mode_selection, work.work);
134
+
struct mode_state *ms;
135
+
unsigned int delay = sel->delay;
136
+
int result;
137
+
138
+
guard(mutex)(&sel->lock);
139
+
140
+
ms = list_first_entry_or_null(&sel->mode_list, struct mode_state, list);
141
+
if (!ms)
142
+
return;
143
+
144
+
if (sel->active_svid == ms->svid) {
145
+
dev_dbg(&sel->partner->dev, "%x altmode is active\n", ms->svid);
146
+
mode_list_clean(sel);
147
+
} else if (sel->active_svid != 0) {
148
+
result = mode_selection_activate(sel, sel->active_svid, 0);
149
+
if (result)
150
+
mode_list_clean(sel);
151
+
else
152
+
sel->active_svid = 0;
153
+
} else if (ms->error) {
154
+
dev_err(&sel->partner->dev, "%x: entry error %pe\n",
155
+
ms->svid, ERR_PTR(ms->error));
156
+
mode_selection_activate(sel, ms->svid, 0);
157
+
list_del(&ms->list);
158
+
kfree(ms);
159
+
} else {
160
+
result = mode_selection_activate(sel, ms->svid, 1);
161
+
if (result) {
162
+
dev_err(&sel->partner->dev, "%x: activation error %pe\n",
163
+
ms->svid, ERR_PTR(result));
164
+
list_del(&ms->list);
165
+
kfree(ms);
166
+
} else {
167
+
delay = sel->timeout;
168
+
ms->error = -ETIMEDOUT;
169
+
}
170
+
}
171
+
172
+
if (!list_empty(&sel->mode_list))
173
+
schedule_delayed_work(&sel->work, msecs_to_jiffies(delay));
174
+
}
175
+
176
+
void typec_altmode_state_update(struct typec_partner *partner, const u16 svid,
177
+
const int error)
178
+
{
179
+
struct mode_selection *sel = partner->sel;
180
+
struct mode_state *ms;
181
+
182
+
if (sel) {
183
+
mutex_lock(&sel->lock);
184
+
ms = list_first_entry_or_null(&sel->mode_list, struct mode_state, list);
185
+
if (ms && ms->svid == svid) {
186
+
ms->error = error;
187
+
if (cancel_delayed_work(&sel->work))
188
+
schedule_delayed_work(&sel->work, 0);
189
+
}
190
+
if (!error)
191
+
sel->active_svid = svid;
192
+
else
193
+
sel->active_svid = 0;
194
+
mutex_unlock(&sel->lock);
195
+
}
196
+
}
197
+
EXPORT_SYMBOL_GPL(typec_altmode_state_update);
198
+
199
+
static int compare_priorities(void *priv,
200
+
const struct list_head *a, const struct list_head *b)
201
+
{
202
+
const struct mode_state *msa = container_of(a, struct mode_state, list);
203
+
const struct mode_state *msb = container_of(b, struct mode_state, list);
204
+
205
+
if (msa->priority < msb->priority)
206
+
return -1;
207
+
return 1;
208
+
}
209
+
210
+
static int altmode_add_to_list(struct device *dev, void *data)
211
+
{
212
+
if (is_typec_partner_altmode(dev)) {
213
+
struct list_head *list = (struct list_head *)data;
214
+
struct typec_altmode *altmode = to_typec_altmode(dev);
215
+
const struct typec_altmode *pdev = typec_altmode_get_partner(altmode);
216
+
struct mode_state *ms;
217
+
218
+
if (pdev && altmode->ops && altmode->ops->activate) {
219
+
ms = kzalloc(sizeof(*ms), GFP_KERNEL);
220
+
if (!ms)
221
+
return -ENOMEM;
222
+
ms->svid = pdev->svid;
223
+
ms->priority = pdev->priority;
224
+
INIT_LIST_HEAD(&ms->list);
225
+
list_add_tail(&ms->list, list);
226
+
}
227
+
}
228
+
return 0;
229
+
}
230
+
231
+
int typec_mode_selection_start(struct typec_partner *partner,
232
+
const unsigned int delay, const unsigned int timeout)
233
+
{
234
+
struct mode_selection *sel;
235
+
int ret;
236
+
237
+
if (partner->usb_mode == USB_MODE_USB4)
238
+
return -EBUSY;
239
+
240
+
if (partner->sel)
241
+
return -EALREADY;
242
+
243
+
sel = kzalloc(sizeof(*sel), GFP_KERNEL);
244
+
if (!sel)
245
+
return -ENOMEM;
246
+
247
+
INIT_LIST_HEAD(&sel->mode_list);
248
+
249
+
ret = device_for_each_child(&partner->dev, &sel->mode_list,
250
+
altmode_add_to_list);
251
+
252
+
if (ret || list_empty(&sel->mode_list)) {
253
+
mode_list_clean(sel);
254
+
kfree(sel);
255
+
return ret;
256
+
}
257
+
258
+
list_sort(NULL, &sel->mode_list, compare_priorities);
259
+
sel->partner = partner;
260
+
sel->delay = delay;
261
+
sel->timeout = timeout;
262
+
mutex_init(&sel->lock);
263
+
INIT_DELAYED_WORK(&sel->work, mode_selection_work_fn);
264
+
schedule_delayed_work(&sel->work, msecs_to_jiffies(delay));
265
+
partner->sel = sel;
266
+
267
+
return 0;
268
+
}
269
+
EXPORT_SYMBOL_GPL(typec_mode_selection_start);
270
+
271
+
void typec_mode_selection_delete(struct typec_partner *partner)
272
+
{
273
+
struct mode_selection *sel = partner->sel;
274
+
275
+
if (sel) {
276
+
partner->sel = NULL;
277
+
cancel_delayed_work_sync(&sel->work);
278
+
mode_list_clean(sel);
279
+
mutex_destroy(&sel->lock);
280
+
kfree(sel);
281
+
}
282
+
}
283
+
EXPORT_SYMBOL_GPL(typec_mode_selection_delete);
+1
-1
drivers/usb/typec/tcpm/tcpm.c
+1
-1
drivers/usb/typec/tcpm/tcpm.c
···
1808
1808
/*
1809
1809
* PD3.0 Spec 6.4.4.3.2: The SVIDs are returned 2 per VDO (see Table
1810
1810
* 6-43), and can be returned maximum 6 VDOs per response (see Figure
1811
-
* 6-19). If the Respondersupports 12 or more SVID then the Discover
1811
+
* 6-19). If the Responder supports 12 or more SVID then the Discover
1812
1812
* SVIDs Command Shall be executed multiple times until a Discover
1813
1813
* SVIDs VDO is returned ending either with a SVID value of 0x0000 in
1814
1814
* the last part of the last VDO or with a VDO containing two SVIDs
-1
drivers/usb/typec/ucsi/Kconfig
-1
drivers/usb/typec/ucsi/Kconfig
+4
drivers/usb/typec/ucsi/Makefile
+4
drivers/usb/typec/ucsi/Makefile
+22
drivers/usb/typec/ucsi/cros_ec_ucsi.c
+22
drivers/usb/typec/ucsi/cros_ec_ucsi.c
···
16
16
#include <linux/platform_device.h>
17
17
#include <linux/slab.h>
18
18
#include <linux/wait.h>
19
+
#include <linux/usb/typec_altmode.h>
19
20
20
21
#include "ucsi.h"
21
22
···
33
32
34
33
/* Number of times to attempt recovery from a write timeout before giving up. */
35
34
#define WRITE_TMO_CTR_MAX 5
35
+
36
+
/* Delay between mode entry/exit attempts, ms */
37
+
static const unsigned int mode_selection_delay = 1000;
38
+
/* Timeout for a mode entry attempt, ms */
39
+
static const unsigned int mode_selection_timeout = 4000;
36
40
37
41
struct cros_ucsi_data {
38
42
struct device *dev;
···
140
134
return ret;
141
135
}
142
136
137
+
static void cros_ucsi_add_partner_altmodes(struct ucsi_connector *con)
138
+
{
139
+
if (!con->typec_cap.no_mode_control)
140
+
typec_mode_selection_start(con->partner,
141
+
mode_selection_delay,
142
+
mode_selection_timeout);
143
+
}
144
+
145
+
static void cros_ucsi_remove_partner_altmodes(struct ucsi_connector *con)
146
+
{
147
+
if (!con->typec_cap.no_mode_control)
148
+
typec_mode_selection_delete(con->partner);
149
+
}
150
+
143
151
static const struct ucsi_operations cros_ucsi_ops = {
144
152
.read_version = cros_ucsi_read_version,
145
153
.read_cci = cros_ucsi_read_cci,
···
161
141
.read_message_in = cros_ucsi_read_message_in,
162
142
.async_control = cros_ucsi_async_control,
163
143
.sync_control = cros_ucsi_sync_control,
144
+
.add_partner_altmodes = cros_ucsi_add_partner_altmodes,
145
+
.remove_partner_altmodes = cros_ucsi_remove_partner_altmodes,
164
146
};
165
147
166
148
static void cros_ucsi_work(struct work_struct *work)
+41
-13
drivers/usb/typec/ucsi/psy.c
+41
-13
drivers/usb/typec/ucsi/psy.c
···
112
112
union power_supply_propval *val)
113
113
{
114
114
u32 pdo;
115
+
int max_voltage = 0;
115
116
116
117
switch (UCSI_CONSTAT(con, PWR_OPMODE)) {
117
118
case UCSI_CONSTAT_PWR_OPMODE_PD:
118
-
if (con->num_pdos > 0) {
119
-
pdo = con->src_pdos[con->num_pdos - 1];
120
-
val->intval = pdo_fixed_voltage(pdo) * 1000;
121
-
} else {
122
-
val->intval = 0;
119
+
for (int i = 0; i < con->num_pdos; i++) {
120
+
int pdo_voltage = 0;
121
+
122
+
pdo = con->src_pdos[i];
123
+
if (pdo_type(pdo) == PDO_TYPE_FIXED)
124
+
pdo_voltage = pdo_fixed_voltage(pdo) * 1000;
125
+
max_voltage = (pdo_voltage > max_voltage) ? pdo_voltage
126
+
: max_voltage;
123
127
}
128
+
val->intval = max_voltage;
124
129
break;
125
130
case UCSI_CONSTAT_PWR_OPMODE_TYPEC3_0:
126
131
case UCSI_CONSTAT_PWR_OPMODE_TYPEC1_5:
···
173
168
union power_supply_propval *val)
174
169
{
175
170
u32 pdo;
171
+
int max_current = 0;
176
172
177
173
if (!UCSI_CONSTAT(con, CONNECTED)) {
178
174
val->intval = 0;
···
182
176
183
177
switch (UCSI_CONSTAT(con, PWR_OPMODE)) {
184
178
case UCSI_CONSTAT_PWR_OPMODE_PD:
185
-
if (con->num_pdos > 0) {
186
-
pdo = con->src_pdos[con->num_pdos - 1];
187
-
val->intval = pdo_max_current(pdo) * 1000;
188
-
} else {
189
-
val->intval = 0;
179
+
for (int i = 0; i < con->num_pdos; i++) {
180
+
int pdo_current = 0;
181
+
182
+
pdo = con->src_pdos[i];
183
+
if (pdo_type(pdo) == PDO_TYPE_FIXED)
184
+
pdo_current = pdo_max_current(pdo) * 1000;
185
+
max_current = (pdo_current > max_current) ? pdo_current
186
+
: max_current;
190
187
}
188
+
val->intval = max_current;
191
189
break;
192
190
case UCSI_CONSTAT_PWR_OPMODE_TYPEC1_5:
193
191
val->intval = UCSI_TYPEC_1_5_CURRENT * 1000;
···
212
202
static int ucsi_psy_get_current_now(struct ucsi_connector *con,
213
203
union power_supply_propval *val)
214
204
{
215
-
if (UCSI_CONSTAT(con, PWR_OPMODE) == UCSI_CONSTAT_PWR_OPMODE_PD)
216
-
val->intval = rdo_op_current(con->rdo) * 1000;
217
-
else
205
+
if (!UCSI_CONSTAT(con, CONNECTED)) {
218
206
val->intval = 0;
207
+
return 0;
208
+
}
209
+
210
+
switch (UCSI_CONSTAT(con, PWR_OPMODE)) {
211
+
case UCSI_CONSTAT_PWR_OPMODE_PD:
212
+
val->intval = rdo_op_current(con->rdo) * 1000;
213
+
break;
214
+
case UCSI_CONSTAT_PWR_OPMODE_TYPEC1_5:
215
+
val->intval = UCSI_TYPEC_1_5_CURRENT * 1000;
216
+
break;
217
+
case UCSI_CONSTAT_PWR_OPMODE_TYPEC3_0:
218
+
val->intval = UCSI_TYPEC_3_0_CURRENT * 1000;
219
+
break;
220
+
case UCSI_CONSTAT_PWR_OPMODE_BC:
221
+
case UCSI_CONSTAT_PWR_OPMODE_DEFAULT:
222
+
/* UCSI can't tell b/w DCP/CDP or USB2/3x1/3x2 SDP chargers */
223
+
default:
224
+
val->intval = UCSI_TYPEC_DEFAULT_CURRENT * 1000;
225
+
break;
226
+
}
219
227
return 0;
220
228
}
221
229
+212
drivers/usb/typec/ucsi/thunderbolt.c
+212
drivers/usb/typec/ucsi/thunderbolt.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* UCSI Thunderbolt Alternate Mode Support
4
+
*
5
+
* Copyright 2026 Google LLC
6
+
*/
7
+
8
+
#include <linux/usb/typec_tbt.h>
9
+
#include <linux/usb/pd_vdo.h>
10
+
#include <linux/err.h>
11
+
#include <linux/dev_printk.h>
12
+
#include <linux/device/devres.h>
13
+
#include <linux/gfp_types.h>
14
+
#include <linux/types.h>
15
+
#include <linux/usb/typec_altmode.h>
16
+
#include <linux/workqueue.h>
17
+
18
+
#include "ucsi.h"
19
+
20
+
/**
21
+
* struct ucsi_tbt - Thunderbolt Alternate Mode private data structure
22
+
* @con: Pointer to UCSI connector structure
23
+
* @alt: Pointer to typec altmode structure
24
+
* @work: Work structure
25
+
* @cam: An offset into the list of alternate modes supported by the PPM
26
+
* @header: VDO header
27
+
*/
28
+
struct ucsi_tbt {
29
+
struct ucsi_connector *con;
30
+
struct typec_altmode *alt;
31
+
struct work_struct work;
32
+
int cam;
33
+
u32 header;
34
+
};
35
+
36
+
static void ucsi_thunderbolt_work(struct work_struct *work)
37
+
{
38
+
struct ucsi_tbt *tbt = container_of(work, struct ucsi_tbt, work);
39
+
40
+
if (typec_altmode_vdm(tbt->alt, tbt->header, NULL, 0))
41
+
dev_err(&tbt->alt->dev, "VDM 0x%x failed\n", tbt->header);
42
+
43
+
tbt->header = 0;
44
+
}
45
+
46
+
static int ucsi_thunderbolt_set_altmode(struct ucsi_tbt *tbt,
47
+
bool enter, u32 vdo)
48
+
{
49
+
int svdm_version;
50
+
int cmd;
51
+
int ret;
52
+
u64 command = UCSI_SET_NEW_CAM |
53
+
UCSI_CONNECTOR_NUMBER(tbt->con->num) |
54
+
UCSI_SET_NEW_CAM_SET_AM(tbt->cam) |
55
+
((u64)vdo << 32);
56
+
57
+
if (enter)
58
+
command |= (1 << 23);
59
+
60
+
ret = ucsi_send_command(tbt->con->ucsi, command, NULL, 0);
61
+
if (ret < 0)
62
+
return ret;
63
+
64
+
svdm_version = typec_altmode_get_svdm_version(tbt->alt);
65
+
if (svdm_version < 0)
66
+
return svdm_version;
67
+
68
+
if (enter)
69
+
cmd = CMD_ENTER_MODE;
70
+
else
71
+
cmd = CMD_EXIT_MODE;
72
+
tbt->header = VDO(USB_TYPEC_TBT_SID, 1, svdm_version, cmd);
73
+
tbt->header |= VDO_OPOS(TYPEC_TBT_MODE);
74
+
tbt->header |= VDO_CMDT(CMDT_RSP_ACK);
75
+
76
+
schedule_work(&tbt->work);
77
+
78
+
return 0;
79
+
}
80
+
81
+
static int ucsi_thunderbolt_enter(struct typec_altmode *alt, u32 *vdo)
82
+
{
83
+
struct ucsi_tbt *tbt = typec_altmode_get_drvdata(alt);
84
+
struct ucsi_connector *con = tbt->con;
85
+
u64 command;
86
+
u8 cur = 0;
87
+
int ret;
88
+
89
+
if (!ucsi_con_mutex_lock(con))
90
+
return -ENOTCONN;
91
+
92
+
command = UCSI_GET_CURRENT_CAM | UCSI_CONNECTOR_NUMBER(con->num);
93
+
ret = ucsi_send_command(con->ucsi, command, &cur, sizeof(cur));
94
+
if (ret < 0) {
95
+
if (con->ucsi->version > 0x0100)
96
+
goto err_unlock;
97
+
cur = 0xff;
98
+
}
99
+
100
+
if (cur != 0xff) {
101
+
if (cur >= UCSI_MAX_ALTMODES || con->port_altmode[cur] != alt)
102
+
ret = -EBUSY;
103
+
else
104
+
ret = 0;
105
+
goto err_unlock;
106
+
}
107
+
108
+
ret = ucsi_thunderbolt_set_altmode(tbt, true, *vdo);
109
+
ucsi_altmode_update_active(tbt->con);
110
+
111
+
err_unlock:
112
+
ucsi_con_mutex_unlock(con);
113
+
114
+
return ret;
115
+
}
116
+
117
+
static int ucsi_thunderbolt_exit(struct typec_altmode *alt)
118
+
{
119
+
struct ucsi_tbt *tbt = typec_altmode_get_drvdata(alt);
120
+
int ret;
121
+
122
+
if (!ucsi_con_mutex_lock(tbt->con))
123
+
return -ENOTCONN;
124
+
125
+
ret = ucsi_thunderbolt_set_altmode(tbt, false, 0);
126
+
127
+
ucsi_con_mutex_unlock(tbt->con);
128
+
129
+
return ret;
130
+
}
131
+
132
+
static int ucsi_thunderbolt_vdm(struct typec_altmode *alt,
133
+
u32 header, const u32 *data, int count)
134
+
{
135
+
struct ucsi_tbt *tbt = typec_altmode_get_drvdata(alt);
136
+
int cmd_type = PD_VDO_CMDT(header);
137
+
int cmd = PD_VDO_CMD(header);
138
+
int svdm_version;
139
+
140
+
if (!ucsi_con_mutex_lock(tbt->con))
141
+
return -ENOTCONN;
142
+
143
+
svdm_version = typec_altmode_get_svdm_version(alt);
144
+
if (svdm_version < 0) {
145
+
ucsi_con_mutex_unlock(tbt->con);
146
+
return svdm_version;
147
+
}
148
+
149
+
switch (cmd_type) {
150
+
case CMDT_INIT:
151
+
if (PD_VDO_SVDM_VER(header) < svdm_version) {
152
+
svdm_version = PD_VDO_SVDM_VER(header);
153
+
typec_partner_set_svdm_version(tbt->con->partner, svdm_version);
154
+
}
155
+
tbt->header = VDO(USB_TYPEC_TBT_SID, 1, svdm_version, cmd);
156
+
tbt->header |= VDO_OPOS(TYPEC_TBT_MODE);
157
+
tbt->header |= VDO_CMDT(CMDT_RSP_ACK);
158
+
159
+
schedule_work(&tbt->work);
160
+
break;
161
+
default:
162
+
break;
163
+
}
164
+
165
+
ucsi_con_mutex_unlock(tbt->con);
166
+
167
+
return 0;
168
+
}
169
+
170
+
static const struct typec_altmode_ops ucsi_thunderbolt_ops = {
171
+
.enter = ucsi_thunderbolt_enter,
172
+
.exit = ucsi_thunderbolt_exit,
173
+
.vdm = ucsi_thunderbolt_vdm,
174
+
};
175
+
176
+
struct typec_altmode *ucsi_register_thunderbolt(struct ucsi_connector *con,
177
+
bool override, int offset,
178
+
struct typec_altmode_desc *desc)
179
+
{
180
+
struct typec_altmode *alt;
181
+
struct ucsi_tbt *tbt;
182
+
183
+
alt = typec_port_register_altmode(con->port, desc);
184
+
if (IS_ERR(alt) || !override)
185
+
return alt;
186
+
187
+
tbt = devm_kzalloc(&alt->dev, sizeof(*tbt), GFP_KERNEL);
188
+
if (!tbt) {
189
+
typec_unregister_altmode(alt);
190
+
return ERR_PTR(-ENOMEM);
191
+
}
192
+
193
+
tbt->cam = offset;
194
+
tbt->con = con;
195
+
tbt->alt = alt;
196
+
INIT_WORK(&tbt->work, ucsi_thunderbolt_work);
197
+
typec_altmode_set_drvdata(alt, tbt);
198
+
typec_altmode_set_ops(alt, &ucsi_thunderbolt_ops);
199
+
200
+
return alt;
201
+
}
202
+
203
+
void ucsi_thunderbolt_remove_partner(struct typec_altmode *alt)
204
+
{
205
+
struct ucsi_tbt *tbt;
206
+
207
+
if (alt) {
208
+
tbt = typec_altmode_get_drvdata(alt);
209
+
if (tbt)
210
+
cancel_work_sync(&tbt->work);
211
+
}
212
+
}
+25
-5
drivers/usb/typec/ucsi/ucsi.c
+25
-5
drivers/usb/typec/ucsi/ucsi.c
···
13
13
#include <linux/delay.h>
14
14
#include <linux/slab.h>
15
15
#include <linux/usb/typec_dp.h>
16
+
#include <linux/usb/typec_tbt.h>
16
17
17
18
#include "ucsi.h"
18
19
#include "trace.h"
···
315
314
{
316
315
const struct typec_altmode *altmode = NULL;
317
316
u64 command;
317
+
u16 svid = 0;
318
318
int ret;
319
319
u8 cur;
320
320
int i;
···
337
335
for (i = 0; con->partner_altmode[i]; i++)
338
336
typec_altmode_update_active(con->partner_altmode[i],
339
337
con->partner_altmode[i] == altmode);
338
+
339
+
if (altmode)
340
+
svid = altmode->svid;
341
+
typec_altmode_state_update(con->partner, svid, 0);
340
342
}
341
343
342
344
static int ucsi_altmode_next_mode(struct typec_altmode **alt, u16 svid)
···
417
411
else
418
412
alt = ucsi_register_displayport(con, override,
419
413
i, desc);
414
+
break;
415
+
case USB_TYPEC_TBT_SID:
416
+
alt = ucsi_register_thunderbolt(con, override, i, desc);
420
417
break;
421
418
default:
422
419
alt = typec_port_register_altmode(con->port, desc);
···
618
609
desc.vdo = alt[j].mid;
619
610
desc.svid = alt[j].svid;
620
611
desc.roles = TYPEC_PORT_DRD;
612
+
desc.mode_selection = con->ucsi->ops->add_partner_altmodes &&
613
+
!con->typec_cap.no_mode_control;
621
614
622
615
ret = ucsi_register_altmode(con, &desc, recipient);
623
616
if (ret)
···
651
640
}
652
641
653
642
while (adev[i]) {
654
-
if (recipient == UCSI_RECIPIENT_SOP &&
655
-
(adev[i]->svid == USB_TYPEC_DP_SID ||
656
-
(adev[i]->svid == USB_TYPEC_NVIDIA_VLINK_SID &&
657
-
adev[i]->vdo != USB_TYPEC_NVIDIA_VLINK_DBG_VDO))) {
643
+
if (recipient == UCSI_RECIPIENT_SOP) {
658
644
pdev = typec_altmode_get_partner(adev[i]);
659
-
ucsi_displayport_remove_partner((void *)pdev);
645
+
646
+
if (adev[i]->svid == USB_TYPEC_DP_SID ||
647
+
(adev[i]->svid == USB_TYPEC_NVIDIA_VLINK_SID &&
648
+
adev[i]->vdo != USB_TYPEC_NVIDIA_VLINK_DBG_VDO))
649
+
ucsi_displayport_remove_partner((void *)pdev);
650
+
else if (adev[i]->svid == USB_TYPEC_TBT_SID)
651
+
ucsi_thunderbolt_remove_partner((void *)pdev);
660
652
}
661
653
typec_unregister_altmode(adev[i]);
662
654
adev[i++] = NULL;
···
845
831
if (con->partner_altmode[0]) {
846
832
num_partner_am = ucsi_get_num_altmode(con->partner_altmode);
847
833
typec_partner_set_num_altmodes(con->partner, num_partner_am);
834
+
if (con->ucsi->ops->add_partner_altmodes)
835
+
con->ucsi->ops->add_partner_altmodes(con);
848
836
ucsi_altmode_update_active(con);
849
837
return 0;
850
838
} else {
···
1135
1119
return;
1136
1120
1137
1121
typec_set_mode(con->port, TYPEC_STATE_SAFE);
1122
+
if (con->ucsi->ops->remove_partner_altmodes)
1123
+
con->ucsi->ops->remove_partner_altmodes(con);
1138
1124
1139
1125
typec_partner_set_usb_power_delivery(con->partner, NULL);
1140
1126
ucsi_unregister_partner_pdos(con);
···
1325
1307
1326
1308
if (con->partner && (change & UCSI_CONSTAT_PARTNER_CHANGE)) {
1327
1309
ucsi_partner_change(con);
1310
+
ucsi_altmode_update_active(con);
1328
1311
1329
1312
/* Complete pending data role swap */
1330
1313
if (!completion_done(&con->complete))
···
1678
1659
1679
1660
cap->driver_data = con;
1680
1661
cap->ops = &ucsi_ops;
1662
+
cap->no_mode_control = !(con->ucsi->cap.features & UCSI_CAP_ALT_MODE_OVERRIDE);
1681
1663
1682
1664
if (ucsi->version >= UCSI_VERSION_2_0)
1683
1665
con->typec_cap.orientation_aware = true;
+24
drivers/usb/typec/ucsi/ucsi.h
+24
drivers/usb/typec/ucsi/ucsi.h
···
70
70
* @update_altmodes: Squashes duplicate DP altmodes
71
71
* @update_connector: Update connector capabilities before registering
72
72
* @connector_status: Updates connector status, called holding connector lock
73
+
* @add_partner_altmodes: Start mode selection
74
+
* @remove_partner_altmodes: Clean mode selection
73
75
*
74
76
* Read and write routines for UCSI interface. @sync_write must wait for the
75
77
* Command Completion Event from the PPM before returning, and @async_write must
···
90
88
struct ucsi_altmode *updated);
91
89
void (*update_connector)(struct ucsi_connector *con);
92
90
void (*connector_status)(struct ucsi_connector *con);
91
+
void (*add_partner_altmodes)(struct ucsi_connector *con);
92
+
void (*remove_partner_altmodes)(struct ucsi_connector *con);
93
93
};
94
94
95
95
struct ucsi *ucsi_create(struct device *dev, const struct ucsi_operations *ops);
···
599
595
static inline void
600
596
ucsi_displayport_remove_partner(struct typec_altmode *adev) { }
601
597
#endif /* CONFIG_TYPEC_DP_ALTMODE */
598
+
599
+
#if IS_ENABLED(CONFIG_TYPEC_TBT_ALTMODE)
600
+
struct typec_altmode *
601
+
ucsi_register_thunderbolt(struct ucsi_connector *con,
602
+
bool override, int offset,
603
+
struct typec_altmode_desc *desc);
604
+
605
+
void ucsi_thunderbolt_remove_partner(struct typec_altmode *adev);
606
+
#else
607
+
static inline struct typec_altmode *
608
+
ucsi_register_thunderbolt(struct ucsi_connector *con,
609
+
bool override, int offset,
610
+
struct typec_altmode_desc *desc)
611
+
{
612
+
return typec_port_register_altmode(con->port, desc);
613
+
}
614
+
615
+
static inline void
616
+
ucsi_thunderbolt_remove_partner(struct typec_altmode *adev) { }
617
+
#endif /* CONFIG_TYPEC_TBT_ALTMODE */
602
618
603
619
#ifdef CONFIG_DEBUG_FS
604
620
void ucsi_debugfs_init(void);
+2
-2
drivers/usb/usbip/stub_tx.c
+2
-2
drivers/usb/usbip/stub_tx.c
···
55
55
"stopped by a call to usb_kill_urb() because of cleaning up a virtual connection\n");
56
56
return;
57
57
case -ECONNRESET:
58
-
dev_info(&urb->dev->dev,
59
-
"unlinked by a call to usb_unlink_urb()\n");
58
+
dev_dbg(&urb->dev->dev,
59
+
"unlinked by a call to usb_unlink_urb()\n");
60
60
break;
61
61
case -EPIPE:
62
62
dev_info(&urb->dev->dev, "endpoint %d is stalled\n",
+1
-2
include/linux/usb.h
+1
-2
include/linux/usb.h
···
1295
1295
* resume and suspend functions will be called in addition to the driver's
1296
1296
* own, so this part of the setup does not need to be replicated.
1297
1297
*
1298
-
* USB drivers must provide all the fields listed above except driver,
1299
-
* match, and id_table.
1298
+
* USB device drivers must provide a name, other driver fields are optional.
1300
1299
*/
1301
1300
struct usb_device_driver {
1302
1301
const char *name;
+2
-2
include/linux/usb/gadget_configfs.h
+2
-2
include/linux/usb/gadget_configfs.h
···
30
30
CONFIGFS_ATTR(struct_name##_, _name)
31
31
32
32
#define USB_CONFIG_STRING_RW_OPS(struct_in) \
33
-
static struct configfs_item_operations struct_in##_langid_item_ops = { \
33
+
static const struct configfs_item_operations struct_in##_langid_item_ops = { \
34
34
.release = struct_in##_attr_release, \
35
35
}; \
36
36
\
···
86
86
config_item_put(item); \
87
87
} \
88
88
\
89
-
static struct configfs_group_operations struct_in##_strings_ops = { \
89
+
static const struct configfs_group_operations struct_in##_strings_ops = { \
90
90
.make_group = &struct_in##_strings_make, \
91
91
.drop_item = &struct_in##_strings_drop, \
92
92
}; \
-6
include/linux/usb/hcd.h
-6
include/linux/usb/hcd.h
···
760
760
*/
761
761
extern struct rw_semaphore ehci_cf_port_reset_rwsem;
762
762
763
-
/* Keep track of which host controller drivers are loaded */
764
-
#define USB_UHCI_LOADED 0
765
-
#define USB_OHCI_LOADED 1
766
-
#define USB_EHCI_LOADED 2
767
-
extern unsigned long usb_hcds_loaded;
768
-
769
763
#endif /* __KERNEL__ */
770
764
771
765
#endif /* __USB_CORE_HCD_H */
-47
include/linux/usb/isp1362.h
-47
include/linux/usb/isp1362.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
2
-
/*
3
-
* board initialization code should put one of these into dev->platform_data
4
-
* and place the isp1362 onto platform_bus.
5
-
*/
6
-
7
-
#ifndef __LINUX_USB_ISP1362_H__
8
-
#define __LINUX_USB_ISP1362_H__
9
-
10
-
struct isp1362_platform_data {
11
-
/* Enable internal pulldown resistors on downstream ports */
12
-
unsigned sel15Kres:1;
13
-
/* Clock cannot be stopped */
14
-
unsigned clknotstop:1;
15
-
/* On-chip overcurrent protection */
16
-
unsigned oc_enable:1;
17
-
/* INT output polarity */
18
-
unsigned int_act_high:1;
19
-
/* INT edge or level triggered */
20
-
unsigned int_edge_triggered:1;
21
-
/* DREQ output polarity */
22
-
unsigned dreq_act_high:1;
23
-
/* DACK input polarity */
24
-
unsigned dack_act_high:1;
25
-
/* chip can be resumed via H_WAKEUP pin */
26
-
unsigned remote_wakeup_connected:1;
27
-
/* Switch or not to switch (keep always powered) */
28
-
unsigned no_power_switching:1;
29
-
/* Ganged port power switching (0) or individual port power switching (1) */
30
-
unsigned power_switching_mode:1;
31
-
/* Given port_power, msec/2 after power on till power good */
32
-
u8 potpg;
33
-
/* Hardware reset set/clear */
34
-
void (*reset) (struct device *dev, int set);
35
-
/* Clock start/stop */
36
-
void (*clock) (struct device *dev, int start);
37
-
/* Inter-io delay (ns). The chip is picky about access timings; it
38
-
* expects at least:
39
-
* 110ns delay between consecutive accesses to DATA_REG,
40
-
* 300ns delay between access to ADDR_REG and DATA_REG (registers)
41
-
* 462ns delay between access to ADDR_REG and DATA_REG (buffer memory)
42
-
* WE MUST NOT be activated during these intervals (even without CS!)
43
-
*/
44
-
void (*delay) (struct device *dev, unsigned int delay);
45
-
};
46
-
47
-
#endif
+10
-1
include/linux/usb/tegra_usb_phy.h
+10
-1
include/linux/usb/tegra_usb_phy.h
···
23
23
* requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
24
24
* and hsdiscon_level should be set for adequate signal quality
25
25
* requires_pmc_ao_power_up: true if USB AO is powered down by default
26
+
* uhsic_registers_offset: for Tegra30+ where HSIC registers were offset
27
+
* comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2
28
+
* uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver
29
+
* uhsic_pts_value: parallel transceiver select enumeration value
30
+
* portsc1_offset: register offset of PORTSC1
26
31
*/
27
32
28
33
struct tegra_phy_soc_config {
···
36
31
bool requires_usbmode_setup;
37
32
bool requires_extra_tuning_parameters;
38
33
bool requires_pmc_ao_power_up;
34
+
u32 uhsic_registers_offset;
35
+
u32 uhsic_tx_rtune;
36
+
u32 uhsic_pts_value;
37
+
u32 portsc1_offset;
39
38
};
40
39
41
40
struct tegra_utmip_config {
···
81
72
struct usb_phy *ulpi;
82
73
struct usb_phy u_phy;
83
74
bool is_legacy_phy;
84
-
bool is_ulpi_phy;
75
+
enum usb_phy_interface phy_type;
85
76
struct gpio_desc *reset_gpio;
86
77
struct reset_control *pad_rst;
87
78
bool wakeup_enabled;
+6
include/linux/usb/typec.h
+6
include/linux/usb/typec.h
···
20
20
struct typec_altmode_ops;
21
21
struct typec_cable_ops;
22
22
23
+
struct bus_type;
23
24
struct fwnode_handle;
24
25
struct device;
25
26
26
27
struct usb_power_delivery;
27
28
struct usb_power_delivery_desc;
29
+
30
+
extern const struct bus_type typec_bus;
28
31
29
32
enum typec_port_type {
30
33
TYPEC_PORT_SRC,
···
155
152
/* Only used with ports */
156
153
enum typec_port_data roles;
157
154
bool inactive;
155
+
bool mode_selection;
158
156
};
159
157
160
158
void typec_partner_set_pd_revision(struct typec_partner *partner, u16 pd_revision);
···
291
287
* @prefer_role: Initial role preference (DRP ports).
292
288
* @accessory: Supported Accessory Modes
293
289
* @usb_capability: Supported USB Modes
290
+
* @no_mode_control: Ability to manage Alternate Modes
294
291
* @fwnode: Optional fwnode of the port
295
292
* @driver_data: Private pointer for driver specific info
296
293
* @pd: Optional USB Power Delivery Support
···
309
304
enum typec_accessory accessory[TYPEC_MAX_ACCESSORY];
310
305
unsigned int orientation_aware:1;
311
306
u8 usb_capability;
307
+
bool no_mode_control;
312
308
313
309
struct fwnode_handle *fwnode;
314
310
void *driver_data;
+50
include/linux/usb/typec_altmode.h
+50
include/linux/usb/typec_altmode.h
···
9
9
10
10
#define MODE_DISCOVERY_MAX 6
11
11
12
+
extern const struct device_type typec_port_altmode_dev_type;
13
+
extern const struct device_type typec_plug_altmode_dev_type;
14
+
extern const struct device_type typec_partner_altmode_dev_type;
15
+
16
+
#define is_typec_port_altmode(dev) ((dev)->type == &typec_port_altmode_dev_type)
17
+
#define is_typec_plug_altmode(dev) ((dev)->type == &typec_plug_altmode_dev_type)
18
+
#define is_typec_partner_altmode(dev) ((dev)->type == &typec_partner_altmode_dev_type)
19
+
12
20
struct typec_altmode_ops;
13
21
14
22
/**
···
36
28
int mode;
37
29
u32 vdo;
38
30
unsigned int active:1;
31
+
u8 priority;
32
+
bool mode_selection;
39
33
40
34
char *desc;
41
35
const struct typec_altmode_ops *ops;
···
240
230
#define module_typec_altmode_driver(__typec_altmode_driver) \
241
231
module_driver(__typec_altmode_driver, typec_altmode_register_driver, \
242
232
typec_altmode_unregister_driver)
233
+
234
+
/**
235
+
* typec_mode_selection_start - Start an alternate mode selection process
236
+
* @partner: Handle to the Type-C partner device
237
+
* @delay: Delay between mode entry/exit attempts, ms
238
+
* @timeout: Timeout for a mode entry attempt, ms
239
+
*
240
+
* This function initiates the process of attempting to enter an Alternate Mode
241
+
* supported by the connected Type-C partner.
242
+
* Returns 0 on success, or a negative error code on failure.
243
+
*/
244
+
int typec_mode_selection_start(struct typec_partner *partner,
245
+
const unsigned int delay, const unsigned int timeout);
246
+
247
+
/**
248
+
* typec_altmode_state_update - Report the current status of an Alternate Mode
249
+
* negotiation
250
+
* @partner: Handle to the Type-C partner device
251
+
* @svid: Standard or Vendor ID of the Alternate Mode. A value of 0 should be
252
+
* passed if no mode is currently active
253
+
* @result: Result of the entry operation. This should be 0 on success, or a
254
+
* negative error code if the negotiation failed
255
+
*
256
+
* This function should be called by an Alternate Mode driver to report the
257
+
* result of an asynchronous alternate mode entry request. It signals what the
258
+
* current active SVID is (or 0 if none) and the success or failure status of
259
+
* the last attempt.
260
+
*/
261
+
void typec_altmode_state_update(struct typec_partner *partner, const u16 svid,
262
+
const int result);
263
+
264
+
/**
265
+
* typec_mode_selection_delete - Delete an alternate mode selection instance
266
+
* @partner: Handle to the Type-C partner device.
267
+
*
268
+
* This function cancels a pending alternate mode selection request that was
269
+
* previously started with typec_mode_selection_start().
270
+
* This is typically called when the partner disconnects.
271
+
*/
272
+
void typec_mode_selection_delete(struct typec_partner *partner);
243
273
244
274
#endif /* __USB_TYPEC_ALTMODE_H */
+2
-1
rust/helpers/usb.c
+2
-1
rust/helpers/usb.c
+15
-6
rust/kernel/usb.rs
+15
-6
rust/kernel/usb.rs
···
6
6
//! C header: [`include/linux/usb.h`](srctree/include/linux/usb.h)
7
7
8
8
use crate::{
9
-
bindings, device,
10
-
device_id::{RawDeviceId, RawDeviceIdIndex},
9
+
bindings,
10
+
device,
11
+
device_id::{
12
+
RawDeviceId,
13
+
RawDeviceIdIndex, //
14
+
},
11
15
driver,
12
-
error::{from_result, to_result, Result},
16
+
error::{
17
+
from_result,
18
+
to_result, //
19
+
},
13
20
prelude::*,
14
-
str::CStr,
15
-
types::{AlwaysRefCounted, Opaque},
16
-
ThisModule,
21
+
types::{
22
+
AlwaysRefCounted,
23
+
Opaque, //
24
+
},
25
+
ThisModule, //
17
26
};
18
27
use core::{
19
28
marker::PhantomData,
+9
-1
samples/rust/rust_driver_usb.rs
+9
-1
samples/rust/rust_driver_usb.rs
···
3
3
4
4
//! Rust USB driver sample.
5
5
6
-
use kernel::{device, device::Core, prelude::*, sync::aref::ARef, usb};
6
+
use kernel::{
7
+
device::{
8
+
self,
9
+
Core, //
10
+
},
11
+
prelude::*,
12
+
sync::aref::ARef,
13
+
usb, //
14
+
};
7
15
8
16
struct SampleDriver {
9
17
_intf: ARef<usb::Interface>,
-2
tools/usb/usbip/README
-2
tools/usb/usbip/README
···
241
241
242
242
243
243
[Checklist]
244
-
- See 'Debug Tips' on the project wiki.
245
-
- http://usbip.wiki.sourceforge.net/how-to-debug-usbip
246
244
- usbip-host.ko must be bound to the target device.
247
245
- See /sys/kernel/debug/usb/devices and find "Driver=..." lines of the device.
248
246
- Target USB gadget must be bound to vudc