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clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX

The parent at this index is the secondary mux, which can connect
not only to primary PLL/2 but also to XO. Rename the index to SMUX_INDEX
to better reflect the parent.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220621160621.24415-2-y.oudjana@protonmail.com

authored by

Yassine Oudjana and committed by
Bjorn Andersson 1ba0a3bb 94a70c87

+2 -2
+2 -2
drivers/clk/qcom/clk-cpu-8996.c
··· 61 61 #include "clk-regmap.h" 62 62 63 63 enum _pmux_input { 64 - DIV_2_INDEX = 0, 64 + SMUX_INDEX = 0, 65 65 PLL_INDEX, 66 66 ACD_INDEX, 67 67 ALT_INDEX, ··· 468 468 case POST_RATE_CHANGE: 469 469 if (cnd->new_rate < DIV_2_THRESHOLD) 470 470 ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, 471 - DIV_2_INDEX); 471 + SMUX_INDEX); 472 472 else 473 473 ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, 474 474 ACD_INDEX);