Merge tag 'coresight-next-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next

+1

.mailmap

··· 576 576 Michel Lespinasse <michel@lespinasse.org> <walken@zoy.org> 577 577 Mickaël Salaün <mic@digikod.net> <mic@linux.microsoft.com> 578 578 Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com> 579 + Mike Leach <mike.leach@arm.com> <mike.leach@linaro.org> 579 580 Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il> 580 581 Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com> 581 582 Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>

+10

Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm

··· 278 278 KernelVersion 6.18 279 279 Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 280 280 Description: (Read) Show hardware context information of device. 281 + 282 + What: /sys/bus/coresight/devices/<tpdm-name>/traceid 283 + Date: March 2026 284 + KernelVersion: 7.1 285 + Contact: Jie Gan <jie.gan@oss.qualcomm.com> 286 + Description: 287 + (R) Show the trace ID that will appear in the trace stream 288 + coming from this TPDM. The trace ID is inherited from the 289 + connected TPDA device and is fixed for the lifetime of the 290 + device. Returns -EINVAL if the device has not been enabled yet.

+3 -2

MAINTAINERS

··· 2725 2725 2726 2726 ARM/CORESIGHT FRAMEWORK AND DRIVERS 2727 2727 M: Suzuki K Poulose <suzuki.poulose@arm.com> 2728 - R: Mike Leach <mike.leach@linaro.org> 2728 + R: Mike Leach <mike.leach@arm.com> 2729 2729 R: James Clark <james.clark@linaro.org> 2730 + R: Leo Yan <leo.yan@arm.com> 2730 2731 L: coresight@lists.linaro.org (moderated for non-subscribers) 2731 2732 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2732 2733 S: Maintained ··· 20735 20734 R: John Garry <john.g.garry@oracle.com> 20736 20735 R: Will Deacon <will@kernel.org> 20737 20736 R: James Clark <james.clark@linaro.org> 20738 - R: Mike Leach <mike.leach@linaro.org> 20737 + R: Mike Leach <mike.leach@arm.com> 20739 20738 R: Leo Yan <leo.yan@linux.dev> 20740 20739 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 20741 20740 S: Supported

+1 -3

drivers/hwtracing/coresight/coresight-catu.c

··· 30 30 #define catu_dbg(x, ...) do {} while (0) 31 31 #endif 32 32 33 - DEFINE_CORESIGHT_DEVLIST(catu_devs, "catu"); 34 - 35 33 struct catu_etr_buf { 36 34 struct tmc_sg_table *catu_table; 37 35 dma_addr_t sladdr; ··· 528 530 if (ret) 529 531 return ret; 530 532 531 - catu_desc.name = coresight_alloc_device_name(&catu_devs, dev); 533 + catu_desc.name = coresight_alloc_device_name("catu", dev); 532 534 if (!catu_desc.name) 533 535 return -ENOMEM; 534 536

+133 -83

drivers/hwtracing/coresight/coresight-core.c

··· 53 53 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 54 54 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 55 55 56 + /* List maintains the device index */ 57 + static LIST_HEAD(coresight_dev_idx_list); 58 + 56 59 static const struct cti_assoc_op *cti_assoc_ops; 57 60 58 61 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) ··· 1152 1149 return 0; 1153 1150 } 1154 1151 1155 - /* coresight_remove_conns - Remove other device's references to this device */ 1156 1152 static void coresight_remove_conns(struct coresight_device *csdev) 1157 1153 { 1158 1154 int i, j; ··· 1161 1159 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1162 1160 coresight_clear_filter_source); 1163 1161 1164 - /* 1165 - * Remove the input connection references from the destination device 1166 - * for each output connection. 1167 - */ 1168 1162 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 1169 1163 conn = csdev->pdata->out_conns[i]; 1170 1164 if (conn->filter_src_fwnode) { ··· 1171 1173 if (!conn->dest_dev) 1172 1174 continue; 1173 1175 1176 + /* Remove sysfs links for the output connection */ 1177 + coresight_remove_links(csdev, conn); 1178 + 1179 + /* 1180 + * Remove the input connection references from the destination 1181 + * device for each output connection. 1182 + */ 1174 1183 for (j = 0; j < conn->dest_dev->pdata->nr_inconns; ++j) 1175 1184 if (conn->dest_dev->pdata->in_conns[j] == conn) { 1176 1185 conn->dest_dev->pdata->in_conns[j] = NULL; ··· 1200 1195 coresight_remove_links(conn->src_dev, conn); 1201 1196 conn->dest_dev = NULL; 1202 1197 } 1198 + 1199 + coresight_remove_conns_sysfs_group(csdev); 1203 1200 } 1204 1201 1205 1202 /** ··· 1302 1295 * coresight_release_platform_data: Release references to the devices connected 1303 1296 * to the output port of this device. 1304 1297 */ 1305 - void coresight_release_platform_data(struct coresight_device *csdev, 1306 - struct device *dev, 1298 + void coresight_release_platform_data(struct device *dev, 1307 1299 struct coresight_platform_data *pdata) 1308 1300 { 1309 1301 int i; 1310 1302 struct coresight_connection **conns = pdata->out_conns; 1311 1303 1312 1304 for (i = 0; i < pdata->nr_outconns; i++) { 1313 - /* If we have made the links, remove them now */ 1314 - if (csdev && conns[i]->dest_dev) 1315 - coresight_remove_links(csdev, conns[i]); 1316 1305 /* 1317 1306 * Drop the refcount and clear the handle as this device 1318 1307 * is going away ··· 1320 1317 devm_kfree(dev, pdata->out_conns); 1321 1318 devm_kfree(dev, pdata->in_conns); 1322 1319 devm_kfree(dev, pdata); 1323 - if (csdev) 1324 - coresight_remove_conns_sysfs_group(csdev); 1325 1320 } 1326 1321 1327 1322 struct coresight_device *coresight_register(struct coresight_desc *desc) ··· 1347 1346 csdev->dev.parent = desc->dev; 1348 1347 csdev->dev.release = coresight_device_release; 1349 1348 csdev->dev.bus = &coresight_bustype; 1350 - /* 1351 - * Hold the reference to our parent device. This will be 1352 - * dropped only in coresight_device_release(). 1353 - */ 1354 - csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1355 - dev_set_name(&csdev->dev, "%s", desc->name); 1356 1349 1357 1350 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1358 1351 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { ··· 1358 1363 goto err_out; 1359 1364 } 1360 1365 } 1366 + 1367 + /* 1368 + * Hold the reference to our parent device. This will be 1369 + * dropped only in coresight_device_release(). 1370 + */ 1371 + csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1372 + dev_set_name(&csdev->dev, "%s", desc->name); 1373 + 1361 1374 /* 1362 1375 * Make sure the device registration and the connection fixup 1363 1376 * are synchronised, so that we don't see uninitialised devices ··· 1383 1380 goto out_unlock; 1384 1381 } 1385 1382 1386 - if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 1387 - csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 1388 - sink_ops(csdev)->alloc_buffer) { 1389 - ret = etm_perf_add_symlink_sink(csdev); 1390 - 1391 - if (ret) { 1392 - device_unregister(&csdev->dev); 1393 - /* 1394 - * As with the above, all resources are free'd 1395 - * explicitly via coresight_device_release() triggered 1396 - * from put_device(), which is in turn called from 1397 - * function device_unregister(). 1398 - */ 1399 - goto out_unlock; 1400 - } 1401 - } 1402 1383 /* Device is now registered */ 1403 1384 registered = true; 1404 1385 1386 + ret = etm_perf_add_symlink_sink(csdev); 1387 + if (ret && ret != -EOPNOTSUPP) 1388 + goto out_unlock; 1389 + 1405 1390 ret = coresight_create_conns_sysfs_group(csdev); 1406 - if (!ret) 1407 - ret = coresight_fixup_orphan_conns(csdev); 1391 + if (ret) 1392 + goto out_unlock; 1393 + 1394 + ret = coresight_fixup_orphan_conns(csdev); 1395 + if (ret) 1396 + goto out_unlock; 1397 + 1398 + mutex_unlock(&coresight_mutex); 1399 + 1400 + if (cti_assoc_ops && cti_assoc_ops->add) 1401 + cti_assoc_ops->add(csdev); 1402 + 1403 + return csdev; 1408 1404 1409 1405 out_unlock: 1410 1406 mutex_unlock(&coresight_mutex); 1411 - /* Success */ 1412 - if (!ret) { 1413 - if (cti_assoc_ops && cti_assoc_ops->add) 1414 - cti_assoc_ops->add(csdev); 1415 - return csdev; 1416 - } 1417 1407 1418 1408 /* Unregister the device if needed */ 1419 1409 if (registered) { ··· 1415 1419 } 1416 1420 1417 1421 err_out: 1418 - /* Cleanup the connection information */ 1419 - coresight_release_platform_data(NULL, desc->dev, desc->pdata); 1422 + coresight_release_platform_data(desc->dev, desc->pdata); 1420 1423 return ERR_PTR(ret); 1421 1424 } 1422 1425 EXPORT_SYMBOL_GPL(coresight_register); 1423 1426 1424 1427 void coresight_unregister(struct coresight_device *csdev) 1425 1428 { 1426 - etm_perf_del_symlink_sink(csdev); 1427 1429 /* Remove references of that device in the topology */ 1428 1430 if (cti_assoc_ops && cti_assoc_ops->remove) 1429 1431 cti_assoc_ops->remove(csdev); 1432 + 1433 + mutex_lock(&coresight_mutex); 1434 + etm_perf_del_symlink_sink(csdev); 1430 1435 coresight_remove_conns(csdev); 1431 1436 coresight_clear_default_sink(csdev); 1432 - coresight_release_platform_data(csdev, csdev->dev.parent, csdev->pdata); 1437 + coresight_release_platform_data(csdev->dev.parent, csdev->pdata); 1433 1438 device_unregister(&csdev->dev); 1439 + mutex_unlock(&coresight_mutex); 1434 1440 } 1435 1441 EXPORT_SYMBOL_GPL(coresight_unregister); 1436 1442 1437 - 1438 - /* 1439 - * coresight_search_device_idx - Search the fwnode handle of a device 1440 - * in the given dev_idx list. Must be called with the coresight_mutex held. 1441 - * 1442 - * Returns the index of the entry, when found. Otherwise, -ENOENT. 1443 - */ 1444 - static int coresight_search_device_idx(struct coresight_dev_list *dict, 1445 - struct fwnode_handle *fwnode) 1443 + static struct coresight_dev_list * 1444 + coresight_allocate_device_list(const char *prefix) 1446 1445 { 1447 - int i; 1446 + struct coresight_dev_list *list; 1448 1447 1449 - for (i = 0; i < dict->nr_idx; i++) 1450 - if (dict->fwnode_list[i] == fwnode) 1451 - return i; 1452 - return -ENOENT; 1448 + /* Check if have already allocated */ 1449 + list_for_each_entry(list, &coresight_dev_idx_list, node) { 1450 + if (!strcmp(list->pfx, prefix)) 1451 + return list; 1452 + } 1453 + 1454 + list = kzalloc(sizeof(*list), GFP_KERNEL); 1455 + if (!list) 1456 + return NULL; 1457 + 1458 + list->pfx = kstrdup(prefix, GFP_KERNEL); 1459 + if (!list->pfx) { 1460 + kfree(list); 1461 + return NULL; 1462 + } 1463 + 1464 + list_add(&list->node, &coresight_dev_idx_list); 1465 + return list; 1466 + } 1467 + 1468 + static int coresight_allocate_device_idx(struct coresight_dev_list *list, 1469 + struct device *dev) 1470 + { 1471 + struct fwnode_handle **fwnode_list; 1472 + struct fwnode_handle *fwnode = dev_fwnode(dev); 1473 + int idx; 1474 + 1475 + for (idx = 0; idx < list->nr_idx; idx++) 1476 + if (list->fwnode_list[idx] == fwnode) 1477 + return idx; 1478 + 1479 + /* Make space for the new entry */ 1480 + idx = list->nr_idx; 1481 + fwnode_list = krealloc_array(list->fwnode_list, 1482 + idx + 1, sizeof(*list->fwnode_list), 1483 + GFP_KERNEL); 1484 + if (!fwnode_list) 1485 + return -ENOMEM; 1486 + 1487 + fwnode_list[idx] = fwnode; 1488 + list->fwnode_list = fwnode_list; 1489 + list->nr_idx = idx + 1; 1490 + 1491 + return idx; 1453 1492 } 1454 1493 1455 1494 static bool coresight_compare_type(enum coresight_dev_type type_a, ··· 1558 1527 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1559 1528 1560 1529 /* 1561 - * coresight_alloc_device_name - Get an index for a given device in the 1562 - * device index list specific to a driver. An index is allocated for a 1563 - * device and is tracked with the fwnode_handle to prevent allocating 1530 + * coresight_alloc_device_name - Get an index for a given device in the list 1531 + * specific to a driver (presented by the prefix string). An index is allocated 1532 + * for a device and is tracked with the fwnode_handle to prevent allocating 1564 1533 * duplicate indices for the same device (e.g, if we defer probing of 1565 1534 * a device due to dependencies), in case the index is requested again. 1566 1535 */ 1567 - char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1568 - struct device *dev) 1536 + char *coresight_alloc_device_name(const char *prefix, struct device *dev) 1569 1537 { 1570 - int idx; 1538 + struct coresight_dev_list *list; 1571 1539 char *name = NULL; 1572 - struct fwnode_handle **list; 1540 + int idx; 1573 1541 1574 1542 mutex_lock(&coresight_mutex); 1575 1543 1576 - idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1577 - if (idx < 0) { 1578 - /* Make space for the new entry */ 1579 - idx = dict->nr_idx; 1580 - list = krealloc_array(dict->fwnode_list, 1581 - idx + 1, sizeof(*dict->fwnode_list), 1582 - GFP_KERNEL); 1583 - if (ZERO_OR_NULL_PTR(list)) { 1584 - idx = -ENOMEM; 1585 - goto done; 1586 - } 1544 + list = coresight_allocate_device_list(prefix); 1545 + if (!list) 1546 + goto done; 1587 1547 1588 - list[idx] = dev_fwnode(dev); 1589 - dict->fwnode_list = list; 1590 - dict->nr_idx = idx + 1; 1591 - } 1548 + idx = coresight_allocate_device_idx(list, dev); 1592 1549 1593 - name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1550 + /* 1551 + * If index allocation fails, the device list is not released here; 1552 + * it is instead freed later by coresight_release_device_list() when 1553 + * the coresight_core module is unloaded. 1554 + */ 1555 + if (idx < 0) 1556 + goto done; 1557 + 1558 + name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", list->pfx, idx); 1594 1559 done: 1595 1560 mutex_unlock(&coresight_mutex); 1596 1561 return name; 1597 1562 } 1598 1563 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1564 + 1565 + static void coresight_release_device_list(void) 1566 + { 1567 + struct coresight_dev_list *list, *next; 1568 + int i; 1569 + 1570 + /* 1571 + * Here is no need to take coresight_mutex; this is during core module 1572 + * unloading, no race condition with other modules. 1573 + */ 1574 + 1575 + list_for_each_entry_safe(list, next, &coresight_dev_idx_list, node) { 1576 + for (i = 0; i < list->nr_idx; i++) 1577 + list->fwnode_list[i] = NULL; 1578 + list->nr_idx = 0; 1579 + list_del(&list->node); 1580 + 1581 + kfree(list->pfx); 1582 + kfree(list->fwnode_list); 1583 + kfree(list); 1584 + } 1585 + } 1599 1586 1600 1587 const struct bus_type coresight_bustype = { 1601 1588 .name = "coresight", ··· 1688 1639 &coresight_notifier); 1689 1640 etm_perf_exit(); 1690 1641 bus_unregister(&coresight_bustype); 1642 + coresight_release_device_list(); 1691 1643 } 1692 1644 1693 1645 module_init(coresight_init);

+2 -3

drivers/hwtracing/coresight/coresight-ctcu-core.c

··· 19 19 #include "coresight-ctcu.h" 20 20 #include "coresight-priv.h" 21 21 22 - DEFINE_CORESIGHT_DEVLIST(ctcu_devs, "ctcu"); 23 - 24 22 #define ctcu_writel(drvdata, val, offset) __raw_writel((val), drvdata->base + offset) 25 23 #define ctcu_readl(drvdata, offset) __raw_readl(drvdata->base + offset) 26 24 ··· 185 187 void __iomem *base; 186 188 int i, ret; 187 189 188 - desc.name = coresight_alloc_device_name(&ctcu_devs, dev); 190 + desc.name = coresight_alloc_device_name("ctcu", dev); 189 191 if (!desc.name) 190 192 return -ENOMEM; 191 193 ··· 226 228 desc.dev = dev; 227 229 desc.ops = &ctcu_ops; 228 230 desc.access = CSDEV_ACCESS_IOMEM(base); 231 + raw_spin_lock_init(&drvdata->spin_lock); 229 232 230 233 drvdata->csdev = coresight_register(&desc); 231 234 if (IS_ERR(drvdata->csdev))

+52 -269

drivers/hwtracing/coresight/coresight-cti-core.c

··· 42 42 #define csdev_to_cti_drvdata(csdev) \ 43 43 dev_get_drvdata(csdev->dev.parent) 44 44 45 - /* power management handling */ 46 - static int nr_cti_cpu; 47 - 48 - /* quick lookup list for CPU bound CTIs when power handling */ 49 - static struct cti_drvdata *cti_cpu_drvdata[NR_CPUS]; 50 - 51 - /* 52 - * CTI naming. CTI bound to cores will have the name cti_cpu<N> where 53 - * N is the CPU ID. System CTIs will have the name cti_sys<I> where I 54 - * is an index allocated by order of discovery. 55 - * 56 - * CTI device name list - for CTI not bound to cores. 57 - */ 58 - DEFINE_CORESIGHT_DEVLIST(cti_sys_devs, "cti_sys"); 59 - 60 45 /* write set of regs to hardware - call with spinlock claimed */ 61 46 void cti_write_all_hw_regs(struct cti_drvdata *drvdata) 62 47 { ··· 62 77 63 78 /* other regs */ 64 79 writel_relaxed(config->ctigate, drvdata->base + CTIGATE); 65 - writel_relaxed(config->asicctl, drvdata->base + ASICCTL); 80 + if (config->asicctl_impl) 81 + writel_relaxed(config->asicctl, drvdata->base + ASICCTL); 66 82 writel_relaxed(config->ctiappset, drvdata->base + CTIAPPSET); 67 83 68 84 /* re-enable CTI */ ··· 76 90 static int cti_enable_hw(struct cti_drvdata *drvdata) 77 91 { 78 92 struct cti_config *config = &drvdata->config; 79 - unsigned long flags; 80 - int rc = 0; 93 + int rc; 81 94 82 - raw_spin_lock_irqsave(&drvdata->spinlock, flags); 95 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 83 96 84 - /* no need to do anything if enabled or unpowered*/ 85 - if (config->hw_enabled || !config->hw_powered) 97 + /* no need to do anything if enabled */ 98 + if (cti_is_active(config)) 86 99 goto cti_state_unchanged; 87 100 88 101 /* claim the device */ 89 102 rc = coresight_claim_device(drvdata->csdev); 90 103 if (rc) 91 - goto cti_err_not_enabled; 104 + return rc; 92 105 93 106 cti_write_all_hw_regs(drvdata); 94 - 95 - config->hw_enabled = true; 96 - drvdata->config.enable_req_count++; 97 - raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); 98 - return rc; 99 107 100 108 cti_state_unchanged: 101 109 drvdata->config.enable_req_count++; 102 - 103 - /* cannot enable due to error */ 104 - cti_err_not_enabled: 105 - raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); 106 - return rc; 107 - } 108 - 109 - /* re-enable CTI on CPU when using CPU hotplug */ 110 - static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata) 111 - { 112 - struct cti_config *config = &drvdata->config; 113 - 114 - raw_spin_lock(&drvdata->spinlock); 115 - config->hw_powered = true; 116 - 117 - /* no need to do anything if no enable request */ 118 - if (!drvdata->config.enable_req_count) 119 - goto cti_hp_not_enabled; 120 - 121 - /* try to claim the device */ 122 - if (coresight_claim_device(drvdata->csdev)) 123 - goto cti_hp_not_enabled; 124 - 125 - cti_write_all_hw_regs(drvdata); 126 - config->hw_enabled = true; 127 - raw_spin_unlock(&drvdata->spinlock); 128 - return; 129 - 130 - /* did not re-enable due to no claim / no request */ 131 - cti_hp_not_enabled: 132 - raw_spin_unlock(&drvdata->spinlock); 110 + return 0; 133 111 } 134 112 135 113 /* disable hardware */ ··· 101 151 { 102 152 struct cti_config *config = &drvdata->config; 103 153 struct coresight_device *csdev = drvdata->csdev; 104 - int ret = 0; 105 154 106 - raw_spin_lock(&drvdata->spinlock); 155 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 107 156 108 157 /* don't allow negative refcounts, return an error */ 109 - if (!drvdata->config.enable_req_count) { 110 - ret = -EINVAL; 111 - goto cti_not_disabled; 112 - } 158 + if (!cti_is_active(config)) 159 + return -EINVAL; 113 160 114 161 /* check refcount - disable on 0 */ 115 162 if (--drvdata->config.enable_req_count > 0) 116 - goto cti_not_disabled; 117 - 118 - /* no need to do anything if disabled or cpu unpowered */ 119 - if (!config->hw_enabled || !config->hw_powered) 120 - goto cti_not_disabled; 163 + return 0; 121 164 122 165 CS_UNLOCK(drvdata->base); 123 166 124 167 /* disable CTI */ 125 168 writel_relaxed(0, drvdata->base + CTICONTROL); 126 - config->hw_enabled = false; 127 169 128 170 coresight_disclaim_device_unlocked(csdev); 129 171 CS_LOCK(drvdata->base); 130 - raw_spin_unlock(&drvdata->spinlock); 131 - return ret; 172 + return 0; 173 + } 132 174 133 - /* not disabled this call */ 134 - cti_not_disabled: 135 - raw_spin_unlock(&drvdata->spinlock); 136 - return ret; 175 + u32 cti_read_single_reg(struct cti_drvdata *drvdata, int offset) 176 + { 177 + int val; 178 + 179 + CS_UNLOCK(drvdata->base); 180 + val = readl_relaxed(drvdata->base + offset); 181 + CS_LOCK(drvdata->base); 182 + 183 + return val; 137 184 } 138 185 139 186 void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value) ··· 145 198 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 146 199 struct cti_config *config = &drvdata->config; 147 200 148 - raw_spin_lock(&drvdata->spinlock); 201 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 202 + 149 203 /* write if enabled */ 150 - if (cti_active(config)) 204 + if (cti_is_active(config)) 151 205 cti_write_single_reg(drvdata, CTIINTACK, ackval); 152 - raw_spin_unlock(&drvdata->spinlock); 153 206 } 154 207 155 208 /* ··· 187 240 config->trig_filter_enable = true; 188 241 config->ctigate = GENMASK(config->nr_ctm_channels - 1, 0); 189 242 config->enable_req_count = 0; 243 + 244 + config->asicctl_impl = !!FIELD_GET(GENMASK(4, 0), devid); 190 245 } 191 246 192 247 /* ··· 318 369 reg_offset = (direction == CTI_TRIG_IN ? CTIINEN(trigger_idx) : 319 370 CTIOUTEN(trigger_idx)); 320 371 321 - raw_spin_lock(&drvdata->spinlock); 372 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 322 373 323 374 /* read - modify write - the trigger / channel enable value */ 324 375 reg_value = direction == CTI_TRIG_IN ? config->ctiinen[trigger_idx] : ··· 335 386 config->ctiouten[trigger_idx] = reg_value; 336 387 337 388 /* write through if enabled */ 338 - if (cti_active(config)) 389 + if (cti_is_active(config)) 339 390 cti_write_single_reg(drvdata, reg_offset, reg_value); 340 - raw_spin_unlock(&drvdata->spinlock); 391 + 341 392 return 0; 342 393 } 343 394 ··· 355 406 356 407 chan_bitmask = BIT(channel_idx); 357 408 358 - raw_spin_lock(&drvdata->spinlock); 409 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 410 + 359 411 reg_value = config->ctigate; 360 412 switch (op) { 361 413 case CTI_GATE_CHAN_ENABLE: ··· 373 423 } 374 424 if (err == 0) { 375 425 config->ctigate = reg_value; 376 - if (cti_active(config)) 426 + if (cti_is_active(config)) 377 427 cti_write_single_reg(drvdata, CTIGATE, reg_value); 378 428 } 379 - raw_spin_unlock(&drvdata->spinlock); 429 + 380 430 return err; 381 431 } 382 432 ··· 395 445 396 446 chan_bitmask = BIT(channel_idx); 397 447 398 - raw_spin_lock(&drvdata->spinlock); 448 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 449 + 399 450 reg_value = config->ctiappset; 400 451 switch (op) { 401 452 case CTI_CHAN_SET: ··· 422 471 break; 423 472 } 424 473 425 - if ((err == 0) && cti_active(config)) 474 + if ((err == 0) && cti_is_active(config)) 426 475 cti_write_single_reg(drvdata, reg_offset, reg_value); 427 - raw_spin_unlock(&drvdata->spinlock); 428 476 429 477 return err; 430 478 } ··· 608 658 } 609 659 } 610 660 611 - /** cti PM callbacks **/ 612 - static int cti_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, 613 - void *v) 614 - { 615 - struct cti_drvdata *drvdata; 616 - struct coresight_device *csdev; 617 - unsigned int cpu = smp_processor_id(); 618 - int notify_res = NOTIFY_OK; 619 - 620 - if (!cti_cpu_drvdata[cpu]) 621 - return NOTIFY_OK; 622 - 623 - drvdata = cti_cpu_drvdata[cpu]; 624 - csdev = drvdata->csdev; 625 - 626 - if (WARN_ON_ONCE(drvdata->ctidev.cpu != cpu)) 627 - return NOTIFY_BAD; 628 - 629 - raw_spin_lock(&drvdata->spinlock); 630 - 631 - switch (cmd) { 632 - case CPU_PM_ENTER: 633 - /* CTI regs all static - we have a copy & nothing to save */ 634 - drvdata->config.hw_powered = false; 635 - if (drvdata->config.hw_enabled) 636 - coresight_disclaim_device(csdev); 637 - break; 638 - 639 - case CPU_PM_ENTER_FAILED: 640 - drvdata->config.hw_powered = true; 641 - if (drvdata->config.hw_enabled) { 642 - if (coresight_claim_device(csdev)) 643 - drvdata->config.hw_enabled = false; 644 - } 645 - break; 646 - 647 - case CPU_PM_EXIT: 648 - /* write hardware registers to re-enable. */ 649 - drvdata->config.hw_powered = true; 650 - drvdata->config.hw_enabled = false; 651 - 652 - /* check enable reference count to enable HW */ 653 - if (drvdata->config.enable_req_count) { 654 - /* check we can claim the device as we re-power */ 655 - if (coresight_claim_device(csdev)) 656 - goto cti_notify_exit; 657 - 658 - drvdata->config.hw_enabled = true; 659 - cti_write_all_hw_regs(drvdata); 660 - } 661 - break; 662 - 663 - default: 664 - notify_res = NOTIFY_DONE; 665 - break; 666 - } 667 - 668 - cti_notify_exit: 669 - raw_spin_unlock(&drvdata->spinlock); 670 - return notify_res; 671 - } 672 - 673 - static struct notifier_block cti_cpu_pm_nb = { 674 - .notifier_call = cti_cpu_pm_notify, 675 - }; 676 - 677 - /* CPU HP handlers */ 678 - static int cti_starting_cpu(unsigned int cpu) 679 - { 680 - struct cti_drvdata *drvdata = cti_cpu_drvdata[cpu]; 681 - 682 - if (!drvdata) 683 - return 0; 684 - 685 - cti_cpuhp_enable_hw(drvdata); 686 - return 0; 687 - } 688 - 689 - static int cti_dying_cpu(unsigned int cpu) 690 - { 691 - struct cti_drvdata *drvdata = cti_cpu_drvdata[cpu]; 692 - 693 - if (!drvdata) 694 - return 0; 695 - 696 - raw_spin_lock(&drvdata->spinlock); 697 - drvdata->config.hw_powered = false; 698 - if (drvdata->config.hw_enabled) 699 - coresight_disclaim_device(drvdata->csdev); 700 - raw_spin_unlock(&drvdata->spinlock); 701 - return 0; 702 - } 703 - 704 - static int cti_pm_setup(struct cti_drvdata *drvdata) 705 - { 706 - int ret; 707 - 708 - if (drvdata->ctidev.cpu == -1) 709 - return 0; 710 - 711 - if (nr_cti_cpu) 712 - goto done; 713 - 714 - cpus_read_lock(); 715 - ret = cpuhp_setup_state_nocalls_cpuslocked( 716 - CPUHP_AP_ARM_CORESIGHT_CTI_STARTING, 717 - "arm/coresight_cti:starting", 718 - cti_starting_cpu, cti_dying_cpu); 719 - if (ret) { 720 - cpus_read_unlock(); 721 - return ret; 722 - } 723 - 724 - ret = cpu_pm_register_notifier(&cti_cpu_pm_nb); 725 - cpus_read_unlock(); 726 - if (ret) { 727 - cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); 728 - return ret; 729 - } 730 - 731 - done: 732 - nr_cti_cpu++; 733 - cti_cpu_drvdata[drvdata->ctidev.cpu] = drvdata; 734 - 735 - return 0; 736 - } 737 - 738 - /* release PM registrations */ 739 - static void cti_pm_release(struct cti_drvdata *drvdata) 740 - { 741 - if (drvdata->ctidev.cpu == -1) 742 - return; 743 - 744 - cti_cpu_drvdata[drvdata->ctidev.cpu] = NULL; 745 - if (--nr_cti_cpu == 0) { 746 - cpu_pm_unregister_notifier(&cti_cpu_pm_nb); 747 - cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); 748 - } 749 - } 750 - 751 661 /** cti ect operations **/ 752 662 int cti_enable(struct coresight_device *csdev, enum cs_mode mode, 753 663 struct coresight_path *path) ··· 633 823 .helper_ops = &cti_ops_ect, 634 824 }; 635 825 636 - /* 637 - * Free up CTI specific resources 638 - * called by dev->release, need to call down to underlying csdev release. 639 - */ 640 - static void cti_device_release(struct device *dev) 826 + static void cti_remove(struct amba_device *adev) 641 827 { 642 - struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 828 + struct cti_drvdata *drvdata = dev_get_drvdata(&adev->dev); 643 829 struct cti_drvdata *ect_item, *ect_tmp; 644 830 645 831 mutex_lock(&ect_mutex); 646 - cti_pm_release(drvdata); 832 + cti_remove_conn_xrefs(drvdata); 647 833 648 834 /* remove from the list */ 649 835 list_for_each_entry_safe(ect_item, ect_tmp, &ect_net, node) { ··· 648 842 break; 649 843 } 650 844 } 651 - mutex_unlock(&ect_mutex); 652 - 653 - if (drvdata->csdev_release) 654 - drvdata->csdev_release(dev); 655 - } 656 - static void cti_remove(struct amba_device *adev) 657 - { 658 - struct cti_drvdata *drvdata = dev_get_drvdata(&adev->dev); 659 - 660 - mutex_lock(&ect_mutex); 661 - cti_remove_conn_xrefs(drvdata); 662 845 mutex_unlock(&ect_mutex); 663 846 664 847 coresight_unregister(drvdata->csdev); ··· 695 900 return PTR_ERR(pdata); 696 901 } 697 902 698 - /* default to powered - could change on PM notifications */ 699 - drvdata->config.hw_powered = true; 700 - 701 - /* set up device name - will depend if cpu bound or otherwise */ 903 + /* 904 + * Set up device name - will depend if cpu bound or otherwise. 905 + * 906 + * CTI bound to cores will have the name cti_cpu<N> where N is th 907 + * eCPU ID. System CTIs will have the name cti_sys<I> where I is an 908 + * index allocated by order of discovery. 909 + */ 702 910 if (drvdata->ctidev.cpu >= 0) 703 911 cti_desc.name = devm_kasprintf(dev, GFP_KERNEL, "cti_cpu%d", 704 912 drvdata->ctidev.cpu); 705 913 else 706 - cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev); 914 + cti_desc.name = coresight_alloc_device_name("cti_sys", dev); 707 915 if (!cti_desc.name) 708 916 return -ENOMEM; 709 - 710 - /* setup CPU power management handling for CPU bound CTI devices. */ 711 - ret = cti_pm_setup(drvdata); 712 - if (ret) 713 - return ret; 714 917 715 918 /* create dynamic attributes for connections */ 716 919 ret = cti_create_cons_sysfs(dev, drvdata); 717 920 if (ret) { 718 921 dev_err(dev, "%s: create dynamic sysfs entries failed\n", 719 922 cti_desc.name); 720 - goto pm_release; 923 + return ret; 721 924 } 722 925 723 926 /* set up coresight component description */ ··· 728 935 729 936 coresight_clear_self_claim_tag(&cti_desc.access); 730 937 drvdata->csdev = coresight_register(&cti_desc); 731 - if (IS_ERR(drvdata->csdev)) { 732 - ret = PTR_ERR(drvdata->csdev); 733 - goto pm_release; 734 - } 938 + if (IS_ERR(drvdata->csdev)) 939 + return PTR_ERR(drvdata->csdev); 735 940 736 941 /* add to list of CTI devices */ 737 942 mutex_lock(&ect_mutex); ··· 738 947 cti_update_conn_xrefs(drvdata); 739 948 mutex_unlock(&ect_mutex); 740 949 741 - /* set up release chain */ 742 - drvdata->csdev_release = drvdata->csdev->dev.release; 743 - drvdata->csdev->dev.release = cti_device_release; 744 - 745 950 /* all done - dec pm refcount */ 746 951 pm_runtime_put(&adev->dev); 747 952 dev_info(&drvdata->csdev->dev, "CTI initialized\n"); 748 953 return 0; 749 - 750 - pm_release: 751 - cti_pm_release(drvdata); 752 - return ret; 753 954 } 754 955 755 956 static struct amba_cs_uci_id uci_id_cti[] = {

+92 -82

drivers/hwtracing/coresight/coresight-cti-sysfs.c

··· 81 81 char *buf) 82 82 { 83 83 int enable_req; 84 - bool enabled, powered; 85 84 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 86 85 87 - raw_spin_lock(&drvdata->spinlock); 88 - enable_req = drvdata->config.enable_req_count; 89 - powered = drvdata->config.hw_powered; 90 - enabled = drvdata->config.hw_enabled; 91 - raw_spin_unlock(&drvdata->spinlock); 86 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) 87 + enable_req = cti_is_active(&drvdata->config); 92 88 93 - if (powered) 94 - return sprintf(buf, "%d\n", enabled); 95 - else 96 - return sprintf(buf, "%d\n", !!enable_req); 89 + return sprintf(buf, "%d\n", !!enable_req); 97 90 } 98 91 99 92 static ssize_t enable_store(struct device *dev, ··· 124 131 struct device_attribute *attr, 125 132 char *buf) 126 133 { 127 - bool powered; 128 - struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 129 - 130 - raw_spin_lock(&drvdata->spinlock); 131 - powered = drvdata->config.hw_powered; 132 - raw_spin_unlock(&drvdata->spinlock); 134 + bool powered = pm_runtime_active(dev->parent); 133 135 134 136 return sprintf(buf, "%d\n", powered); 135 137 } ··· 169 181 u32 val = 0; 170 182 171 183 pm_runtime_get_sync(dev->parent); 172 - raw_spin_lock(&drvdata->spinlock); 173 - if (drvdata->config.hw_powered) 174 - val = readl_relaxed(drvdata->base + cti_attr->off); 175 - raw_spin_unlock(&drvdata->spinlock); 184 + 185 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) 186 + val = cti_read_single_reg(drvdata, cti_attr->off); 187 + 176 188 pm_runtime_put_sync(dev->parent); 177 189 return sysfs_emit(buf, "0x%x\n", val); 178 190 } ··· 190 202 return -EINVAL; 191 203 192 204 pm_runtime_get_sync(dev->parent); 193 - raw_spin_lock(&drvdata->spinlock); 194 - if (drvdata->config.hw_powered) 205 + 206 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) 195 207 cti_write_single_reg(drvdata, cti_attr->off, val); 196 - raw_spin_unlock(&drvdata->spinlock); 208 + 197 209 pm_runtime_put_sync(dev->parent); 198 210 return size; 199 211 } ··· 252 264 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 253 265 struct cti_config *config = &drvdata->config; 254 266 255 - raw_spin_lock(&drvdata->spinlock); 256 - if ((reg_offset >= 0) && cti_active(config)) { 257 - CS_UNLOCK(drvdata->base); 258 - val = readl_relaxed(drvdata->base + reg_offset); 259 - if (pcached_val) 260 - *pcached_val = val; 261 - CS_LOCK(drvdata->base); 262 - } else if (pcached_val) { 263 - val = *pcached_val; 267 + if (reg_offset < 0) 268 + return -EINVAL; 269 + 270 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { 271 + if (cti_is_active(config)) { 272 + val = cti_read_single_reg(drvdata, reg_offset); 273 + if (pcached_val) 274 + *pcached_val = val; 275 + } else if (pcached_val) { 276 + val = *pcached_val; 277 + } 264 278 } 265 - raw_spin_unlock(&drvdata->spinlock); 279 + 266 280 return sprintf(buf, "%#x\n", val); 267 281 } 268 282 ··· 283 293 if (kstrtoul(buf, 0, &val)) 284 294 return -EINVAL; 285 295 286 - raw_spin_lock(&drvdata->spinlock); 287 - /* local store */ 288 - if (pcached_val) 289 - *pcached_val = (u32)val; 296 + if (reg_offset < 0) 297 + return -EINVAL; 290 298 291 - /* write through if offset and enabled */ 292 - if ((reg_offset >= 0) && cti_active(config)) 293 - cti_write_single_reg(drvdata, reg_offset, val); 294 - raw_spin_unlock(&drvdata->spinlock); 299 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { 300 + /* local store */ 301 + if (pcached_val) 302 + *pcached_val = (u32)val; 303 + 304 + /* write through if offset and enabled */ 305 + if (cti_is_active(config)) 306 + cti_write_single_reg(drvdata, reg_offset, val); 307 + } 308 + 295 309 return size; 296 310 } 297 311 ··· 337 343 { 338 344 unsigned long val; 339 345 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 346 + struct cti_config *config = &drvdata->config; 340 347 341 348 if (kstrtoul(buf, 0, &val)) 342 349 return -EINVAL; 343 - if (val > (CTIINOUTEN_MAX - 1)) 350 + if (val >= config->nr_trig_max) 344 351 return -EINVAL; 345 352 346 - raw_spin_lock(&drvdata->spinlock); 353 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 354 + 347 355 drvdata->config.ctiinout_sel = val; 348 - raw_spin_unlock(&drvdata->spinlock); 349 356 return size; 350 357 } 351 358 static DEVICE_ATTR_RW(inout_sel); ··· 359 364 int index; 360 365 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 361 366 362 - raw_spin_lock(&drvdata->spinlock); 363 - index = drvdata->config.ctiinout_sel; 364 - val = drvdata->config.ctiinen[index]; 365 - raw_spin_unlock(&drvdata->spinlock); 367 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { 368 + index = drvdata->config.ctiinout_sel; 369 + val = drvdata->config.ctiinen[index]; 370 + } 371 + 366 372 return sprintf(buf, "%#lx\n", val); 367 373 } 368 374 ··· 379 383 if (kstrtoul(buf, 0, &val)) 380 384 return -EINVAL; 381 385 382 - raw_spin_lock(&drvdata->spinlock); 386 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 387 + 383 388 index = config->ctiinout_sel; 384 389 config->ctiinen[index] = val; 385 390 386 391 /* write through if enabled */ 387 - if (cti_active(config)) 392 + if (cti_is_active(config)) 388 393 cti_write_single_reg(drvdata, CTIINEN(index), val); 389 - raw_spin_unlock(&drvdata->spinlock); 394 + 390 395 return size; 391 396 } 392 397 static DEVICE_ATTR_RW(inen); ··· 400 403 int index; 401 404 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 402 405 403 - raw_spin_lock(&drvdata->spinlock); 404 - index = drvdata->config.ctiinout_sel; 405 - val = drvdata->config.ctiouten[index]; 406 - raw_spin_unlock(&drvdata->spinlock); 406 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { 407 + index = drvdata->config.ctiinout_sel; 408 + val = drvdata->config.ctiouten[index]; 409 + } 410 + 407 411 return sprintf(buf, "%#lx\n", val); 408 412 } 409 413 ··· 420 422 if (kstrtoul(buf, 0, &val)) 421 423 return -EINVAL; 422 424 423 - raw_spin_lock(&drvdata->spinlock); 425 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 426 + 424 427 index = config->ctiinout_sel; 425 428 config->ctiouten[index] = val; 426 429 427 430 /* write through if enabled */ 428 - if (cti_active(config)) 431 + if (cti_is_active(config)) 429 432 cti_write_single_reg(drvdata, CTIOUTEN(index), val); 430 - raw_spin_unlock(&drvdata->spinlock); 433 + 431 434 return size; 432 435 } 433 436 static DEVICE_ATTR_RW(outen); ··· 462 463 if (kstrtoul(buf, 0, &val)) 463 464 return -EINVAL; 464 465 465 - raw_spin_lock(&drvdata->spinlock); 466 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 466 467 467 468 /* a 1'b1 in appclr clears down the same bit in appset*/ 468 469 config->ctiappset &= ~val; 469 470 470 471 /* write through if enabled */ 471 - if (cti_active(config)) 472 + if (cti_is_active(config)) 472 473 cti_write_single_reg(drvdata, CTIAPPCLEAR, val); 473 - raw_spin_unlock(&drvdata->spinlock); 474 + 474 475 return size; 475 476 } 476 477 static DEVICE_ATTR_WO(appclear); ··· 486 487 if (kstrtoul(buf, 0, &val)) 487 488 return -EINVAL; 488 489 489 - raw_spin_lock(&drvdata->spinlock); 490 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 490 491 491 492 /* write through if enabled */ 492 - if (cti_active(config)) 493 + if (cti_is_active(config)) 493 494 cti_write_single_reg(drvdata, CTIAPPPULSE, val); 494 - raw_spin_unlock(&drvdata->spinlock); 495 + 495 496 return size; 496 497 } 497 498 static DEVICE_ATTR_WO(apppulse); ··· 528 529 #endif 529 530 NULL, 530 531 }; 532 + 533 + static umode_t coresight_cti_regs_is_visible(struct kobject *kobj, 534 + struct attribute *attr, int idx) 535 + { 536 + struct device *dev = kobj_to_dev(kobj); 537 + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 538 + 539 + if (attr == &dev_attr_asicctl.attr && !drvdata->config.asicctl_impl) 540 + return 0; 541 + 542 + return attr->mode; 543 + } 531 544 532 545 /* CTI channel x-trigger programming */ 533 546 static int ··· 692 681 u32 val; 693 682 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 694 683 695 - raw_spin_lock(&drvdata->spinlock); 696 - val = drvdata->config.trig_filter_enable; 697 - raw_spin_unlock(&drvdata->spinlock); 684 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) 685 + val = drvdata->config.trig_filter_enable; 686 + 698 687 return sprintf(buf, "%d\n", val); 699 688 } 700 689 ··· 708 697 if (kstrtoul(buf, 0, &val)) 709 698 return -EINVAL; 710 699 711 - raw_spin_lock(&drvdata->spinlock); 700 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 701 + 712 702 drvdata->config.trig_filter_enable = !!val; 713 - raw_spin_unlock(&drvdata->spinlock); 714 703 return size; 715 704 } 716 705 static DEVICE_ATTR_RW(trig_filter_enable); ··· 739 728 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 740 729 struct cti_config *config = &drvdata->config; 741 730 742 - raw_spin_lock(&drvdata->spinlock); 731 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 743 732 744 733 /* clear the CTI trigger / channel programming registers */ 745 734 for (i = 0; i < config->nr_trig_max; i++) { ··· 755 744 config->xtrig_rchan_sel = 0; 756 745 757 746 /* if enabled then write through */ 758 - if (cti_active(config)) 747 + if (cti_is_active(config)) 759 748 cti_write_all_hw_regs(drvdata); 760 749 761 - raw_spin_unlock(&drvdata->spinlock); 762 750 return size; 763 751 } 764 752 static DEVICE_ATTR_WO(chan_xtrigs_reset); ··· 778 768 if (val > (drvdata->config.nr_ctm_channels - 1)) 779 769 return -EINVAL; 780 770 781 - raw_spin_lock(&drvdata->spinlock); 771 + guard(raw_spinlock_irqsave)(&drvdata->spinlock); 772 + 782 773 drvdata->config.xtrig_rchan_sel = val; 783 - raw_spin_unlock(&drvdata->spinlock); 784 774 return size; 785 775 } 786 776 ··· 791 781 unsigned long val; 792 782 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); 793 783 794 - raw_spin_lock(&drvdata->spinlock); 795 - val = drvdata->config.xtrig_rchan_sel; 796 - raw_spin_unlock(&drvdata->spinlock); 784 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) 785 + val = drvdata->config.xtrig_rchan_sel; 797 786 798 787 return sprintf(buf, "%ld\n", val); 799 788 } ··· 847 838 unsigned long inuse_bits = 0, chan_mask; 848 839 849 840 /* scan regs to get bitmap of channels in use. */ 850 - raw_spin_lock(&drvdata->spinlock); 851 - for (i = 0; i < config->nr_trig_max; i++) { 852 - inuse_bits |= config->ctiinen[i]; 853 - inuse_bits |= config->ctiouten[i]; 841 + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { 842 + for (i = 0; i < config->nr_trig_max; i++) { 843 + inuse_bits |= config->ctiinen[i]; 844 + inuse_bits |= config->ctiouten[i]; 845 + } 854 846 } 855 - raw_spin_unlock(&drvdata->spinlock); 856 847 857 848 /* inverse bits if printing free channels */ 858 849 if (!inuse) ··· 1178 1169 1179 1170 static const struct attribute_group coresight_cti_regs_group = { 1180 1171 .attrs = coresight_cti_regs_attrs, 1172 + .is_visible = coresight_cti_regs_is_visible, 1181 1173 .name = "regs", 1182 1174 }; 1183 1175

+6 -9

drivers/hwtracing/coresight/coresight-cti.h

··· 119 119 * @nr_trig_max: Max number of trigger signals implemented on device. 120 120 * (max of trig_in or trig_out) - from ID register. 121 121 * @nr_ctm_channels: number of available CTM channels - from ID register. 122 + * @asicctl_impl: true if asicctl is implemented. 122 123 * @enable_req_count: CTI is enabled alongside >=1 associated devices. 123 - * @hw_enabled: true if hw is currently enabled. 124 - * @hw_powered: true if associated cpu powered on, or no cpu. 125 124 * @trig_in_use: bitfield of in triggers registered as in use. 126 125 * @trig_out_use: bitfield of out triggers registered as in use. 127 126 * @trig_out_filter: bitfield of out triggers that are blocked if filter ··· 139 140 /* hardware description */ 140 141 int nr_ctm_channels; 141 142 int nr_trig_max; 143 + bool asicctl_impl; 142 144 143 145 /* cti enable control */ 144 146 int enable_req_count; 145 - bool hw_enabled; 146 - bool hw_powered; 147 147 148 148 /* registered triggers and filtering */ 149 149 u32 trig_in_use; ··· 168 170 * @spinlock: Control data access to one at a time. 169 171 * @config: Configuration data for this CTI device. 170 172 * @node: List entry of this device in the list of CTI devices. 171 - * @csdev_release: release function for underlying coresight_device. 172 173 */ 173 174 struct cti_drvdata { 174 175 void __iomem *base; ··· 176 179 raw_spinlock_t spinlock; 177 180 struct cti_config config; 178 181 struct list_head node; 179 - void (*csdev_release)(struct device *dev); 180 182 }; 181 183 182 184 /* ··· 218 222 void cti_write_all_hw_regs(struct cti_drvdata *drvdata); 219 223 void cti_write_intack(struct device *dev, u32 ackval); 220 224 void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value); 225 + u32 cti_read_single_reg(struct cti_drvdata *drvdata, int offset); 221 226 int cti_channel_trig_op(struct device *dev, enum cti_chan_op op, 222 227 enum cti_trig_dir direction, u32 channel_idx, 223 228 u32 trigger_idx); ··· 231 234 coresight_cti_get_platform_data(struct device *dev); 232 235 const char *cti_plat_get_node_name(struct fwnode_handle *fwnode); 233 236 234 - /* cti powered and enabled */ 235 - static inline bool cti_active(struct cti_config *cfg) 237 + /* Check if a cti device is enabled */ 238 + static inline bool cti_is_active(struct cti_config *cfg) 236 239 { 237 - return cfg->hw_powered && cfg->hw_enabled; 240 + return !!cfg->enable_req_count; 238 241 } 239 242 240 243 #endif /* _CORESIGHT_CORESIGHT_CTI_H */

+2 -5

drivers/hwtracing/coresight/coresight-dummy.c

··· 19 19 u8 traceid; 20 20 }; 21 21 22 - DEFINE_CORESIGHT_DEVLIST(source_devs, "dummy_source"); 23 - DEFINE_CORESIGHT_DEVLIST(sink_devs, "dummy_sink"); 24 - 25 22 static int dummy_source_enable(struct coresight_device *csdev, 26 23 struct perf_event *event, enum cs_mode mode, 27 24 __maybe_unused struct coresight_path *path) ··· 123 126 124 127 if (of_device_is_compatible(node, "arm,coresight-dummy-source")) { 125 128 126 - desc.name = coresight_alloc_device_name(&source_devs, dev); 129 + desc.name = coresight_alloc_device_name("dummy_source", dev); 127 130 if (!desc.name) 128 131 return -ENOMEM; 129 132 ··· 152 155 drvdata->traceid = (u8)trace_id; 153 156 154 157 } else if (of_device_is_compatible(node, "arm,coresight-dummy-sink")) { 155 - desc.name = coresight_alloc_device_name(&sink_devs, dev); 158 + desc.name = coresight_alloc_device_name("dummy_sink", dev); 156 159 if (!desc.name) 157 160 return -ENOMEM; 158 161

+1 -3

drivers/hwtracing/coresight/coresight-etb10.c

··· 63 63 #define ETB_FFSR_BIT 1 64 64 #define ETB_FRAME_SIZE_WORDS 4 65 65 66 - DEFINE_CORESIGHT_DEVLIST(etb_devs, "etb"); 67 - 68 66 /** 69 67 * struct etb_drvdata - specifics associated to an ETB component 70 68 * @base: memory mapped base address for this component. ··· 720 722 struct resource *res = &adev->res; 721 723 struct coresight_desc desc = { 0 }; 722 724 723 - desc.name = coresight_alloc_device_name(&etb_devs, dev); 725 + desc.name = coresight_alloc_device_name("etb", dev); 724 726 if (!desc.name) 725 727 return -ENOMEM; 726 728

+4 -1

drivers/hwtracing/coresight/coresight-etm-perf.c

··· 902 902 903 903 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 904 904 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 905 - return -EINVAL; 905 + return -EOPNOTSUPP; 906 + 907 + if (!sink_ops(csdev)->alloc_buffer) 908 + return -EOPNOTSUPP; 906 909 907 910 if (csdev->ea != NULL) 908 911 return -EINVAL;

+1 -3

drivers/hwtracing/coresight/coresight-funnel.c

··· 30 30 #define FUNNEL_HOLDTIME (0x7 << FUNNEL_HOLDTIME_SHFT) 31 31 #define FUNNEL_ENSx_MASK 0xff 32 32 33 - DEFINE_CORESIGHT_DEVLIST(funnel_devs, "funnel"); 34 - 35 33 /** 36 34 * struct funnel_drvdata - specifics associated to a funnel component 37 35 * @base: memory mapped base address for this component. ··· 221 223 of_device_is_compatible(dev->of_node, "arm,coresight-funnel")) 222 224 dev_warn_once(dev, "Uses OBSOLETE CoreSight funnel binding\n"); 223 225 224 - desc.name = coresight_alloc_device_name(&funnel_devs, dev); 226 + desc.name = coresight_alloc_device_name("funnel", dev); 225 227 if (!desc.name) 226 228 return -ENOMEM; 227 229

+3 -1

drivers/hwtracing/coresight/coresight-platform.c

··· 220 220 rparent = of_coresight_get_port_parent(rep); 221 221 if (!rparent) 222 222 break; 223 + if (!of_device_is_available(rparent)) 224 + break; 223 225 if (of_graph_parse_endpoint(rep, &rendpoint)) 224 226 break; 225 227 ··· 851 849 error: 852 850 if (!IS_ERR_OR_NULL(pdata)) 853 851 /* Cleanup the connection information */ 854 - coresight_release_platform_data(NULL, dev, pdata); 852 + coresight_release_platform_data(dev, pdata); 855 853 return ERR_PTR(ret); 856 854 } 857 855 EXPORT_SYMBOL_GPL(coresight_get_platform_data);

+1 -2

drivers/hwtracing/coresight/coresight-priv.h

··· 239 239 return NULL; 240 240 } 241 241 242 - void coresight_release_platform_data(struct coresight_device *csdev, 243 - struct device *dev, 242 + void coresight_release_platform_data(struct device *dev, 244 243 struct coresight_platform_data *pdata); 245 244 struct coresight_device * 246 245 coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode);

+1 -3

drivers/hwtracing/coresight/coresight-replicator.c

··· 24 24 #define REPLICATOR_IDFILTER0 0x000 25 25 #define REPLICATOR_IDFILTER1 0x004 26 26 27 - DEFINE_CORESIGHT_DEVLIST(replicator_devs, "replicator"); 28 - 29 27 /** 30 28 * struct replicator_drvdata - specifics associated to a replicator component 31 29 * @base: memory mapped base address for this component. Also indicates ··· 228 230 dev_warn_once(dev, 229 231 "Uses OBSOLETE CoreSight replicator binding\n"); 230 232 231 - desc.name = coresight_alloc_device_name(&replicator_devs, dev); 233 + desc.name = coresight_alloc_device_name("replicator", dev); 232 234 if (!desc.name) 233 235 return -ENOMEM; 234 236

+1 -3

drivers/hwtracing/coresight/coresight-stm.c

··· 110 110 unsigned long *guaranteed; 111 111 }; 112 112 113 - DEFINE_CORESIGHT_DEVLIST(stm_devs, "stm"); 114 - 115 113 /** 116 114 * struct stm_drvdata - specifics associated to an STM component 117 115 * @base: memory mapped base address for this component. ··· 832 834 struct resource ch_res; 833 835 struct coresight_desc desc = { 0 }; 834 836 835 - desc.name = coresight_alloc_device_name(&stm_devs, dev); 837 + desc.name = coresight_alloc_device_name("stm", dev); 836 838 if (!desc.name) 837 839 return -ENOMEM; 838 840

+5 -10

drivers/hwtracing/coresight/coresight-tmc-core.c

··· 32 32 #include "coresight-priv.h" 33 33 #include "coresight-tmc.h" 34 34 35 - DEFINE_CORESIGHT_DEVLIST(etb_devs, "tmc_etb"); 36 - DEFINE_CORESIGHT_DEVLIST(etf_devs, "tmc_etf"); 37 - DEFINE_CORESIGHT_DEVLIST(etr_devs, "tmc_etr"); 38 - 39 35 int tmc_wait_for_tmcready(struct tmc_drvdata *drvdata) 40 36 { 41 37 struct coresight_device *csdev = drvdata->csdev; ··· 397 401 398 402 static int tmc_crashdata_release(struct inode *inode, struct file *file) 399 403 { 400 - int ret = 0; 401 404 unsigned long flags; 402 405 struct tmc_resrv_buf *rbuf; 403 406 struct tmc_drvdata *drvdata = container_of(file->private_data, ··· 409 414 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); 410 415 411 416 dev_dbg(&drvdata->csdev->dev, "%s: released\n", __func__); 412 - return ret; 417 + return 0; 413 418 } 414 419 415 420 static const struct file_operations tmc_crashdata_fops = { ··· 772 777 struct coresight_platform_data *pdata = NULL; 773 778 struct tmc_drvdata *drvdata; 774 779 struct coresight_desc desc = { 0 }; 775 - struct coresight_dev_list *dev_list = NULL; 780 + const char *dev_list = NULL; 776 781 777 782 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 778 783 if (!drvdata) ··· 822 827 desc.type = CORESIGHT_DEV_TYPE_SINK; 823 828 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; 824 829 desc.ops = &tmc_etb_cs_ops; 825 - dev_list = &etb_devs; 830 + dev_list = "tmc_etb"; 826 831 break; 827 832 case TMC_CONFIG_TYPE_ETR: 828 833 desc.groups = coresight_etr_groups; ··· 834 839 goto out; 835 840 idr_init(&drvdata->idr); 836 841 mutex_init(&drvdata->idr_mutex); 837 - dev_list = &etr_devs; 842 + dev_list = "tmc_etr"; 838 843 break; 839 844 case TMC_CONFIG_TYPE_ETF: 840 845 desc.groups = coresight_etf_groups; ··· 842 847 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; 843 848 desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO; 844 849 desc.ops = &tmc_etf_cs_ops; 845 - dev_list = &etf_devs; 850 + dev_list = "tmc_etf"; 846 851 break; 847 852 default: 848 853 pr_err("%s: Unsupported TMC config\n", desc.name);

+1 -3

drivers/hwtracing/coresight/coresight-tnoc.c

··· 47 47 int atid; 48 48 }; 49 49 50 - DEFINE_CORESIGHT_DEVLIST(trace_noc_devs, "traceNoc"); 51 - 52 50 static void trace_noc_enable_hw(struct trace_noc_drvdata *drvdata) 53 51 { 54 52 u32 val; ··· 189 191 struct coresight_desc desc = { 0 }; 190 192 int ret; 191 193 192 - desc.name = coresight_alloc_device_name(&trace_noc_devs, dev); 194 + desc.name = coresight_alloc_device_name("traceNoc", dev); 193 195 if (!desc.name) 194 196 return -ENOMEM; 195 197

+1 -3

drivers/hwtracing/coresight/coresight-tpda.c

··· 20 20 #include "coresight-trace-id.h" 21 21 #include "coresight-tpdm.h" 22 22 23 - DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda"); 24 - 25 23 static void tpda_clear_element_size(struct coresight_device *csdev) 26 24 { 27 25 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); ··· 583 585 if (ret) 584 586 return ret; 585 587 586 - desc.name = coresight_alloc_device_name(&tpda_devs, dev); 588 + desc.name = coresight_alloc_device_name("tpda", dev); 587 589 if (!desc.name) 588 590 return -ENOMEM; 589 591 desc.type = CORESIGHT_DEV_TYPE_LINK;

+35 -5

drivers/hwtracing/coresight/coresight-tpdm.c

··· 19 19 #include "coresight-priv.h" 20 20 #include "coresight-tpdm.h" 21 21 22 - DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm"); 23 - 24 22 static bool tpdm_has_dsb_dataset(struct tpdm_drvdata *drvdata) 25 23 { 26 24 return (drvdata->datasets & TPDM_PIDR0_DS_DSB); ··· 481 483 482 484 static int tpdm_enable(struct coresight_device *csdev, struct perf_event *event, 483 485 enum cs_mode mode, 484 - __maybe_unused struct coresight_path *path) 486 + struct coresight_path *path) 485 487 { 486 488 struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 487 489 ··· 497 499 } 498 500 499 501 __tpdm_enable(drvdata); 502 + drvdata->traceid = path->trace_id; 500 503 drvdata->enable = true; 501 504 spin_unlock(&drvdata->spinlock); 502 505 ··· 692 693 693 694 static struct attribute_group tpdm_attr_grp = { 694 695 .attrs = tpdm_attrs, 696 + }; 697 + 698 + static ssize_t traceid_show(struct device *dev, 699 + struct device_attribute *attr, char *buf) 700 + { 701 + unsigned long val; 702 + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); 703 + 704 + val = drvdata->traceid; 705 + if (!val) 706 + return -EINVAL; 707 + 708 + return sysfs_emit(buf, "%#lx\n", val); 709 + } 710 + static DEVICE_ATTR_RO(traceid); 711 + 712 + static struct attribute *traceid_attrs[] = { 713 + &dev_attr_traceid.attr, 714 + NULL, 715 + }; 716 + 717 + static struct attribute_group traceid_attr_grp = { 718 + .attrs = traceid_attrs, 695 719 }; 696 720 697 721 static ssize_t dsb_mode_show(struct device *dev, ··· 1391 1369 &tpdm_cmb_patt_grp, 1392 1370 &tpdm_cmb_msr_grp, 1393 1371 &tpdm_mcmb_attr_grp, 1372 + &traceid_attr_grp, 1373 + NULL, 1374 + }; 1375 + 1376 + static const struct attribute_group *static_tpdm_attr_grps[] = { 1377 + &traceid_attr_grp, 1394 1378 NULL, 1395 1379 }; 1396 1380 ··· 1430 1402 if (ret) 1431 1403 return ret; 1432 1404 1405 + desc.access = CSDEV_ACCESS_IOMEM(base); 1433 1406 if (tpdm_has_dsb_dataset(drvdata)) 1434 1407 of_property_read_u32(drvdata->dev->of_node, 1435 1408 "qcom,dsb-msrs-num", &drvdata->dsb_msr_num); ··· 1445 1416 } 1446 1417 1447 1418 /* Set up coresight component description */ 1448 - desc.name = coresight_alloc_device_name(&tpdm_devs, dev); 1419 + desc.name = coresight_alloc_device_name("tpdm", dev); 1449 1420 if (!desc.name) 1450 1421 return -ENOMEM; 1451 1422 desc.type = CORESIGHT_DEV_TYPE_SOURCE; ··· 1453 1424 desc.ops = &tpdm_cs_ops; 1454 1425 desc.pdata = dev->platform_data; 1455 1426 desc.dev = dev; 1456 - desc.access = CSDEV_ACCESS_IOMEM(base); 1457 1427 if (res) 1458 1428 desc.groups = tpdm_attr_grps; 1429 + else 1430 + desc.groups = static_tpdm_attr_grps; 1459 1431 drvdata->csdev = coresight_register(&desc); 1460 1432 if (IS_ERR(drvdata->csdev)) 1461 1433 return PTR_ERR(drvdata->csdev);

+2

drivers/hwtracing/coresight/coresight-tpdm.h

··· 300 300 * @cmb Specifics associated to TPDM CMB. 301 301 * @dsb_msr_num Number of MSR supported by DSB TPDM 302 302 * @cmb_msr_num Number of MSR supported by CMB TPDM 303 + * @traceid Trace ID of the path. 303 304 */ 304 305 305 306 struct tpdm_drvdata { ··· 314 313 struct cmb_dataset *cmb; 315 314 u32 dsb_msr_num; 316 315 u32 cmb_msr_num; 316 + u8 traceid; 317 317 }; 318 318 319 319 /* Enumerate members of various datasets */

+1 -3

drivers/hwtracing/coresight/coresight-tpiu.c

··· 49 49 #define FFCR_FON_MAN BIT(6) 50 50 #define FFCR_STOP_FI BIT(12) 51 51 52 - DEFINE_CORESIGHT_DEVLIST(tpiu_devs, "tpiu"); 53 - 54 52 /* 55 53 * @base: memory mapped base address for this component. 56 54 * @atclk: optional clock for the core parts of the TPIU. ··· 132 134 struct coresight_desc desc = { 0 }; 133 135 int ret; 134 136 135 - desc.name = coresight_alloc_device_name(&tpiu_devs, dev); 137 + desc.name = coresight_alloc_device_name("tpiu", dev); 136 138 if (!desc.name) 137 139 return -ENOMEM; 138 140

+1 -3

drivers/hwtracing/coresight/ultrasoc-smb.c

··· 17 17 #include "coresight-priv.h" 18 18 #include "ultrasoc-smb.h" 19 19 20 - DEFINE_CORESIGHT_DEVLIST(sink_devs, "ultra_smb"); 21 - 22 20 #define ULTRASOC_SMB_DSM_UUID "82ae1283-7f6a-4cbe-aa06-53e8fb24db18" 23 21 24 22 static bool smb_buffer_not_empty(struct smb_drv_data *drvdata) ··· 476 478 desc.pdata = pdata; 477 479 desc.dev = &pdev->dev; 478 480 desc.groups = smb_sink_groups; 479 - desc.name = coresight_alloc_device_name(&sink_devs, &pdev->dev); 481 + desc.name = coresight_alloc_device_name("ultra_smb", &pdev->dev); 480 482 if (!desc.name) { 481 483 dev_err(&pdev->dev, "Failed to alloc coresight device name"); 482 484 return -ENOMEM;

+4 -10

include/linux/coresight.h

··· 306 306 * coresight_dev_list - Mapping for devices to "name" index for device 307 307 * names. 308 308 * 309 + * @node: Node on the global device index list. 309 310 * @nr_idx: Number of entries already allocated. 310 311 * @pfx: Prefix pattern for device name. 311 312 * @fwnode_list: Array of fwnode_handles associated with each allocated 312 313 * index, upto nr_idx entries. 313 314 */ 314 315 struct coresight_dev_list { 316 + struct list_head node; 315 317 int nr_idx; 316 - const char *pfx; 318 + char *pfx; 317 319 struct fwnode_handle **fwnode_list; 318 320 }; 319 - 320 - #define DEFINE_CORESIGHT_DEVLIST(var, dev_pfx) \ 321 - static struct coresight_dev_list (var) = { \ 322 - .pfx = dev_pfx, \ 323 - .nr_idx = 0, \ 324 - .fwnode_list = NULL, \ 325 - } 326 321 327 322 #define to_coresight_device(d) container_of(d, struct coresight_device, dev) 328 323 ··· 658 663 void coresight_clear_self_claim_tag_unlocked(struct csdev_access *csa); 659 664 void coresight_disclaim_device(struct coresight_device *csdev); 660 665 void coresight_disclaim_device_unlocked(struct coresight_device *csdev); 661 - char *coresight_alloc_device_name(struct coresight_dev_list *devs, 662 - struct device *dev); 666 + char *coresight_alloc_device_name(const char *prefix, struct device *dev); 663 667 664 668 bool coresight_loses_context_with_cpu(struct device *dev); 665 669

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