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Merge branch kvm-arm64/gicv3-tdir-fixes into kvmarm-master/next

* kvm-arm64/gicv3-tdir-fixes:
: .
: Address two trapping-related issues when running legacy (i.e. GICv3)
: guests on GICv5 hosts, courtesy of Sascha Bischoff.
: .
KVM: arm64: Correct test for ICH_HCR_EL2_TDIR cap for GICv5 hosts
KVM: arm64: gic: Enable GICv3 CPUIF trapping on GICv5 hosts if required

Signed-off-by: Marc Zyngier <maz@kernel.org>

+22 -14
+4 -4
arch/arm64/kernel/cpufeature.c
··· 2335 2335 2336 2336 BUILD_BUG_ON(ARM64_HAS_ICH_HCR_EL2_TDIR <= ARM64_HAS_GICV3_CPUIF); 2337 2337 BUILD_BUG_ON(ARM64_HAS_ICH_HCR_EL2_TDIR <= ARM64_HAS_GICV5_LEGACY); 2338 - if (!this_cpu_has_cap(ARM64_HAS_GICV3_CPUIF) && 2339 - !is_midr_in_range_list(has_vgic_v3)) 2340 - return false; 2341 - 2342 2338 if (!is_hyp_mode_available()) 2343 2339 return false; 2344 2340 2345 2341 if (this_cpu_has_cap(ARM64_HAS_GICV5_LEGACY)) 2346 2342 return true; 2343 + 2344 + if (!this_cpu_has_cap(ARM64_HAS_GICV3_CPUIF) && 2345 + !is_midr_in_range_list(has_vgic_v3)) 2346 + return false; 2347 2347 2348 2348 if (is_kernel_in_hyp_mode()) 2349 2349 res.a1 = read_sysreg_s(SYS_ICH_VTR_EL2);
+15 -10
arch/arm64/kvm/vgic/vgic-v3.c
··· 880 880 *updptr = cpu_to_le32(insn); 881 881 } 882 882 883 + void vgic_v3_enable_cpuif_traps(void) 884 + { 885 + u64 traps = vgic_ich_hcr_trap_bits(); 886 + 887 + if (traps) { 888 + kvm_info("GICv3 sysreg trapping enabled ([%s%s%s%s], reduced performance)\n", 889 + (traps & ICH_HCR_EL2_TALL0) ? "G0" : "", 890 + (traps & ICH_HCR_EL2_TALL1) ? "G1" : "", 891 + (traps & ICH_HCR_EL2_TC) ? "C" : "", 892 + (traps & ICH_HCR_EL2_TDIR) ? "D" : ""); 893 + static_branch_enable(&vgic_v3_cpuif_trap); 894 + } 895 + } 896 + 883 897 /** 884 898 * vgic_v3_probe - probe for a VGICv3 compatible interrupt controller 885 899 * @info: pointer to the GIC description ··· 905 891 { 906 892 u64 ich_vtr_el2 = kvm_call_hyp_ret(__vgic_v3_get_gic_config); 907 893 bool has_v2; 908 - u64 traps; 909 894 int ret; 910 895 911 896 has_v2 = ich_vtr_el2 >> 63; ··· 968 955 kvm_vgic_global_state.ich_vtr_el2 &= ~ICH_VTR_EL2_SEIS; 969 956 } 970 957 971 - traps = vgic_ich_hcr_trap_bits(); 972 - if (traps) { 973 - kvm_info("GICv3 sysreg trapping enabled ([%s%s%s%s], reduced performance)\n", 974 - (traps & ICH_HCR_EL2_TALL0) ? "G0" : "", 975 - (traps & ICH_HCR_EL2_TALL1) ? "G1" : "", 976 - (traps & ICH_HCR_EL2_TC) ? "C" : "", 977 - (traps & ICH_HCR_EL2_TDIR) ? "D" : ""); 978 - static_branch_enable(&vgic_v3_cpuif_trap); 979 - } 958 + vgic_v3_enable_cpuif_traps(); 980 959 981 960 kvm_vgic_global_state.vctrl_base = NULL; 982 961 kvm_vgic_global_state.type = VGIC_V3;
+2
arch/arm64/kvm/vgic/vgic-v5.c
··· 48 48 static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif); 49 49 kvm_info("GCIE legacy system register CPU interface\n"); 50 50 51 + vgic_v3_enable_cpuif_traps(); 52 + 51 53 return 0; 52 54 }
+1
arch/arm64/kvm/vgic/vgic.h
··· 324 324 void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 325 325 void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 326 326 void vgic_v3_reset(struct kvm_vcpu *vcpu); 327 + void vgic_v3_enable_cpuif_traps(void); 327 328 int vgic_v3_probe(const struct gic_kvm_info *info); 328 329 int vgic_v3_map_resources(struct kvm *kvm); 329 330 int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq);