tjh.dev / kernel
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drm/msm/dpu: drop VBIF index from the VBIF params

Since we don't support and don't use VBIF_NRT, VBIF_RT is the only
possible VBIF type. To simplify the driver, drop vbif_idx from the VBIF
parameter structures.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/707783/
Link: https://lore.kernel.org/r/20260227-drop-vbif-nrt-v1-6-2b97d0438182@oss.qualcomm.com

Dmitry Baryshkov 1ce61688 021fd8ca

+14 -30
+1 -4
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
··· 71 71 ot_params.is_wfd = !dpu_encoder_helper_get_cwb_mask(phys_enc); 72 72 ot_params.frame_rate = drm_mode_vrefresh(&phys_enc->cached_mode); 73 73 /* XXX: WB on MSM8996 should use VBIF_NRT */ 74 - ot_params.vbif_idx = VBIF_RT; 75 74 ot_params.rd = false; 76 75 77 76 if (!_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp, ··· 109 110 110 111 memset(&qos_params, 0, sizeof(qos_params)); 111 112 /* XXX: WB on MSM8996 should use VBIF_NRT */ 112 - qos_params.vbif_idx = VBIF_RT; 113 113 qos_params.xin_id = hw_wb->caps->xin_id; 114 114 qos_params.num = hw_wb->idx - WB_0; 115 115 qos_params.is_rt = dpu_encoder_helper_get_cwb_mask(phys_enc); 116 116 117 - DPU_DEBUG("[qos_remap] wb:%d vbif:%d xin:%d is_rt:%d\n", 117 + DPU_DEBUG("[qos_remap] wb:%d xin:%d is_rt:%d\n", 118 118 qos_params.num, 119 - qos_params.vbif_idx, 120 119 qos_params.xin_id, qos_params.is_rt); 121 120 122 121 if (!_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp,
+1 -4
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
··· 374 374 ot_params.height = drm_rect_height(&pipe_cfg->src_rect); 375 375 ot_params.is_wfd = !pdpu->is_rt_pipe; 376 376 ot_params.frame_rate = frame_rate; 377 - ot_params.vbif_idx = VBIF_RT; 378 377 ot_params.rd = true; 379 378 380 379 if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp, ··· 401 402 bool forced_on = false; 402 403 403 404 memset(&qos_params, 0, sizeof(qos_params)); 404 - qos_params.vbif_idx = VBIF_RT; 405 405 qos_params.xin_id = pipe->sspp->cap->xin_id; 406 406 qos_params.num = pipe->sspp->idx - SSPP_VIG0; 407 407 qos_params.is_rt = pdpu->is_rt_pipe; 408 408 409 - DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d\n", 409 + DPU_DEBUG_PLANE(pdpu, "pipe:%d xin:%d rt:%d\n", 410 410 qos_params.num, 411 - qos_params.vbif_idx, 412 411 qos_params.xin_id, qos_params.is_rt); 413 412 414 413 if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
+7 -12
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
··· 72 72 ); 73 73 74 74 TRACE_EVENT(dpu_perf_set_ot, 75 - TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx), 76 - TP_ARGS(pnum, xin_id, rd_lim, vbif_idx), 75 + TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim), 76 + TP_ARGS(pnum, xin_id, rd_lim), 77 77 TP_STRUCT__entry( 78 78 __field(u32, pnum) 79 79 __field(u32, xin_id) 80 80 __field(u32, rd_lim) 81 - __field(u32, vbif_idx) 82 81 ), 83 82 TP_fast_assign( 84 83 __entry->pnum = pnum; 85 84 __entry->xin_id = xin_id; 86 85 __entry->rd_lim = rd_lim; 87 - __entry->vbif_idx = vbif_idx; 88 86 ), 89 - TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d", 90 - __entry->pnum, __entry->xin_id, __entry->rd_lim, 91 - __entry->vbif_idx) 87 + TP_printk("pnum:%d xin_id:%d ot:%d", 88 + __entry->pnum, __entry->xin_id, __entry->rd_lim) 92 89 ) 93 90 94 91 TRACE_EVENT(dpu_cmd_release_bw, ··· 858 861 ); 859 862 860 863 TRACE_EVENT(dpu_vbif_wait_xin_halt_fail, 861 - TP_PROTO(enum dpu_vbif index, u32 xin_id), 862 - TP_ARGS(index, xin_id), 864 + TP_PROTO(u32 xin_id), 865 + TP_ARGS(xin_id), 863 866 TP_STRUCT__entry( 864 - __field( enum dpu_vbif, index ) 865 867 __field( u32, xin_id ) 866 868 ), 867 869 TP_fast_assign( 868 - __entry->index = index; 869 870 __entry->xin_id = xin_id; 870 871 ), 871 - TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id) 872 + TP_printk("xin_id:%u", __entry->xin_id) 872 873 ); 873 874 874 875 TRACE_EVENT(dpu_pp_connect_ext_te,
+5 -6
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
··· 180 180 if (ot_lim == 0) 181 181 return; 182 182 183 - trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim, 184 - params->vbif_idx); 183 + trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim); 185 184 186 185 vbif->ops.set_limit_conf(vbif, params->xin_id, params->rd, ot_lim); 187 186 ··· 188 189 189 190 ret = _dpu_vbif_wait_for_xin_halt(vbif, params->xin_id); 190 191 if (ret) 191 - trace_dpu_vbif_wait_xin_halt_fail(vbif->idx, params->xin_id); 192 + trace_dpu_vbif_wait_xin_halt_fail(params->xin_id); 192 193 193 194 vbif->ops.set_halt_ctrl(vbif, params->xin_id, false); 194 195 } ··· 213 214 vbif = dpu_kms->hw_vbif; 214 215 215 216 if (!vbif || !vbif->cap) { 216 - DPU_ERROR("invalid vbif %d\n", params->vbif_idx); 217 + DPU_ERROR("invalid vbif\n"); 217 218 return; 218 219 } 219 220 ··· 231 232 } 232 233 233 234 for (i = 0; i < qos_tbl->npriority_lvl; i++) { 234 - DRM_DEBUG_ATOMIC("%s xin:%d lvl:%d/%d\n", 235 - dpu_vbif_name(params->vbif_idx), params->xin_id, i, 235 + DRM_DEBUG_ATOMIC("VBIF xin:%d lvl:%d/%d\n", 236 + params->xin_id, i, 236 237 qos_tbl->priority_lvl[i]); 237 238 vbif->ops.set_qos_remap(vbif, params->xin_id, i, 238 239 qos_tbl->priority_lvl[i]);
-4
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
··· 15 15 u32 frame_rate; 16 16 bool rd; 17 17 bool is_wfd; 18 - u32 vbif_idx; 19 18 }; 20 19 21 20 struct dpu_vbif_set_memtype_params { 22 21 u32 xin_id; 23 - u32 vbif_idx; 24 22 bool is_cacheable; 25 23 }; 26 24 27 25 /** 28 26 * struct dpu_vbif_set_qos_params - QoS remapper parameter 29 - * @vbif_idx: vbif identifier 30 27 * @xin_id: client interface identifier 31 28 * @num: pipe identifier (debug only) 32 29 * @is_rt: true if pipe is used in real-time use case 33 30 */ 34 31 struct dpu_vbif_set_qos_params { 35 - u32 vbif_idx; 36 32 u32 xin_id; 37 33 u32 num; 38 34 bool is_rt;