Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: mpl3115: add support for sampling frequency
When the device is in ACTIVE mode the temperature and pressure measurements
are collected with a frequency determined by the ST[3:0] bits of CTRL_REG2
register.
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
Antoni Pokusinski
and committed by
Jonathan Cameron
1d09cf18
8464f610
+82
+82
drivers/iio/pressure/mpl3115.c
+82
drivers/iio/pressure/mpl3115.c
···
10
10
* user offset correction, raw mode
11
11
*/
12
12
13
+
#include <linux/bitfield.h>
13
14
#include <linux/cleanup.h>
14
15
#include <linux/delay.h>
15
16
#include <linux/i2c.h>
···
31
30
#define MPL3115_INT_SOURCE 0x12
32
31
#define MPL3115_PT_DATA_CFG 0x13
33
32
#define MPL3115_CTRL_REG1 0x26
33
+
#define MPL3115_CTRL_REG2 0x27
34
34
#define MPL3115_CTRL_REG3 0x28
35
35
#define MPL3115_CTRL_REG4 0x29
36
36
#define MPL3115_CTRL_REG5 0x2a
···
50
48
#define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */
51
49
#define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */
52
50
51
+
#define MPL3115_CTRL2_ST GENMASK(3, 0)
52
+
53
53
#define MPL3115_CTRL3_IPOL1 BIT(5)
54
54
#define MPL3115_CTRL3_IPOL2 BIT(1)
55
55
56
56
#define MPL3115_CTRL4_INT_EN_DRDY BIT(7)
57
57
58
58
#define MPL3115_CTRL5_INT_CFG_DRDY BIT(7)
59
+
60
+
static const unsigned int mpl3115_samp_freq_table[][2] = {
61
+
{ 1, 0 },
62
+
{ 0, 500000 },
63
+
{ 0, 250000 },
64
+
{ 0, 125000 },
65
+
{ 0, 62500 },
66
+
{ 0, 31250 },
67
+
{ 0, 15625 },
68
+
{ 0, 7812 },
69
+
{ 0, 3906 },
70
+
{ 0, 1953 },
71
+
{ 0, 976 },
72
+
{ 0, 488 },
73
+
{ 0, 244 },
74
+
{ 0, 122 },
75
+
{ 0, 61 },
76
+
{ 0, 30 },
77
+
};
59
78
60
79
struct mpl3115_data {
61
80
struct i2c_client *client;
···
193
170
default:
194
171
return -EINVAL;
195
172
}
173
+
case IIO_CHAN_INFO_SAMP_FREQ:
174
+
ret = i2c_smbus_read_byte_data(data->client, MPL3115_CTRL_REG2);
175
+
if (ret < 0)
176
+
return ret;
177
+
178
+
ret = FIELD_GET(MPL3115_CTRL2_ST, ret);
179
+
180
+
*val = mpl3115_samp_freq_table[ret][0];
181
+
*val2 = mpl3115_samp_freq_table[ret][1];
182
+
return IIO_VAL_INT_PLUS_MICRO;
196
183
}
197
184
return -EINVAL;
185
+
}
186
+
187
+
static int mpl3115_read_avail(struct iio_dev *indio_dev,
188
+
struct iio_chan_spec const *chan,
189
+
const int **vals, int *type, int *length,
190
+
long mask)
191
+
{
192
+
if (mask != IIO_CHAN_INFO_SAMP_FREQ)
193
+
return -EINVAL;
194
+
195
+
*type = IIO_VAL_INT_PLUS_MICRO;
196
+
*length = ARRAY_SIZE(mpl3115_samp_freq_table) * 2;
197
+
*vals = (int *)mpl3115_samp_freq_table;
198
+
return IIO_AVAIL_LIST;
199
+
}
200
+
201
+
static int mpl3115_write_raw(struct iio_dev *indio_dev,
202
+
const struct iio_chan_spec *chan,
203
+
int val, int val2, long mask)
204
+
{
205
+
struct mpl3115_data *data = iio_priv(indio_dev);
206
+
int i, ret;
207
+
208
+
if (mask != IIO_CHAN_INFO_SAMP_FREQ)
209
+
return -EINVAL;
210
+
211
+
for (i = 0; i < ARRAY_SIZE(mpl3115_samp_freq_table); i++)
212
+
if (val == mpl3115_samp_freq_table[i][0] &&
213
+
val2 == mpl3115_samp_freq_table[i][1])
214
+
break;
215
+
216
+
if (i == ARRAY_SIZE(mpl3115_samp_freq_table))
217
+
return -EINVAL;
218
+
219
+
if (!iio_device_claim_direct(indio_dev))
220
+
return -EBUSY;
221
+
222
+
ret = i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG2,
223
+
FIELD_PREP(MPL3115_CTRL2_ST, i));
224
+
iio_device_release_direct(indio_dev);
225
+
return ret;
198
226
}
199
227
200
228
static int mpl3115_fill_trig_buffer(struct iio_dev *indio_dev, u8 *buffer)
···
311
237
.type = IIO_PRESSURE,
312
238
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
313
239
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
240
+
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
241
+
.info_mask_shared_by_all_available =
242
+
BIT(IIO_CHAN_INFO_SAMP_FREQ),
314
243
.scan_index = 0,
315
244
.scan_type = {
316
245
.sign = 'u',
···
327
250
.type = IIO_TEMP,
328
251
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
329
252
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
253
+
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
254
+
.info_mask_shared_by_all_available =
255
+
BIT(IIO_CHAN_INFO_SAMP_FREQ),
330
256
.scan_index = 1,
331
257
.scan_type = {
332
258
.sign = 's',
···
408
328
409
329
static const struct iio_info mpl3115_info = {
410
330
.read_raw = &mpl3115_read_raw,
331
+
.read_avail = &mpl3115_read_avail,
332
+
.write_raw = &mpl3115_write_raw,
411
333
};
412
334
413
335
static int mpl3115_trigger_probe(struct mpl3115_data *data,