Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
riscv: Add xmipsexectl instructions
Add xmipsexectl instruction opcodes. This includes the MIPS.PAUSE,
MIPS.EHB, and MIPS.IHB instructions.
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-3-a6cbbe1c3412@htecgroup.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
authored by
Aleksa Paunovic
and committed by
Paul Walmsley
1d4ce63e
a8fed1bc
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+19
arch/riscv/include/asm/vendor_extensions/mips.h
+19
arch/riscv/include/asm/vendor_extensions/mips.h
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extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_mips;
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#endif
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/* Extension specific instructions */
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/*
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* All of the xmipsexectl extension instructions are
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* ‘hint’ encodings of the SLLI instruction,
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* with rd = 0, rs1 = 0 and imm = 1 for IHB, imm = 3 for EHB,
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* and imm = 5 for PAUSE.
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* MIPS.PAUSE is an alternative opcode which is implemented to have the
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* same behavior as PAUSE on some MIPS RISCV cores.
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* MIPS.EHB clears all execution hazards before allowing
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* any subsequent instructions to execute.
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* MIPS.IHB clears all instruction hazards before
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* allowing any subsequent instructions to fetch.
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*/
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#define MIPS_PAUSE ".4byte 0x00501013\n\t"
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#define MIPS_EHB ".4byte 0x00301013\n\t"
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#define MIPS_IHB ".4byte 0x00101013\n\t"
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#endif // _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H