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clk: qcom: rpmh: add clocks for SM8650

Add RPMH Clocks for the SM8650 platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-11-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Neil Armstrong and committed by
Bjorn Andersson 1d506073 8676fd4f

+34
+34
drivers/clk/qcom/clk-rpmh.c
··· 372 372 DEFINE_CLK_RPMH_VRM(clk4, _a1, "clka4", 1); 373 373 DEFINE_CLK_RPMH_VRM(clk5, _a1, "clka5", 1); 374 374 375 + DEFINE_CLK_RPMH_VRM(clk4, _a2, "clka4", 2); 376 + DEFINE_CLK_RPMH_VRM(clk5, _a2, "clka5", 2); 375 377 DEFINE_CLK_RPMH_VRM(clk6, _a2, "clka6", 2); 376 378 DEFINE_CLK_RPMH_VRM(clk7, _a2, "clka7", 2); 377 379 DEFINE_CLK_RPMH_VRM(clk8, _a2, "clka8", 2); ··· 632 630 .num_clks = ARRAY_SIZE(sm8550_rpmh_clocks), 633 631 }; 634 632 633 + static struct clk_hw *sm8650_rpmh_clocks[] = { 634 + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 635 + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 636 + [RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw, 637 + [RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw, 638 + [RPMH_LN_BB_CLK2] = &clk_rpmh_clk7_a2.hw, 639 + [RPMH_LN_BB_CLK2_A] = &clk_rpmh_clk7_a2_ao.hw, 640 + [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw, 641 + [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw, 642 + [RPMH_RF_CLK1] = &clk_rpmh_clk1_a1.hw, 643 + [RPMH_RF_CLK1_A] = &clk_rpmh_clk1_a1_ao.hw, 644 + [RPMH_RF_CLK2] = &clk_rpmh_clk2_a1.hw, 645 + [RPMH_RF_CLK2_A] = &clk_rpmh_clk2_a1_ao.hw, 646 + /* 647 + * The clka3 RPMh resource is missing in cmd-db 648 + * for current platforms, while the clka3 exists 649 + * on the PMK8550, the clock is unconnected and 650 + * unused. 651 + */ 652 + [RPMH_RF_CLK4] = &clk_rpmh_clk4_a2.hw, 653 + [RPMH_RF_CLK4_A] = &clk_rpmh_clk4_a2_ao.hw, 654 + [RPMH_RF_CLK5] = &clk_rpmh_clk5_a2.hw, 655 + [RPMH_RF_CLK5_A] = &clk_rpmh_clk5_a2_ao.hw, 656 + [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 657 + }; 658 + 659 + static const struct clk_rpmh_desc clk_rpmh_sm8650 = { 660 + .clks = sm8650_rpmh_clocks, 661 + .num_clks = ARRAY_SIZE(sm8650_rpmh_clocks), 662 + }; 663 + 635 664 static struct clk_hw *sc7280_rpmh_clocks[] = { 636 665 [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div4.hw, 637 666 [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div4_ao.hw, ··· 870 837 { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350}, 871 838 { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, 872 839 { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, 840 + { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650}, 873 841 { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, 874 842 { } 875 843 };