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clk: renesas: rzg2l: Drop MSTOP based power domain support

Since the configuration order between the individual MSTOP and CLKON
bits cannot be preserved with the power domain abstraction, drop the
power domain core code.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20250527112403.1254122-7-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Claudiu Beznea and committed by
Geert Uytterhoeven 26a301a2 c4969595

+17 -242
+17 -191
drivers/clk/renesas/rzg2l-cpg.c
··· 148 148 * @num_resets: Number of Module Resets in info->resets[] 149 149 * @last_dt_core_clk: ID of the last Core Clock exported to DT 150 150 * @info: Pointer to platform data 151 + * @genpd: PM domain 151 152 * @mux_dsi_div_params: pll5 mux and dsi div parameters 152 153 */ 153 154 struct rzg2l_cpg_priv { ··· 164 163 unsigned int last_dt_core_clk; 165 164 166 165 const struct rzg2l_cpg_info *info; 166 + 167 + struct generic_pm_domain genpd; 167 168 168 169 struct rzg2l_pll5_mux_dsi_div_param mux_dsi_div_params; 169 170 }; ··· 1766 1763 return devm_reset_controller_register(priv->dev, &priv->rcdev); 1767 1764 } 1768 1765 1769 - /** 1770 - * struct rzg2l_cpg_pm_domains - RZ/G2L PM domains data structure 1771 - * @onecell_data: cell data 1772 - * @domains: generic PM domains 1773 - */ 1774 - struct rzg2l_cpg_pm_domains { 1775 - struct genpd_onecell_data onecell_data; 1776 - struct generic_pm_domain *domains[]; 1777 - }; 1778 - 1779 - /** 1780 - * struct rzg2l_cpg_pd - RZ/G2L power domain data structure 1781 - * @genpd: generic PM domain 1782 - * @priv: pointer to CPG private data structure 1783 - * @conf: CPG PM domain configuration info 1784 - * @id: RZ/G2L power domain ID 1785 - */ 1786 - struct rzg2l_cpg_pd { 1787 - struct generic_pm_domain genpd; 1788 - struct rzg2l_cpg_priv *priv; 1789 - struct rzg2l_cpg_pm_domain_conf conf; 1790 - u16 id; 1791 - }; 1792 - 1793 - static bool rzg2l_cpg_is_pm_clk(struct rzg2l_cpg_pd *pd, 1766 + static bool rzg2l_cpg_is_pm_clk(struct rzg2l_cpg_priv *priv, 1794 1767 const struct of_phandle_args *clkspec) 1795 1768 { 1796 - if (clkspec->np != pd->genpd.dev.of_node || clkspec->args_count != 2) 1769 + if (clkspec->np != priv->genpd.dev.of_node || clkspec->args_count != 2) 1797 1770 return false; 1798 1771 1799 1772 switch (clkspec->args[0]) { 1800 1773 case CPG_MOD: { 1801 - struct rzg2l_cpg_priv *priv = pd->priv; 1802 1774 const struct rzg2l_cpg_info *info = priv->info; 1803 1775 unsigned int id = clkspec->args[1]; 1804 1776 ··· 1798 1820 1799 1821 static int rzg2l_cpg_attach_dev(struct generic_pm_domain *domain, struct device *dev) 1800 1822 { 1801 - struct rzg2l_cpg_pd *pd = container_of(domain, struct rzg2l_cpg_pd, genpd); 1823 + struct rzg2l_cpg_priv *priv = container_of(domain, struct rzg2l_cpg_priv, genpd); 1802 1824 struct device_node *np = dev->of_node; 1803 1825 struct of_phandle_args clkspec; 1804 1826 bool once = true; ··· 1807 1829 int error; 1808 1830 1809 1831 for (i = 0; !of_parse_phandle_with_args(np, "clocks", "#clock-cells", i, &clkspec); i++) { 1810 - if (!rzg2l_cpg_is_pm_clk(pd, &clkspec)) { 1832 + if (!rzg2l_cpg_is_pm_clk(priv, &clkspec)) { 1811 1833 of_node_put(clkspec.np); 1812 1834 continue; 1813 1835 } ··· 1853 1875 1854 1876 static void rzg2l_cpg_genpd_remove(void *data) 1855 1877 { 1856 - struct genpd_onecell_data *celldata = data; 1857 - 1858 - for (unsigned int i = 0; i < celldata->num_domains; i++) 1859 - pm_genpd_remove(celldata->domains[i]); 1860 - } 1861 - 1862 - static void rzg2l_cpg_genpd_remove_simple(void *data) 1863 - { 1864 1878 pm_genpd_remove(data); 1865 - } 1866 - 1867 - static int rzg2l_cpg_power_on(struct generic_pm_domain *domain) 1868 - { 1869 - struct rzg2l_cpg_pd *pd = container_of(domain, struct rzg2l_cpg_pd, genpd); 1870 - struct rzg2l_cpg_reg_conf mstop = pd->conf.mstop; 1871 - struct rzg2l_cpg_priv *priv = pd->priv; 1872 - 1873 - /* Set MSTOP. */ 1874 - if (mstop.mask) 1875 - writel(mstop.mask << 16, priv->base + mstop.off); 1876 - 1877 - return 0; 1878 - } 1879 - 1880 - static int rzg2l_cpg_power_off(struct generic_pm_domain *domain) 1881 - { 1882 - struct rzg2l_cpg_pd *pd = container_of(domain, struct rzg2l_cpg_pd, genpd); 1883 - struct rzg2l_cpg_reg_conf mstop = pd->conf.mstop; 1884 - struct rzg2l_cpg_priv *priv = pd->priv; 1885 - 1886 - /* Set MSTOP. */ 1887 - if (mstop.mask) 1888 - writel(mstop.mask | (mstop.mask << 16), priv->base + mstop.off); 1889 - 1890 - return 0; 1891 - } 1892 - 1893 - static int __init rzg2l_cpg_pd_setup(struct rzg2l_cpg_pd *pd) 1894 - { 1895 - bool always_on = !!(pd->genpd.flags & GENPD_FLAG_ALWAYS_ON); 1896 - struct dev_power_governor *governor; 1897 - int ret; 1898 - 1899 - if (always_on) 1900 - governor = &pm_domain_always_on_gov; 1901 - else 1902 - governor = &simple_qos_governor; 1903 - 1904 - pd->genpd.flags |= GENPD_FLAG_PM_CLK | GENPD_FLAG_ACTIVE_WAKEUP; 1905 - pd->genpd.attach_dev = rzg2l_cpg_attach_dev; 1906 - pd->genpd.detach_dev = rzg2l_cpg_detach_dev; 1907 - pd->genpd.power_on = rzg2l_cpg_power_on; 1908 - pd->genpd.power_off = rzg2l_cpg_power_off; 1909 - 1910 - ret = pm_genpd_init(&pd->genpd, governor, !always_on); 1911 - if (ret) 1912 - return ret; 1913 - 1914 - if (always_on) 1915 - ret = rzg2l_cpg_power_on(&pd->genpd); 1916 - 1917 - return ret; 1918 1879 } 1919 1880 1920 1881 static int __init rzg2l_cpg_add_clk_domain(struct rzg2l_cpg_priv *priv) 1921 1882 { 1922 1883 struct device *dev = priv->dev; 1923 1884 struct device_node *np = dev->of_node; 1924 - struct rzg2l_cpg_pd *pd; 1885 + struct generic_pm_domain *genpd = &priv->genpd; 1925 1886 int ret; 1926 1887 1927 - pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); 1928 - if (!pd) 1929 - return -ENOMEM; 1930 - 1931 - pd->genpd.name = np->name; 1932 - pd->genpd.flags = GENPD_FLAG_ALWAYS_ON; 1933 - pd->priv = priv; 1934 - ret = rzg2l_cpg_pd_setup(pd); 1888 + genpd->name = np->name; 1889 + genpd->flags = GENPD_FLAG_PM_CLK | GENPD_FLAG_ALWAYS_ON | 1890 + GENPD_FLAG_ACTIVE_WAKEUP; 1891 + genpd->attach_dev = rzg2l_cpg_attach_dev; 1892 + genpd->detach_dev = rzg2l_cpg_detach_dev; 1893 + ret = pm_genpd_init(genpd, &pm_domain_always_on_gov, false); 1935 1894 if (ret) 1936 1895 return ret; 1937 1896 1938 - ret = devm_add_action_or_reset(dev, rzg2l_cpg_genpd_remove_simple, &pd->genpd); 1897 + ret = devm_add_action_or_reset(dev, rzg2l_cpg_genpd_remove, genpd); 1939 1898 if (ret) 1940 1899 return ret; 1941 1900 1942 - return of_genpd_add_provider_simple(np, &pd->genpd); 1943 - } 1944 - 1945 - static struct generic_pm_domain * 1946 - rzg2l_cpg_pm_domain_xlate(const struct of_phandle_args *spec, void *data) 1947 - { 1948 - struct generic_pm_domain *domain = ERR_PTR(-ENOENT); 1949 - struct genpd_onecell_data *genpd = data; 1950 - 1951 - if (spec->args_count != 1) 1952 - return ERR_PTR(-EINVAL); 1953 - 1954 - for (unsigned int i = 0; i < genpd->num_domains; i++) { 1955 - struct rzg2l_cpg_pd *pd = container_of(genpd->domains[i], struct rzg2l_cpg_pd, 1956 - genpd); 1957 - 1958 - if (pd->id == spec->args[0]) { 1959 - domain = &pd->genpd; 1960 - break; 1961 - } 1962 - } 1963 - 1964 - return domain; 1965 - } 1966 - 1967 - static int __init rzg2l_cpg_add_pm_domains(struct rzg2l_cpg_priv *priv) 1968 - { 1969 - const struct rzg2l_cpg_info *info = priv->info; 1970 - struct device *dev = priv->dev; 1971 - struct device_node *np = dev->of_node; 1972 - struct rzg2l_cpg_pm_domains *domains; 1973 - struct generic_pm_domain *parent; 1974 - u32 ncells; 1975 - int ret; 1976 - 1977 - ret = of_property_read_u32(np, "#power-domain-cells", &ncells); 1978 - if (ret) 1979 - return ret; 1980 - 1981 - /* For backward compatibility. */ 1982 - if (!ncells) 1983 - return rzg2l_cpg_add_clk_domain(priv); 1984 - 1985 - domains = devm_kzalloc(dev, struct_size(domains, domains, info->num_pm_domains), 1986 - GFP_KERNEL); 1987 - if (!domains) 1988 - return -ENOMEM; 1989 - 1990 - domains->onecell_data.domains = domains->domains; 1991 - domains->onecell_data.num_domains = info->num_pm_domains; 1992 - domains->onecell_data.xlate = rzg2l_cpg_pm_domain_xlate; 1993 - 1994 - ret = devm_add_action_or_reset(dev, rzg2l_cpg_genpd_remove, &domains->onecell_data); 1995 - if (ret) 1996 - return ret; 1997 - 1998 - for (unsigned int i = 0; i < info->num_pm_domains; i++) { 1999 - struct rzg2l_cpg_pd *pd; 2000 - 2001 - pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); 2002 - if (!pd) 2003 - return -ENOMEM; 2004 - 2005 - pd->genpd.name = info->pm_domains[i].name; 2006 - pd->genpd.flags = info->pm_domains[i].genpd_flags; 2007 - pd->conf = info->pm_domains[i].conf; 2008 - pd->id = info->pm_domains[i].id; 2009 - pd->priv = priv; 2010 - 2011 - ret = rzg2l_cpg_pd_setup(pd); 2012 - if (ret) 2013 - return ret; 2014 - 2015 - domains->domains[i] = &pd->genpd; 2016 - /* Parent should be on the very first entry of info->pm_domains[]. */ 2017 - if (!i) { 2018 - parent = &pd->genpd; 2019 - continue; 2020 - } 2021 - 2022 - ret = pm_genpd_add_subdomain(parent, &pd->genpd); 2023 - if (ret) 2024 - return ret; 2025 - } 2026 - 2027 - ret = of_genpd_add_provider_onecell(np, &domains->onecell_data); 2028 - if (ret) 2029 - return ret; 2030 - 2031 - return 0; 1901 + return of_genpd_add_provider_simple(np, genpd); 2032 1902 } 2033 1903 2034 1904 static int __init rzg2l_cpg_probe(struct platform_device *pdev) ··· 1939 2113 if (error) 1940 2114 return error; 1941 2115 1942 - error = rzg2l_cpg_add_pm_domains(priv); 2116 + error = rzg2l_cpg_add_clk_domain(priv); 1943 2117 if (error) 1944 2118 return error; 1945 2119
-51
drivers/clk/renesas/rzg2l-cpg.h
··· 258 258 DEF_RST_MON(_id, _off, _bit, -1) 259 259 260 260 /** 261 - * struct rzg2l_cpg_reg_conf - RZ/G2L register configuration data structure 262 - * @off: register offset 263 - * @mask: register mask 264 - */ 265 - struct rzg2l_cpg_reg_conf { 266 - u16 off; 267 - u16 mask; 268 - }; 269 - 270 - #define DEF_REG_CONF(_off, _mask) ((struct rzg2l_cpg_reg_conf) { .off = (_off), .mask = (_mask) }) 271 - 272 - /** 273 - * struct rzg2l_cpg_pm_domain_conf - PM domain configuration data structure 274 - * @mstop: MSTOP register configuration 275 - */ 276 - struct rzg2l_cpg_pm_domain_conf { 277 - struct rzg2l_cpg_reg_conf mstop; 278 - }; 279 - 280 - /** 281 - * struct rzg2l_cpg_pm_domain_init_data - PM domain init data 282 - * @name: PM domain name 283 - * @conf: PM domain configuration 284 - * @genpd_flags: genpd flags (see GENPD_FLAG_*) 285 - * @id: PM domain ID (similar to the ones defined in 286 - * include/dt-bindings/clock/<soc-id>-cpg.h) 287 - */ 288 - struct rzg2l_cpg_pm_domain_init_data { 289 - const char * const name; 290 - struct rzg2l_cpg_pm_domain_conf conf; 291 - u32 genpd_flags; 292 - u16 id; 293 - }; 294 - 295 - #define DEF_PD(_name, _id, _mstop_conf, _flags) \ 296 - { \ 297 - .name = (_name), \ 298 - .id = (_id), \ 299 - .conf = { \ 300 - .mstop = (_mstop_conf), \ 301 - }, \ 302 - .genpd_flags = (_flags), \ 303 - } 304 - 305 - /** 306 261 * struct rzg2l_cpg_info - SoC-specific CPG Description 307 262 * 308 263 * @core_clks: Array of Core Clock definitions ··· 275 320 * @crit_mod_clks: Array with Module Clock IDs of critical clocks that 276 321 * should not be disabled without a knowledgeable driver 277 322 * @num_crit_mod_clks: Number of entries in crit_mod_clks[] 278 - * @pm_domains: PM domains init data array 279 - * @num_pm_domains: Number of PM domains 280 323 * @has_clk_mon_regs: Flag indicating whether the SoC has CLK_MON registers 281 324 */ 282 325 struct rzg2l_cpg_info { ··· 300 347 /* Critical Module Clocks that should not be disabled */ 301 348 const unsigned int *crit_mod_clks; 302 349 unsigned int num_crit_mod_clks; 303 - 304 - /* Power domain. */ 305 - const struct rzg2l_cpg_pm_domain_init_data *pm_domains; 306 - unsigned int num_pm_domains; 307 350 308 351 bool has_clk_mon_regs; 309 352 };