Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: qcom: camss: add support for SM6150 camss
The camera subsystem for SM6150 which is based on Spectra 230.
For SM6150:
- VFE and CSID version: 170 (vfe170, csid170)
- CSIPHY version: csiphy-v2.0.1 (14nm)
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
authored by
Wenmeng Liu
and committed by
Hans Verkuil
2759816f
c88c5441
+203
+2
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+2
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
···
1010
1010
1011
1011
switch (version) {
1012
1012
case CAMSS_2290:
1013
+
case CAMSS_6150:
1013
1014
case CAMSS_7280:
1014
1015
case CAMSS_8250:
1015
1016
case CAMSS_8280XP:
···
1101
1100
regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845);
1102
1101
break;
1103
1102
case CAMSS_2290:
1103
+
case CAMSS_6150:
1104
1104
regs->lane_regs = &lane_regs_qcm2290[0];
1105
1105
regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290);
1106
1106
break;
+2
drivers/media/platform/qcom/camss/camss-vfe.c
+2
drivers/media/platform/qcom/camss/camss-vfe.c
···
342
342
break;
343
343
case CAMSS_660:
344
344
case CAMSS_2290:
345
+
case CAMSS_6150:
345
346
case CAMSS_7280:
346
347
case CAMSS_8x96:
347
348
case CAMSS_8250:
···
2002
2001
int ret = 8;
2003
2002
2004
2003
switch (vfe->camss->res->version) {
2004
+
case CAMSS_6150:
2005
2005
case CAMSS_7280:
2006
2006
case CAMSS_8250:
2007
2007
case CAMSS_8280XP:
+198
drivers/media/platform/qcom/camss/camss.c
+198
drivers/media/platform/qcom/camss/camss.c
···
1519
1519
}
1520
1520
};
1521
1521
1522
+
static const struct camss_subdev_resources csiphy_res_sm6150[] = {
1523
+
/* CSIPHY0 */
1524
+
{
1525
+
.regulators = {
1526
+
{ .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
1527
+
{ .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
1528
+
},
1529
+
.clock = { "csiphy0", "csiphy0_timer" },
1530
+
.clock_rate = { { 269333333, 384000000 },
1531
+
{ 269333333 } },
1532
+
.reg = { "csiphy0" },
1533
+
.interrupt = { "csiphy0" },
1534
+
.csiphy = {
1535
+
.id = 0,
1536
+
.hw_ops = &csiphy_ops_3ph_1_0,
1537
+
.formats = &csiphy_formats_sdm845
1538
+
}
1539
+
},
1540
+
/* CSIPHY1 */
1541
+
{
1542
+
.regulators = {
1543
+
{ .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
1544
+
{ .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
1545
+
},
1546
+
.clock = { "csiphy1", "csiphy1_timer" },
1547
+
.clock_rate = { { 269333333, 384000000 },
1548
+
{ 269333333 } },
1549
+
.reg = { "csiphy1" },
1550
+
.interrupt = { "csiphy1" },
1551
+
.csiphy = {
1552
+
.id = 1,
1553
+
.hw_ops = &csiphy_ops_3ph_1_0,
1554
+
.formats = &csiphy_formats_sdm845
1555
+
}
1556
+
},
1557
+
/* CSIPHY2 */
1558
+
{
1559
+
.regulators = {
1560
+
{ .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
1561
+
{ .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
1562
+
},
1563
+
.clock = { "csiphy2", "csiphy2_timer" },
1564
+
.clock_rate = { { 269333333, 384000000 },
1565
+
{ 269333333 } },
1566
+
.reg = { "csiphy2" },
1567
+
.interrupt = { "csiphy2" },
1568
+
.csiphy = {
1569
+
.id = 2,
1570
+
.hw_ops = &csiphy_ops_3ph_1_0,
1571
+
.formats = &csiphy_formats_sdm845
1572
+
}
1573
+
},
1574
+
};
1575
+
1576
+
static const struct camss_subdev_resources csid_res_sm6150[] = {
1577
+
/* CSID0 */
1578
+
{
1579
+
.regulators = {},
1580
+
.clock = { "vfe0_cphy_rx", "vfe0_csid" },
1581
+
.clock_rate = { { 269333333, 384000000 },
1582
+
{ 320000000, 540000000 } },
1583
+
.reg = { "csid0" },
1584
+
.interrupt = { "csid0" },
1585
+
.csid = {
1586
+
.is_lite = false,
1587
+
.hw_ops = &csid_ops_gen2,
1588
+
.parent_dev_ops = &vfe_parent_dev_ops,
1589
+
.formats = &csid_formats_gen2
1590
+
}
1591
+
},
1592
+
/* CSID1 */
1593
+
{
1594
+
.regulators = {},
1595
+
.clock = { "vfe1_cphy_rx", "vfe1_csid" },
1596
+
.clock_rate = { { 269333333, 384000000 },
1597
+
{ 320000000, 540000000 } },
1598
+
.reg = { "csid1" },
1599
+
.interrupt = { "csid1" },
1600
+
.csid = {
1601
+
.is_lite = false,
1602
+
.hw_ops = &csid_ops_gen2,
1603
+
.parent_dev_ops = &vfe_parent_dev_ops,
1604
+
.formats = &csid_formats_gen2
1605
+
}
1606
+
},
1607
+
/* CSID2 */
1608
+
{
1609
+
.regulators = {},
1610
+
.clock = { "vfe_lite_cphy_rx", "vfe_lite_csid" },
1611
+
.clock_rate = { { 269333333, 384000000 },
1612
+
{ 320000000, 540000000 } },
1613
+
.reg = { "csid_lite" },
1614
+
.interrupt = { "csid_lite" },
1615
+
.csid = {
1616
+
.is_lite = true,
1617
+
.hw_ops = &csid_ops_gen2,
1618
+
.parent_dev_ops = &vfe_parent_dev_ops,
1619
+
.formats = &csid_formats_gen2
1620
+
}
1621
+
},
1622
+
};
1623
+
1624
+
static const struct camss_subdev_resources vfe_res_sm6150[] = {
1625
+
/* VFE0 */
1626
+
{
1627
+
.regulators = {},
1628
+
.clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",
1629
+
"vfe0", "vfe0_axi"},
1630
+
.clock_rate = { { 0 },
1631
+
{ 0 },
1632
+
{ 80000000 },
1633
+
{ 37500000, 40000000 },
1634
+
{ 360000000, 432000000, 540000000, 600000000 },
1635
+
{ 265000000, 426000000 } },
1636
+
.reg = { "vfe0" },
1637
+
.interrupt = { "vfe0" },
1638
+
.vfe = {
1639
+
.line_num = 3,
1640
+
.is_lite = false,
1641
+
.has_pd = true,
1642
+
.pd_name = "ife0",
1643
+
.hw_ops = &vfe_ops_170,
1644
+
.formats_rdi = &vfe_formats_rdi_845,
1645
+
.formats_pix = &vfe_formats_pix_845
1646
+
}
1647
+
},
1648
+
/* VFE1 */
1649
+
{
1650
+
.regulators = {},
1651
+
.clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",
1652
+
"vfe1", "vfe1_axi"},
1653
+
.clock_rate = { { 0 },
1654
+
{ 0 },
1655
+
{ 80000000 },
1656
+
{ 37500000, 40000000 },
1657
+
{ 360000000, 432000000, 540000000, 600000000 },
1658
+
{ 265000000, 426000000 } },
1659
+
.reg = { "vfe1" },
1660
+
.interrupt = { "vfe1" },
1661
+
.vfe = {
1662
+
.line_num = 3,
1663
+
.is_lite = false,
1664
+
.has_pd = true,
1665
+
.pd_name = "ife1",
1666
+
.hw_ops = &vfe_ops_170,
1667
+
.formats_rdi = &vfe_formats_rdi_845,
1668
+
.formats_pix = &vfe_formats_pix_845
1669
+
}
1670
+
},
1671
+
/* VFE2 */
1672
+
{
1673
+
.regulators = {},
1674
+
.clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",
1675
+
"vfe_lite" },
1676
+
.clock_rate = { { 0 },
1677
+
{ 0 },
1678
+
{ 80000000 },
1679
+
{ 37500000, 40000000 },
1680
+
{ 360000000, 432000000, 540000000, 600000000 } },
1681
+
.reg = { "vfe_lite" },
1682
+
.interrupt = { "vfe_lite" },
1683
+
.vfe = {
1684
+
.line_num = 4,
1685
+
.is_lite = true,
1686
+
.hw_ops = &vfe_ops_170,
1687
+
.formats_rdi = &vfe_formats_rdi_845,
1688
+
.formats_pix = &vfe_formats_pix_845
1689
+
}
1690
+
},
1691
+
};
1692
+
1693
+
static const struct resources_icc icc_res_sm6150[] = {
1694
+
{
1695
+
.name = "ahb",
1696
+
.icc_bw_tbl.avg = 38400,
1697
+
.icc_bw_tbl.peak = 76800,
1698
+
},
1699
+
{
1700
+
.name = "hf_0",
1701
+
.icc_bw_tbl.avg = 2097152,
1702
+
.icc_bw_tbl.peak = 2097152,
1703
+
},
1704
+
};
1705
+
1522
1706
static const struct camss_subdev_resources csiphy_res_8250[] = {
1523
1707
/* CSIPHY0 */
1524
1708
{
···
5220
5036
.vfe_num = ARRAY_SIZE(vfe_res_845),
5221
5037
};
5222
5038
5039
+
static const struct camss_resources sm6150_resources = {
5040
+
.version = CAMSS_6150,
5041
+
.pd_name = "top",
5042
+
.csiphy_res = csiphy_res_sm6150,
5043
+
.csid_res = csid_res_sm6150,
5044
+
.vfe_res = vfe_res_sm6150,
5045
+
.icc_res = icc_res_sm6150,
5046
+
.icc_path_num = ARRAY_SIZE(icc_res_sm6150),
5047
+
.csiphy_num = ARRAY_SIZE(csiphy_res_sm6150),
5048
+
.csid_num = ARRAY_SIZE(csid_res_sm6150),
5049
+
.vfe_num = ARRAY_SIZE(vfe_res_sm6150),
5050
+
};
5051
+
5223
5052
static const struct camss_resources sm8250_resources = {
5224
5053
.version = CAMSS_8250,
5225
5054
.pd_name = "top",
···
5328
5131
{ .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },
5329
5132
{ .compatible = "qcom,sdm670-camss", .data = &sdm670_resources },
5330
5133
{ .compatible = "qcom,sdm845-camss", .data = &sdm845_resources },
5134
+
{ .compatible = "qcom,sm6150-camss", .data = &sm6150_resources },
5331
5135
{ .compatible = "qcom,sm8250-camss", .data = &sm8250_resources },
5332
5136
{ .compatible = "qcom,sm8550-camss", .data = &sm8550_resources },
5333
5137
{ .compatible = "qcom,sm8650-camss", .data = &sm8650_resources },