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Merge tag 'powerpc-4.8-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
"Fixes marked for stable:
- Don't alias user region to other regions below PAGE_OFFSET from
Paul Mackerras
- Fix again csum_partial_copy_generic() on 32-bit from Christophe
Leroy
- Fix corrupted PE allocation bitmap on releasing PE from Gavin Shan

Fixes for code merged this cycle:
- Fix crash on releasing compound PE from Gavin Shan
- Fix processor numbers in OPAL ICP from Benjamin Herrenschmidt
- Fix little endian build with CONFIG_KEXEC=n from Thiago Jung
Bauermann"

* tag 'powerpc-4.8-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm: Don't alias user region to other regions below PAGE_OFFSET
powerpc/32: Fix again csum_partial_copy_generic()
powerpc/powernv: Fix corrupted PE allocation bitmap on releasing PE
powerpc/powernv: Fix crash on releasing compound PE
powerpc/xics/opal: Fix processor numbers in OPAL ICP
powerpc/pseries: Fix little endian build with CONFIG_KEXEC=n

+29 -17
+4 -3
arch/powerpc/lib/checksum_32.S
··· 127 127 stw r7,12(r1) 128 128 stw r8,8(r1) 129 129 130 - rlwinm r0,r4,3,0x8 131 - rlwnm r6,r6,r0,0,31 /* odd destination address: rotate one byte */ 132 - cmplwi cr7,r0,0 /* is destination address even ? */ 133 130 addic r12,r6,0 134 131 addi r6,r4,-4 135 132 neg r0,r4 136 133 addi r4,r3,-4 137 134 andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */ 135 + crset 4*cr7+eq 138 136 beq 58f 139 137 140 138 cmplw 0,r5,r0 /* is this more than total to do? */ 141 139 blt 63f /* if not much to do */ 140 + rlwinm r7,r6,3,0x8 141 + rlwnm r12,r12,r7,0,31 /* odd destination address: rotate one byte */ 142 + cmplwi cr7,r7,0 /* is destination address even ? */ 142 143 andi. r8,r0,3 /* get it word-aligned first */ 143 144 mtctr r8 144 145 beq+ 61f
+6 -1
arch/powerpc/mm/slb_low.S
··· 113 113 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT) 114 114 b slb_finish_load_1T 115 115 116 - 0: 116 + 0: /* 117 + * For userspace addresses, make sure this is region 0. 118 + */ 119 + cmpdi r9, 0 120 + bne 8f 121 + 117 122 /* when using slices, we extract the psize off the slice bitmaps 118 123 * and then we need to get the sllp encoding off the mmu_psize_defs 119 124 * array.
+11 -7
arch/powerpc/platforms/powernv/pci-ioda.c
··· 162 162 static void pnv_ioda_free_pe(struct pnv_ioda_pe *pe) 163 163 { 164 164 struct pnv_phb *phb = pe->phb; 165 + unsigned int pe_num = pe->pe_number; 165 166 166 167 WARN_ON(pe->pdev); 167 168 168 169 memset(pe, 0, sizeof(struct pnv_ioda_pe)); 169 - clear_bit(pe->pe_number, phb->ioda.pe_alloc); 170 + clear_bit(pe_num, phb->ioda.pe_alloc); 170 171 } 171 172 172 173 /* The default M64 BAR is shared by all PEs */ ··· 3403 3402 struct pnv_phb *phb = pe->phb; 3404 3403 struct pnv_ioda_pe *slave, *tmp; 3405 3404 3406 - /* Release slave PEs in compound PE */ 3407 - if (pe->flags & PNV_IODA_PE_MASTER) { 3408 - list_for_each_entry_safe(slave, tmp, &pe->slaves, list) 3409 - pnv_ioda_release_pe(slave); 3410 - } 3411 - 3412 3405 list_del(&pe->list); 3413 3406 switch (phb->type) { 3414 3407 case PNV_PHB_IODA1: ··· 3417 3422 3418 3423 pnv_ioda_release_pe_seg(pe); 3419 3424 pnv_ioda_deconfigure_pe(pe->phb, pe); 3425 + 3426 + /* Release slave PEs in the compound PE */ 3427 + if (pe->flags & PNV_IODA_PE_MASTER) { 3428 + list_for_each_entry_safe(slave, tmp, &pe->slaves, list) { 3429 + list_del(&slave->list); 3430 + pnv_ioda_free_pe(slave); 3431 + } 3432 + } 3433 + 3420 3434 pnv_ioda_free_pe(pe); 3421 3435 } 3422 3436
+1 -1
arch/powerpc/platforms/pseries/setup.c
··· 41 41 #include <linux/root_dev.h> 42 42 #include <linux/of.h> 43 43 #include <linux/of_pci.h> 44 - #include <linux/kexec.h> 45 44 46 45 #include <asm/mmu.h> 47 46 #include <asm/processor.h> ··· 65 66 #include <asm/eeh.h> 66 67 #include <asm/reg.h> 67 68 #include <asm/plpar_wrappers.h> 69 + #include <asm/kexec.h> 68 70 69 71 #include "pseries.h" 70 72
+7 -5
arch/powerpc/sysdev/xics/icp-opal.c
··· 23 23 24 24 static void icp_opal_teardown_cpu(void) 25 25 { 26 - int cpu = smp_processor_id(); 26 + int hw_cpu = hard_smp_processor_id(); 27 27 28 28 /* Clear any pending IPI */ 29 - opal_int_set_mfrr(cpu, 0xff); 29 + opal_int_set_mfrr(hw_cpu, 0xff); 30 30 } 31 31 32 32 static void icp_opal_flush_ipi(void) ··· 101 101 102 102 static void icp_opal_cause_ipi(int cpu, unsigned long data) 103 103 { 104 - opal_int_set_mfrr(cpu, IPI_PRIORITY); 104 + int hw_cpu = get_hard_smp_processor_id(cpu); 105 + 106 + opal_int_set_mfrr(hw_cpu, IPI_PRIORITY); 105 107 } 106 108 107 109 static irqreturn_t icp_opal_ipi_action(int irq, void *dev_id) 108 110 { 109 - int cpu = smp_processor_id(); 111 + int hw_cpu = hard_smp_processor_id(); 110 112 111 - opal_int_set_mfrr(cpu, 0xff); 113 + opal_int_set_mfrr(hw_cpu, 0xff); 112 114 113 115 return smp_ipi_demux(); 114 116 }