Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/panel: jd9365da: Support for kd101ne3-40ti MIPI-DSI panel
The K&d kd101ne3-40ti is a 10.1" WXGA TFT-LCD panel, use
jd9365da controller,which fits in nicely with the existing
panel-jadard-jd9365da-h3 driver.Hence,we add a new compatible
with panel specific config.
Although they have the same control IC, the two panels are different,
and the timing will be slightly different, so we added some variables
in struct jadard_panel_desc to control the timing.
Signed-off-by: Zhaoxiong Lv <lvzhaoxiong@huaqin.corp-partner.google.com>
Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Link: https://lore.kernel.org/r/20240624141926.5250-5-lvzhaoxiong@huaqin.corp-partner.google.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240624141926.5250-5-lvzhaoxiong@huaqin.corp-partner.google.com
authored by
Zhaoxiong Lv
and committed by
Neil Armstrong
2b976ad7
35583e12
+277
+277
drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
+277
drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
···
27
27
enum mipi_dsi_pixel_format format;
28
28
int (*init)(struct jadard *jadard);
29
29
u32 num_init_cmds;
30
+
bool lp11_before_reset;
31
+
bool reset_before_power_off_vcioo;
32
+
unsigned int vcioo_to_lp11_delay_ms;
33
+
unsigned int lp11_to_reset_delay_ms;
34
+
unsigned int exit_sleep_to_display_on_delay_ms;
35
+
unsigned int display_on_delay_ms;
36
+
unsigned int backlight_off_to_display_off_delay_ms;
37
+
unsigned int display_off_to_enter_sleep_delay_ms;
38
+
unsigned int enter_sleep_to_reset_down_delay_ms;
30
39
};
31
40
32
41
struct jadard {
···
62
53
63
54
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
64
55
56
+
if (jadard->desc->exit_sleep_to_display_on_delay_ms)
57
+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->exit_sleep_to_display_on_delay_ms);
58
+
65
59
mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
60
+
61
+
if (jadard->desc->display_on_delay_ms)
62
+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_on_delay_ms);
66
63
67
64
return dsi_ctx.accum_err;
68
65
}
···
78
63
struct jadard *jadard = panel_to_jadard(panel);
79
64
struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
80
65
66
+
if (jadard->desc->backlight_off_to_display_off_delay_ms)
67
+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->backlight_off_to_display_off_delay_ms);
68
+
81
69
mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
82
70
71
+
if (jadard->desc->display_off_to_enter_sleep_delay_ms)
72
+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_off_to_enter_sleep_delay_ms);
73
+
83
74
mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
75
+
76
+
if (jadard->desc->enter_sleep_to_reset_down_delay_ms)
77
+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->enter_sleep_to_reset_down_delay_ms);
84
78
85
79
return dsi_ctx.accum_err;
86
80
}
···
106
82
ret = regulator_enable(jadard->vdd);
107
83
if (ret)
108
84
return ret;
85
+
86
+
if (jadard->desc->vcioo_to_lp11_delay_ms)
87
+
msleep(jadard->desc->vcioo_to_lp11_delay_ms);
88
+
89
+
if (jadard->desc->lp11_before_reset) {
90
+
ret = mipi_dsi_dcs_nop(jadard->dsi);
91
+
if (ret)
92
+
return ret;
93
+
}
94
+
95
+
if (jadard->desc->lp11_to_reset_delay_ms)
96
+
msleep(jadard->desc->lp11_to_reset_delay_ms);
109
97
110
98
gpiod_set_value(jadard->reset, 1);
111
99
msleep(5);
···
141
105
142
106
gpiod_set_value(jadard->reset, 1);
143
107
msleep(120);
108
+
109
+
if (jadard->desc->reset_before_power_off_vcioo) {
110
+
gpiod_set_value(jadard->reset, 0);
111
+
112
+
usleep_range(1000, 2000);
113
+
}
144
114
145
115
regulator_disable(jadard->vdd);
146
116
regulator_disable(jadard->vccio);
···
611
569
.init = cz101b4001_init_cmds,
612
570
};
613
571
572
+
static int kingdisplay_kd101ne3_init_cmds(struct jadard *jadard)
573
+
{
574
+
struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
575
+
576
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x00);
577
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x93);
578
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0x65);
579
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0xf8);
580
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x03);
581
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x01);
582
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
583
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
584
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xc7);
585
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01);
586
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
587
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xc7);
588
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01);
589
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
590
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
591
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28);
592
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
593
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
594
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12);
595
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e);
596
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
597
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
598
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f);
599
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
600
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0);
601
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
602
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b);
603
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
604
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a);
605
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
606
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e);
607
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a);
608
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15);
609
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
610
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x61);
611
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x50);
612
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x43);
613
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x3f);
614
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x32);
615
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x35);
616
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x1f);
617
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x38);
618
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x36);
619
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x36);
620
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x54);
621
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x42);
622
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x48);
623
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x39);
624
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x34);
625
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x26);
626
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x14);
627
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);
628
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
629
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x61);
630
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x50);
631
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x43);
632
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x3f);
633
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x32);
634
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x35);
635
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x1f);
636
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x38);
637
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x36);
638
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x36);
639
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x54);
640
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x42);
641
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x48);
642
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x39);
643
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x34);
644
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x26);
645
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x14);
646
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02);
647
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x02);
648
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x52);
649
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5f);
650
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5f);
651
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x50);
652
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x77);
653
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x57);
654
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x5f);
655
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4e);
656
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4c);
657
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5f);
658
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x4a);
659
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x48);
660
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x5f);
661
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x46);
662
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x44);
663
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x40);
664
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5f);
665
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x5f);
666
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x5f);
667
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x5f);
668
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x5f);
669
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f);
670
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x53);
671
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5f);
672
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5f);
673
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x51);
674
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x77);
675
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x57);
676
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x5f);
677
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4f);
678
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4d);
679
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x5f);
680
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x4b);
681
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x49);
682
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x5f);
683
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x47);
684
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x45);
685
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x41);
686
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5f);
687
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x5f);
688
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x5f);
689
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x5f);
690
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x5f);
691
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f);
692
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x13);
693
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x1f);
694
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x1f);
695
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x01);
696
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x17);
697
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x17);
698
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1f);
699
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0d);
700
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x0f);
701
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x1f);
702
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x05);
703
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x07);
704
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x1f);
705
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x09);
706
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0b);
707
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x11);
708
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x1f);
709
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x1f);
710
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x1f);
711
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x1f);
712
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x1f);
713
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f);
714
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x12);
715
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1f);
716
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1f);
717
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00);
718
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x17);
719
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x17);
720
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1f);
721
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0c);
722
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x0e);
723
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x1f);
724
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x04);
725
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x06);
726
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x1f);
727
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x08);
728
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x0a);
729
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x10);
730
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x1f);
731
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x1f);
732
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x1f);
733
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x1f);
734
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x1f);
735
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f);
736
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
737
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10);
738
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06);
739
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40);
740
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x00);
741
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00);
742
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x40);
743
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03);
744
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04);
745
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x6c);
746
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6c);
747
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x75);
748
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x08);
749
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xb4);
750
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x08);
751
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x6c);
752
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6c);
753
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x0c);
754
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
755
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00);
756
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
757
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xbb);
758
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
759
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x05);
760
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2a);
761
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x04);
762
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0e);
763
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xb3);
764
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61);
765
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48);
766
+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x00);
767
+
768
+
return dsi_ctx.accum_err;
769
+
};
770
+
771
+
static const struct jadard_panel_desc kingdisplay_kd101ne3_40ti_desc = {
772
+
.mode = {
773
+
.clock = (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,
774
+
775
+
.hdisplay = 800,
776
+
.hsync_start = 800 + 24,
777
+
.hsync_end = 800 + 24 + 24,
778
+
.htotal = 800 + 24 + 24 + 24,
779
+
780
+
.vdisplay = 1280,
781
+
.vsync_start = 1280 + 30,
782
+
.vsync_end = 1280 + 30 + 4,
783
+
.vtotal = 1280 + 30 + 4 + 8,
784
+
785
+
.width_mm = 135,
786
+
.height_mm = 216,
787
+
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
788
+
},
789
+
.lanes = 4,
790
+
.format = MIPI_DSI_FMT_RGB888,
791
+
.init = kingdisplay_kd101ne3_init_cmds,
792
+
.lp11_before_reset = true,
793
+
.reset_before_power_off_vcioo = true,
794
+
.vcioo_to_lp11_delay_ms = 5,
795
+
.lp11_to_reset_delay_ms = 10,
796
+
.exit_sleep_to_display_on_delay_ms = 120,
797
+
.display_on_delay_ms = 20,
798
+
.backlight_off_to_display_off_delay_ms = 100,
799
+
.display_off_to_enter_sleep_delay_ms = 50,
800
+
.enter_sleep_to_reset_down_delay_ms = 100,
801
+
};
802
+
614
803
static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
615
804
{
616
805
struct device *dev = &dsi->dev;
···
909
636
{
910
637
.compatible = "chongzhou,cz101b4001",
911
638
.data = &cz101b4001_desc
639
+
},
640
+
{
641
+
.compatible = "kingdisplay,kd101ne3-40ti",
642
+
.data = &kingdisplay_kd101ne3_40ti_desc
912
643
},
913
644
{
914
645
.compatible = "radxa,display-10hd-ad001",