Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915: split out i915_freq.[ch]
The i915 core only needs three rather specific functions from
soc/intel_dram.[ch]: i9xx_fsb_freq(), ilk_fsb_freq(), and
ilk_mem_freq(). Add new i915_freq.[ch] and duplicate those functions for
i915 to reduce the dependency on soc/ code.
Wile duplication in general is bad, here it's a tradeoff to simplify the
i915, xe and display interactions.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/7bac1b194afdc20cd45e625a0a32fcbcd0b1136e.1763578288.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+130
-5
+1
drivers/gpu/drm/i915/Makefile
+1
drivers/gpu/drm/i915/Makefile
+2
-2
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
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-2
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
···
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*/
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#include "i915_drv.h"
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#include "i915_freq.h"
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#include "i915_reg.h"
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#include "intel_gt.h"
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#include "intel_gt_clock_utils.h"
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#include "intel_gt_print.h"
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#include "intel_gt_regs.h"
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-
#include "soc/intel_dram.h"
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static u32 read_reference_ts_freq(struct intel_uncore *uncore)
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{
···
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*
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* Testing on actual hardware has shown there is no /16.
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*/
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-
return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000;
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return DIV_ROUND_CLOSEST(i9xx_fsb_freq(uncore->i915), 4) * 1000;
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}
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static u32 read_clock_frequency(struct intel_uncore *uncore)
+3
-3
drivers/gpu/drm/i915/gt/intel_rps.c
+3
-3
drivers/gpu/drm/i915/gt/intel_rps.c
···
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#include "display/intel_display_rps.h"
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#include "display/vlv_clock.h"
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-
#include "soc/intel_dram.h"
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#include "i915_drv.h"
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#include "i915_freq.h"
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#include "i915_irq.h"
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#include "i915_reg.h"
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#include "i915_wait_util.h"
···
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u32 rgvmodectl;
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int c_m, i;
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fsb_freq = intel_fsb_freq(i915);
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mem_freq = intel_mem_freq(i915);
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fsb_freq = ilk_fsb_freq(i915);
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mem_freq = ilk_mem_freq(i915);
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if (fsb_freq <= 3200000)
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c_m = 0;
+111
drivers/gpu/drm/i915/i915_freq.c
+111
drivers/gpu/drm/i915/i915_freq.c
···
1
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// SPDX-License-Identifier: MIT
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/* Copyright © 2025 Intel Corporation */
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#include <drm/drm_print.h>
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#include "i915_drv.h"
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#include "i915_freq.h"
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#include "intel_mchbar_regs.h"
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unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
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{
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u32 fsb;
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/*
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* Note that this only reads the state of the FSB
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* straps, not the actual FSB frequency. Some BIOSen
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* let you configure each independently. Ideally we'd
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* read out the actual FSB frequency but sadly we
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* don't know which registers have that information,
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* and all the relevant docs have gone to bit heaven :(
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*/
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fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
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if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
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switch (fsb) {
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case CLKCFG_FSB_400:
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return 400000;
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case CLKCFG_FSB_533:
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return 533333;
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case CLKCFG_FSB_667:
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return 666667;
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case CLKCFG_FSB_800:
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return 800000;
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case CLKCFG_FSB_1067:
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return 1066667;
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case CLKCFG_FSB_1333:
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return 1333333;
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default:
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MISSING_CASE(fsb);
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return 1333333;
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}
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} else {
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switch (fsb) {
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case CLKCFG_FSB_400_ALT:
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return 400000;
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case CLKCFG_FSB_533:
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return 533333;
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case CLKCFG_FSB_667:
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return 666667;
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case CLKCFG_FSB_800:
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return 800000;
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case CLKCFG_FSB_1067_ALT:
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return 1066667;
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case CLKCFG_FSB_1333_ALT:
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return 1333333;
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case CLKCFG_FSB_1600_ALT:
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return 1600000;
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default:
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MISSING_CASE(fsb);
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return 1333333;
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}
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}
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}
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unsigned int ilk_fsb_freq(struct drm_i915_private *i915)
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{
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u16 fsb;
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fsb = intel_uncore_read16(&i915->uncore, CSIPLL0) & 0x3ff;
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switch (fsb) {
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case 0x00c:
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return 3200000;
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case 0x00e:
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return 3733333;
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case 0x010:
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return 4266667;
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case 0x012:
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return 4800000;
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case 0x014:
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return 5333333;
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case 0x016:
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return 5866667;
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case 0x018:
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return 6400000;
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default:
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drm_dbg(&i915->drm, "unknown fsb frequency 0x%04x\n", fsb);
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return 0;
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}
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}
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unsigned int ilk_mem_freq(struct drm_i915_private *i915)
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{
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u16 ddrpll;
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ddrpll = intel_uncore_read16(&i915->uncore, DDRMPLL1);
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switch (ddrpll & 0xff) {
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case 0xc:
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return 800000;
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case 0x10:
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return 1066667;
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case 0x14:
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return 1333333;
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case 0x18:
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return 1600000;
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default:
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drm_dbg(&i915->drm, "unknown memory frequency 0x%02x\n",
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ddrpll & 0xff);
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return 0;
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}
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}
+13
drivers/gpu/drm/i915/i915_freq.h
+13
drivers/gpu/drm/i915/i915_freq.h
···
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/* SPDX-License-Identifier: MIT */
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/* Copyright © 2025 Intel Corporation */
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#ifndef __I915_FREQ_H__
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#define __I915_FREQ_H__
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struct drm_i915_private;
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unsigned int i9xx_fsb_freq(struct drm_i915_private *i915);
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unsigned int ilk_fsb_freq(struct drm_i915_private *i915);
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unsigned int ilk_mem_freq(struct drm_i915_private *i915);
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#endif /* __I915_FREQ_H__ */