Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'devicetree-fixes-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree fixes from Rob Herring:
"DeviceTree fixes for 3.18:
- two fixes for OF selftest code
- fix for PowerPC address parsing to disable work-around except on
old PowerMACs
- fix a crash when earlycon is enabled, but no device is found
- DT documentation fixes and missing vendor prefixes
All but the doc updates are also for stable"
* tag 'devicetree-fixes-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
of/selftest: Fix testing when /aliases is missing
of/selftest: Fix off-by-one error in removal path
documentation: pinctrl bindings: Fix trivial typo 'abitrary'
devicetree: bindings: Add vendor prefix for Micron Technology, Inc.
of: Add vendor prefix for Chips&Media, Inc.
of/base: Fix PowerPC address parsing hack
devicetree: vendor-prefixes.txt: fix whitespace
of: Fix crash if an earlycon driver is not found
of/irq: Drop obsolete 'interrupts' vs 'interrupts-extended' text
of: Spelling s/stucture/structure/
devicetree: bindings: add sandisk to the vendor prefixes
+42
-25
-4
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
-4
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
···
30
30
Example:
31
31
interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
32
32
33
-
A device node may contain either "interrupts" or "interrupts-extended", but not
34
-
both. If both properties are present, then the operating system should log an
35
-
error and use only the data in "interrupts".
36
-
37
33
2) Interrupt controller nodes
38
34
-----------------------------
39
35
+1
-1
Documentation/devicetree/bindings/pinctrl/img,tz1090-pdc-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/img,tz1090-pdc-pinctrl.txt
···
9
9
common pinctrl bindings used by client devices, including the meaning of the
10
10
phrase "pin configuration node".
11
11
12
-
TZ1090-PDC's pin configuration nodes act as a container for an abitrary number
12
+
TZ1090-PDC's pin configuration nodes act as a container for an arbitrary number
13
13
of subnodes. Each of these subnodes represents some desired configuration for a
14
14
pin, a group, or a list of pins or groups. This configuration can include the
15
15
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/img,tz1090-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/img,tz1090-pinctrl.txt
···
9
9
common pinctrl bindings used by client devices, including the meaning of the
10
10
phrase "pin configuration node".
11
11
12
-
TZ1090's pin configuration nodes act as a container for an abitrary number of
12
+
TZ1090's pin configuration nodes act as a container for an arbitrary number of
13
13
subnodes. Each of these subnodes represents some desired configuration for a
14
14
pin, a group, or a list of pins or groups. This configuration can include the
15
15
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/lantiq,falcon-pinumx.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/lantiq,falcon-pinumx.txt
···
9
9
common pinctrl bindings used by client devices, including the meaning of the
10
10
phrase "pin configuration node".
11
11
12
-
Lantiq's pin configuration nodes act as a container for an abitrary number of
12
+
Lantiq's pin configuration nodes act as a container for an arbitrary number of
13
13
subnodes. Each of these subnodes represents some desired configuration for a
14
14
pin, a group, or a list of pins or groups. This configuration can include the
15
15
mux function to select on those group(s), and two pin configuration parameters:
+1
-1
Documentation/devicetree/bindings/pinctrl/lantiq,xway-pinumx.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/lantiq,xway-pinumx.txt
···
9
9
common pinctrl bindings used by client devices, including the meaning of the
10
10
phrase "pin configuration node".
11
11
12
-
Lantiq's pin configuration nodes act as a container for an abitrary number of
12
+
Lantiq's pin configuration nodes act as a container for an arbitrary number of
13
13
subnodes. Each of these subnodes represents some desired configuration for a
14
14
pin, a group, or a list of pins or groups. This configuration can include the
15
15
mux function to select on those group(s), and two pin configuration parameters:
+1
-1
Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
···
9
9
common pinctrl bindings used by client devices, including the meaning of the
10
10
phrase "pin configuration node".
11
11
12
-
Tegra's pin configuration nodes act as a container for an abitrary number of
12
+
Tegra's pin configuration nodes act as a container for an arbitrary number of
13
13
subnodes. Each of these subnodes represents some desired configuration for a
14
14
pin, a group, or a list of pins or groups. This configuration can include the
15
15
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
···
13
13
Please refer to pinctrl-bindings.txt in this directory for details of the common
14
14
pinctrl bindings used by client devices.
15
15
16
-
SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
16
+
SiRFprimaII's pinmux nodes act as a container for an arbitrary number of subnodes.
17
17
Each of these subnodes represents some desired configuration for a group of pins.
18
18
19
19
Required subnode-properties:
+1
-1
Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt
···
32
32
Please refer to pinctrl-bindings.txt in this directory for details of the common
33
33
pinctrl bindings used by client devices.
34
34
35
-
SPEAr's pinmux nodes act as a container for an abitrary number of subnodes. Each
35
+
SPEAr's pinmux nodes act as a container for an arbitrary number of subnodes. Each
36
36
of these subnodes represents muxing for a pin, a group, or a list of pins or
37
37
groups.
38
38
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt
···
18
18
common pinctrl bindings used by client devices, including the meaning of the
19
19
phrase "pin configuration node".
20
20
21
-
Qualcomm's pin configuration nodes act as a container for an abitrary number of
21
+
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
22
22
subnodes. Each of these subnodes represents some desired configuration for a
23
23
pin, a group, or a list of pins or groups. This configuration can include the
24
24
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,apq8084-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,apq8084-pinctrl.txt
···
47
47
common pinctrl bindings used by client devices, including the meaning of the
48
48
phrase "pin configuration node".
49
49
50
-
The pin configuration nodes act as a container for an abitrary number of
50
+
The pin configuration nodes act as a container for an arbitrary number of
51
51
subnodes. Each of these subnodes represents some desired configuration for a
52
52
pin, a group, or a list of pins or groups. This configuration can include the
53
53
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,ipq8064-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,ipq8064-pinctrl.txt
···
18
18
common pinctrl bindings used by client devices, including the meaning of the
19
19
phrase "pin configuration node".
20
20
21
-
Qualcomm's pin configuration nodes act as a container for an abitrary number of
21
+
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
22
22
subnodes. Each of these subnodes represents some desired configuration for a
23
23
pin, a group, or a list of pins or groups. This configuration can include the
24
24
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt
···
47
47
common pinctrl bindings used by client devices, including the meaning of the
48
48
phrase "pin configuration node".
49
49
50
-
The pin configuration nodes act as a container for an abitrary number of
50
+
The pin configuration nodes act as a container for an arbitrary number of
51
51
subnodes. Each of these subnodes represents some desired configuration for a
52
52
pin, a group, or a list of pins or groups. This configuration can include the
53
53
mux function to select on those pin(s)/group(s), and various pin configuration
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt
+1
-1
Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt
···
18
18
common pinctrl bindings used by client devices, including the meaning of the
19
19
phrase "pin configuration node".
20
20
21
-
Qualcomm's pin configuration nodes act as a container for an abitrary number of
21
+
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
22
22
subnodes. Each of these subnodes represents some desired configuration for a
23
23
pin, a group, or a list of pins or groups. This configuration can include the
24
24
mux function to select on those pin(s)/group(s), and various pin configuration
+4
-1
Documentation/devicetree/bindings/vendor-prefixes.txt
+4
-1
Documentation/devicetree/bindings/vendor-prefixes.txt
···
34
34
chrp Common Hardware Reference Platform
35
35
chunghwa Chunghwa Picture Tubes Ltd.
36
36
cirrus Cirrus Logic, Inc.
37
+
cnm Chips&Media, Inc.
37
38
cortina Cortina Systems, Inc.
38
39
crystalfontz Crystalfontz America, Inc.
39
40
dallas Maxim Integrated Products (formerly Dallas Semiconductor)
···
93
92
mediatek MediaTek Inc.
94
93
micrel Micrel Inc.
95
94
microchip Microchip Technology Inc.
95
+
micron Micron Technology Inc.
96
96
mitsubishi Mitsubishi Electric Corporation
97
97
mosaixtech Mosaix Technologies, Inc.
98
98
moxa Moxa
···
129
127
ricoh Ricoh Co. Ltd.
130
128
rockchip Fuzhou Rockchip Electronics Co., Ltd
131
129
samsung Samsung Semiconductor
130
+
sandisk Sandisk Corporation
132
131
sbs Smart Battery System
133
132
schindler Schindler
134
133
seagate Seagate Technology PLC
···
141
138
sirf SiRF Technology, Inc.
142
139
sitronix Sitronix Technology Corporation
143
140
smsc Standard Microsystems Corporation
144
-
snps Synopsys, Inc.
141
+
snps Synopsys, Inc.
145
142
solidrun SolidRun
146
143
sony Sony Corporation
147
144
spansion Spansion Inc.
+16
-3
drivers/of/address.c
+16
-3
drivers/of/address.c
···
450
450
return NULL;
451
451
}
452
452
453
+
static int of_empty_ranges_quirk(void)
454
+
{
455
+
if (IS_ENABLED(CONFIG_PPC)) {
456
+
/* To save cycles, we cache the result */
457
+
static int quirk_state = -1;
458
+
459
+
if (quirk_state < 0)
460
+
quirk_state =
461
+
of_machine_is_compatible("Power Macintosh") ||
462
+
of_machine_is_compatible("MacRISC");
463
+
return quirk_state;
464
+
}
465
+
return false;
466
+
}
467
+
453
468
static int of_translate_one(struct device_node *parent, struct of_bus *bus,
454
469
struct of_bus *pbus, __be32 *addr,
455
470
int na, int ns, int pna, const char *rprop)
···
490
475
* This code is only enabled on powerpc. --gcl
491
476
*/
492
477
ranges = of_get_property(parent, rprop, &rlen);
493
-
#if !defined(CONFIG_PPC)
494
-
if (ranges == NULL) {
478
+
if (ranges == NULL && !of_empty_ranges_quirk()) {
495
479
pr_err("OF: no ranges; cannot translate\n");
496
480
return 1;
497
481
}
498
-
#endif /* !defined(CONFIG_PPC) */
499
482
if (ranges == NULL || rlen == 0) {
500
483
offset = of_read_number(addr, na);
501
484
memset(addr, 0, pna * 4);
+1
-1
drivers/of/dynamic.c
+1
-1
drivers/of/dynamic.c
···
247
247
* @allocflags: Allocation flags (typically pass GFP_KERNEL)
248
248
*
249
249
* Copy a property by dynamically allocating the memory of both the
250
-
* property stucture and the property name & contents. The property's
250
+
* property structure and the property name & contents. The property's
251
251
* flags have the OF_DYNAMIC bit set so that we can differentiate between
252
252
* dynamically allocated properties and not.
253
253
* Returns the newly allocated property or NULL on out of memory error.
+1
-1
drivers/of/fdt.c
+1
-1
drivers/of/fdt.c
+8
-3
drivers/of/selftest.c
+8
-3
drivers/of/selftest.c
···
896
896
return;
897
897
}
898
898
899
-
while (last_node_index >= 0) {
899
+
while (last_node_index-- > 0) {
900
900
if (nodes[last_node_index]) {
901
901
np = of_find_node_by_path(nodes[last_node_index]->full_name);
902
-
if (strcmp(np->full_name, "/aliases") != 0) {
902
+
if (np == nodes[last_node_index]) {
903
+
if (of_aliases == np) {
904
+
of_node_put(of_aliases);
905
+
of_aliases = NULL;
906
+
}
903
907
detach_node_and_children(np);
904
908
} else {
905
909
for_each_property_of_node(np, prop) {
···
912
908
}
913
909
}
914
910
}
915
-
last_node_index--;
916
911
}
917
912
}
918
913
···
924
921
res = selftest_data_add();
925
922
if (res)
926
923
return res;
924
+
if (!of_aliases)
925
+
of_aliases = of_find_node_by_path("/aliases");
927
926
928
927
np = of_find_node_by_path("/testcase-data/phandle-tests/consumer-a");
929
928
if (!np) {