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KVM: arm64: nv: Return correct RES0 bits for FGT registers

We had extended the sysreg masking infrastructure to more general
registers, instead of restricting it to VNCR-backed registers, since
commit a0162020095e ("KVM: arm64: Extend masking facility to arbitrary
registers"). Fix kvm_get_sysreg_res0() to reflect this fact.

Note that we're sure that we only deal with FGT registers in
kvm_get_sysreg_res0(), the

if (sr < __VNCR_START__)

is actually a never false, which should probably be removed later.

Fixes: 69c19e047dfe ("KVM: arm64: Add TCR2_EL2 to the sysreg arrays")
Signed-off-by: Zenghui Yu (Huawei) <zenghui.yu@linux.dev>
Link: https://patch.msgid.link/20260121101631.41037-1-zenghui.yu@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org

authored by

Zenghui Yu (Huawei) and committed by
Marc Zyngier
2eb80a2e 54adbfe4

+1 -1
+1 -1
arch/arm64/kvm/emulate-nested.c
··· 2435 2435 2436 2436 masks = kvm->arch.sysreg_masks; 2437 2437 2438 - return masks->mask[sr - __VNCR_START__].res0; 2438 + return masks->mask[sr - __SANITISED_REG_START__].res0; 2439 2439 } 2440 2440 2441 2441 static bool check_fgt_bit(struct kvm_vcpu *vcpu, enum vcpu_sysreg sr,