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phy: qcom: qmp-combo: drop qmp_v6_dp_aux_init()

The only difference between qmp_v6_dp_aux_init() and
qmp_v4_dp_aux_init() is the address of COM_BIAS_EN_CLKBUFLR_EN register.
Move it to register layout and drop the duplicate function.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Dmitry Baryshkov and committed by
Vinod Koul 31a4ac68 9e6a0403

+13 -33
+13 -33
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
··· 110 110 QPHY_COM_RESETSM_CNTRL, 111 111 QPHY_COM_C_READY_STATUS, 112 112 QPHY_COM_CMN_STATUS, 113 + QPHY_COM_BIAS_EN_CLKBUFLR_EN, 113 114 114 115 QPHY_DP_PHY_STATUS, 115 116 ··· 135 134 [QPHY_COM_RESETSM_CNTRL] = QSERDES_V3_COM_RESETSM_CNTRL, 136 135 [QPHY_COM_C_READY_STATUS] = QSERDES_V3_COM_C_READY_STATUS, 137 136 [QPHY_COM_CMN_STATUS] = QSERDES_V3_COM_CMN_STATUS, 137 + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 138 138 139 139 [QPHY_DP_PHY_STATUS] = QSERDES_V3_DP_PHY_STATUS, 140 140 ··· 159 157 [QPHY_COM_RESETSM_CNTRL] = QSERDES_V4_COM_RESETSM_CNTRL, 160 158 [QPHY_COM_C_READY_STATUS] = QSERDES_V4_COM_C_READY_STATUS, 161 159 [QPHY_COM_CMN_STATUS] = QSERDES_V4_COM_CMN_STATUS, 160 + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN, 162 161 163 162 [QPHY_DP_PHY_STATUS] = QSERDES_V4_DP_PHY_STATUS, 164 163 ··· 183 180 [QPHY_COM_RESETSM_CNTRL] = QSERDES_V5_COM_RESETSM_CNTRL, 184 181 [QPHY_COM_C_READY_STATUS] = QSERDES_V5_COM_C_READY_STATUS, 185 182 [QPHY_COM_CMN_STATUS] = QSERDES_V5_COM_CMN_STATUS, 183 + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V5_COM_BIAS_EN_CLKBUFLR_EN, 186 184 187 185 [QPHY_DP_PHY_STATUS] = QSERDES_V5_DP_PHY_STATUS, 188 186 ··· 207 203 [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, 208 204 [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, 209 205 [QPHY_COM_CMN_STATUS] = QSERDES_V6_COM_CMN_STATUS, 206 + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, 210 207 211 208 [QPHY_DP_PHY_STATUS] = QSERDES_V6_DP_PHY_STATUS, 212 209 ··· 1438 1433 static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp); 1439 1434 static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp); 1440 1435 1441 - static void qmp_v6_dp_aux_init(struct qmp_combo *qmp); 1442 - 1443 1436 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) 1444 1437 { 1445 1438 u32 reg; ··· 1873 1870 .swing_hbr3_hbr2 = &qmp_dp_v5_voltage_swing_hbr3_hbr2, 1874 1871 .pre_emphasis_hbr3_hbr2 = &qmp_dp_v5_pre_emphasis_hbr3_hbr2, 1875 1872 1876 - .dp_aux_init = qmp_v6_dp_aux_init, 1873 + .dp_aux_init = qmp_v4_dp_aux_init, 1877 1874 .configure_dp_tx = qmp_v4_configure_dp_tx, 1878 1875 .configure_dp_phy = qmp_v4_configure_dp_phy, 1879 1876 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, ··· 1948 1945 1949 1946 static void qmp_v3_dp_aux_init(struct qmp_combo *qmp) 1950 1947 { 1948 + const struct qmp_phy_cfg *cfg = qmp->cfg; 1949 + 1951 1950 writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | 1952 1951 DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, 1953 1952 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); ··· 1957 1952 /* Turn on BIAS current for PHY/PLL */ 1958 1953 writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | 1959 1954 QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL, 1960 - qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); 1955 + qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); 1961 1956 1962 1957 writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); 1963 1958 ··· 1971 1966 QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN | 1972 1967 QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL | 1973 1968 QSERDES_V3_COM_CLKBUF_RX_DRIVE_L, 1974 - qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); 1969 + qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); 1975 1970 1976 1971 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); 1977 1972 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); ··· 2167 2162 2168 2163 static void qmp_v4_dp_aux_init(struct qmp_combo *qmp) 2169 2164 { 2165 + const struct qmp_phy_cfg *cfg = qmp->cfg; 2166 + 2170 2167 writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | 2171 2168 DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, 2172 2169 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); 2173 2170 2174 2171 /* Turn on BIAS current for PHY/PLL */ 2175 - writel(0x17, qmp->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); 2176 - 2177 - writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); 2178 - writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); 2179 - writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); 2180 - writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); 2181 - writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); 2182 - writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); 2183 - writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); 2184 - writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); 2185 - writel(0xb7, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); 2186 - writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); 2187 - qmp->dp_aux_cfg = 0; 2188 - 2189 - writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | 2190 - PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | 2191 - PHY_AUX_REQ_ERR_MASK, 2192 - qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); 2193 - } 2194 - 2195 - static void qmp_v6_dp_aux_init(struct qmp_combo *qmp) 2196 - { 2197 - writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | 2198 - DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, 2199 - qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); 2200 - 2201 - /* Turn on BIAS current for PHY/PLL */ 2202 - writel(0x17, qmp->dp_serdes + QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN); 2172 + writel(0x17, qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); 2203 2173 2204 2174 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); 2205 2175 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1);