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dt-bindings: phy: spacemit: Introduce PCIe PHY

Add the Device Tree binding for two PCIe PHYs present on the SpacemiT
K1 SoC. These PHYs are dependent on a separate combo PHY, which
determines at probe time the calibration values used by the PCIe-only
PHYs.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Alex Elder <elder@riscstar.com>
Link: https://lore.kernel.org/all/ba532f8d-a452-40e5-af46-b58b89f70a92@linaro.org/ [1]
Tested-by: Yixun Lan <dlan@gentoo.org>
Link: https://patch.msgid.link/20251218151235.454997-3-elder@riscstar.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Alex Elder and committed by
Vinod Koul 326a278a f6194de7

+71
+71
Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/spacemit,k1-pcie-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: SpacemiT K1 PCIe PHY 8 + 9 + maintainers: 10 + - Alex Elder <elder@riscstar.com> 11 + 12 + description: > 13 + Two PHYs on the SpacemiT K1 SoC used for only for PCIe. These 14 + PHYs must be configured using calibration values that are 15 + determined by a third "combo PHY". The combo PHY determines 16 + these calibration values during probe so they can be used for 17 + the two PCIe-only PHYs. 18 + 19 + The PHY uses an external oscillator as a reference clock. During 20 + normal operation, the PCIe host driver is responsible for ensuring 21 + all other clocks needed by a PHY are enabled, and all resets 22 + affecting the PHY are deasserted. 23 + 24 + properties: 25 + compatible: 26 + const: spacemit,k1-pcie-phy 27 + 28 + reg: 29 + items: 30 + - description: PHY control registers 31 + 32 + clocks: 33 + items: 34 + - description: External oscillator used by the PHY PLL 35 + 36 + clock-names: 37 + const: refclk 38 + 39 + resets: 40 + items: 41 + - description: PHY reset; remains deasserted after initialization 42 + 43 + reset-names: 44 + const: phy 45 + 46 + "#phy-cells": 47 + const: 0 48 + 49 + required: 50 + - compatible 51 + - reg 52 + - clocks 53 + - clock-names 54 + - resets 55 + - reset-names 56 + - "#phy-cells" 57 + 58 + additionalProperties: false 59 + 60 + examples: 61 + - | 62 + #include <dt-bindings/clock/spacemit,k1-syscon.h> 63 + phy@c0c10000 { 64 + compatible = "spacemit,k1-pcie-phy"; 65 + reg = <0xc0c10000 0x1000>; 66 + clocks = <&vctcxo_24m>; 67 + clock-names = "refclk"; 68 + resets = <&syscon_apmu RESET_PCIE1_GLOBAL>; 69 + reset-names = "phy"; 70 + #phy-cells = <0>; 71 + };