Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: rkvdec: Move hevc functions to common file
This is a preparation commit to add support for new variants of the
decoder.
The functions will later be shared with vdpu381 (rk3588) and vdpu383
(rk3576).
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock 5B
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
authored by
Detlev Casanova
and committed by
Hans Verkuil
34e2b14a
560438ed
+260
-207
+1
drivers/media/platform/rockchip/rkvdec/Makefile
+1
drivers/media/platform/rockchip/rkvdec/Makefile
+205
drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c
+205
drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* Rockchip video decoder hevc common functions
4
+
*
5
+
* Copyright (C) 2025 Collabora, Ltd.
6
+
* Detlev Casanova <detlev.casanova@collabora.com>
7
+
*
8
+
* Copyright (C) 2023 Collabora, Ltd.
9
+
* Sebastian Fricke <sebastian.fricke@collabora.com>
10
+
*
11
+
* Copyright (C) 2019 Collabora, Ltd.
12
+
* Boris Brezillon <boris.brezillon@collabora.com>
13
+
*
14
+
* Copyright (C) 2016 Rockchip Electronics Co., Ltd.
15
+
* Jeffy Chen <jeffy.chen@rock-chips.com>
16
+
*/
17
+
18
+
#include <linux/v4l2-common.h>
19
+
#include <media/v4l2-mem2mem.h>
20
+
21
+
#include "rkvdec.h"
22
+
#include "rkvdec-hevc-common.h"
23
+
24
+
/*
25
+
* Flip one or more matrices along their main diagonal and flatten them
26
+
* before writing it to the memory.
27
+
* Convert:
28
+
* ABCD AEIM
29
+
* EFGH => BFJN => AEIMBFJNCGKODHLP
30
+
* IJKL CGKO
31
+
* MNOP DHLP
32
+
*/
33
+
static void transpose_and_flatten_matrices(u8 *output, const u8 *input,
34
+
int matrices, int row_length)
35
+
{
36
+
int i, j, row, x_offset, matrix_offset, rot_index, y_offset, matrix_size, new_value;
37
+
38
+
matrix_size = row_length * row_length;
39
+
for (i = 0; i < matrices; i++) {
40
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row = 0;
41
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x_offset = 0;
42
+
matrix_offset = i * matrix_size;
43
+
for (j = 0; j < matrix_size; j++) {
44
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y_offset = j - (row * row_length);
45
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rot_index = y_offset * row_length + x_offset;
46
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new_value = *(input + i * matrix_size + j);
47
+
output[matrix_offset + rot_index] = new_value;
48
+
if ((j + 1) % row_length == 0) {
49
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row += 1;
50
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x_offset += 1;
51
+
}
52
+
}
53
+
}
54
+
}
55
+
56
+
static void assemble_scalingfactor0(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input)
57
+
{
58
+
int offset = 0;
59
+
60
+
transpose_and_flatten_matrices(output, (const u8 *)input->scaling_list_4x4, 6, 4);
61
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offset = 6 * 16 * sizeof(u8);
62
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transpose_and_flatten_matrices(output + offset, (const u8 *)input->scaling_list_8x8, 6, 8);
63
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offset += 6 * 64 * sizeof(u8);
64
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transpose_and_flatten_matrices(output + offset,
65
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(const u8 *)input->scaling_list_16x16, 6, 8);
66
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offset += 6 * 64 * sizeof(u8);
67
+
/* Add a 128 byte padding with 0s between the two 32x32 matrices */
68
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transpose_and_flatten_matrices(output + offset,
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(const u8 *)input->scaling_list_32x32, 1, 8);
70
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offset += 64 * sizeof(u8);
71
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memset(output + offset, 0, 128);
72
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offset += 128 * sizeof(u8);
73
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transpose_and_flatten_matrices(output + offset,
74
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(const u8 *)input->scaling_list_32x32 + (64 * sizeof(u8)),
75
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1, 8);
76
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offset += 64 * sizeof(u8);
77
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memset(output + offset, 0, 128);
78
+
}
79
+
80
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/*
81
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* Required layout:
82
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* A = scaling_list_dc_coef_16x16
83
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* B = scaling_list_dc_coef_32x32
84
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* 0 = Padding
85
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*
86
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* A, A, A, A, A, A, B, 0, 0, B, 0, 0
87
+
*/
88
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static void assemble_scalingdc(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input)
89
+
{
90
+
u8 list_32x32[6] = {0};
91
+
92
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memcpy(output, input->scaling_list_dc_coef_16x16, 6 * sizeof(u8));
93
+
list_32x32[0] = input->scaling_list_dc_coef_32x32[0];
94
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list_32x32[3] = input->scaling_list_dc_coef_32x32[1];
95
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memcpy(output + 6 * sizeof(u8), list_32x32, 6 * sizeof(u8));
96
+
}
97
+
98
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static void translate_scaling_list(struct scaling_factor *output,
99
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const struct v4l2_ctrl_hevc_scaling_matrix *input)
100
+
{
101
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assemble_scalingfactor0(output->scalingfactor0, input);
102
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memcpy(output->scalingfactor1, (const u8 *)input->scaling_list_4x4, 96);
103
+
assemble_scalingdc(output->scalingdc, input);
104
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memset(output->reserved, 0, 4 * sizeof(u8));
105
+
}
106
+
107
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void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_hevc_run *run,
108
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struct scaling_factor *scaling_factor,
109
+
struct v4l2_ctrl_hevc_scaling_matrix *cache)
110
+
{
111
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const struct v4l2_ctrl_hevc_scaling_matrix *scaling = run->scaling_matrix;
112
+
113
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if (!memcmp(cache, scaling,
114
+
sizeof(struct v4l2_ctrl_hevc_scaling_matrix)))
115
+
return;
116
+
117
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translate_scaling_list(scaling_factor, scaling);
118
+
119
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memcpy(cache, scaling,
120
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sizeof(struct v4l2_ctrl_hevc_scaling_matrix));
121
+
}
122
+
123
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struct vb2_buffer *
124
+
get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run,
125
+
unsigned int dpb_idx)
126
+
{
127
+
struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
128
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const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params;
129
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const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb;
130
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struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q;
131
+
struct vb2_buffer *buf = NULL;
132
+
133
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if (dpb_idx < decode_params->num_active_dpb_entries)
134
+
buf = vb2_find_buffer(cap_q, dpb[dpb_idx].timestamp);
135
+
136
+
/*
137
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* If a DPB entry is unused or invalid, the address of current destination
138
+
* buffer is returned.
139
+
*/
140
+
if (!buf)
141
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return &run->base.bufs.dst->vb2_buf;
142
+
143
+
return buf;
144
+
}
145
+
146
+
#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2
147
+
148
+
int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f)
149
+
{
150
+
struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp;
151
+
152
+
fmt->num_planes = 1;
153
+
if (!fmt->plane_fmt[0].sizeimage)
154
+
fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height *
155
+
RKVDEC_HEVC_MAX_DEPTH_IN_BYTES;
156
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return 0;
157
+
}
158
+
159
+
enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx,
160
+
struct v4l2_ctrl *ctrl)
161
+
{
162
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const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
163
+
164
+
if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS)
165
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return RKVDEC_IMG_FMT_ANY;
166
+
167
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if (sps->bit_depth_luma_minus8 == 0) {
168
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if (sps->chroma_format_idc == 2)
169
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return RKVDEC_IMG_FMT_422_8BIT;
170
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else
171
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return RKVDEC_IMG_FMT_420_8BIT;
172
+
} else if (sps->bit_depth_luma_minus8 == 2) {
173
+
if (sps->chroma_format_idc == 2)
174
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return RKVDEC_IMG_FMT_422_10BIT;
175
+
else
176
+
return RKVDEC_IMG_FMT_420_10BIT;
177
+
}
178
+
179
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return RKVDEC_IMG_FMT_ANY;
180
+
}
181
+
182
+
void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx,
183
+
struct rkvdec_hevc_run *run)
184
+
{
185
+
struct v4l2_ctrl *ctrl;
186
+
187
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ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
188
+
V4L2_CID_STATELESS_HEVC_DECODE_PARAMS);
189
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run->decode_params = ctrl ? ctrl->p_cur.p : NULL;
190
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
191
+
V4L2_CID_STATELESS_HEVC_SLICE_PARAMS);
192
+
run->slices_params = ctrl ? ctrl->p_cur.p : NULL;
193
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run->num_slices = ctrl ? ctrl->new_elems : 0;
194
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ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
195
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V4L2_CID_STATELESS_HEVC_SPS);
196
+
run->sps = ctrl ? ctrl->p_cur.p : NULL;
197
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
198
+
V4L2_CID_STATELESS_HEVC_PPS);
199
+
run->pps = ctrl ? ctrl->p_cur.p : NULL;
200
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
201
+
V4L2_CID_STATELESS_HEVC_SCALING_MATRIX);
202
+
run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL;
203
+
204
+
rkvdec_run_preamble(ctx, &run->base);
205
+
}
+47
drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h
+47
drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Rockchip video decoder hevc common functions
4
+
*
5
+
* Copyright (C) 2025 Collabora, Ltd.
6
+
* Detlev Casanova <detlev.casanova@collabora.com>
7
+
*
8
+
* Copyright (C) 2023 Collabora, Ltd.
9
+
* Sebastian Fricke <sebastian.fricke@collabora.com>
10
+
*
11
+
* Copyright (C) 2019 Collabora, Ltd.
12
+
* Boris Brezillon <boris.brezillon@collabora.com>
13
+
*
14
+
* Copyright (C) 2016 Rockchip Electronics Co., Ltd.
15
+
* Jeffy Chen <jeffy.chen@rock-chips.com>
16
+
*/
17
+
18
+
#include <media/v4l2-mem2mem.h>
19
+
20
+
#include "rkvdec.h"
21
+
22
+
struct rkvdec_hevc_run {
23
+
struct rkvdec_run base;
24
+
const struct v4l2_ctrl_hevc_slice_params *slices_params;
25
+
const struct v4l2_ctrl_hevc_decode_params *decode_params;
26
+
const struct v4l2_ctrl_hevc_sps *sps;
27
+
const struct v4l2_ctrl_hevc_pps *pps;
28
+
const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix;
29
+
int num_slices;
30
+
};
31
+
32
+
struct scaling_factor {
33
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u8 scalingfactor0[1248];
34
+
u8 scalingfactor1[96]; /*4X4 TU Rotate, total 16X4*/
35
+
u8 scalingdc[12]; /*N1005 Vienna Meeting*/
36
+
u8 reserved[4]; /*16Bytes align*/
37
+
};
38
+
39
+
void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_hevc_run *run,
40
+
struct scaling_factor *scaling_factor,
41
+
struct v4l2_ctrl_hevc_scaling_matrix *cache);
42
+
struct vb2_buffer *get_ref_buf(struct rkvdec_ctx *ctx,
43
+
struct rkvdec_hevc_run *run,
44
+
unsigned int dpb_idx);
45
+
int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f);
46
+
enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl);
47
+
void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run);
+7
-207
drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
+7
-207
drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
···
17
17
#include "rkvdec.h"
18
18
#include "rkvdec-regs.h"
19
19
#include "rkvdec-cabac.h"
20
+
#include "rkvdec-hevc-common.h"
20
21
21
22
/* Size in u8/u32 units. */
22
23
#define RKV_SCALING_LIST_SIZE 1360
···
112
111
/* Data structure describing auxiliary buffer format. */
113
112
struct rkvdec_hevc_priv_tbl {
114
113
u8 cabac_table[RKV_HEVC_CABAC_TABLE_SIZE];
115
-
u8 scaling_list[RKV_SCALING_LIST_SIZE];
114
+
struct scaling_factor scaling_list;
116
115
struct rkvdec_sps_pps_packet param_set[RKV_PPS_LEN];
117
116
struct rkvdec_rps_packet rps[RKV_RPS_LEN];
118
-
};
119
-
120
-
struct rkvdec_hevc_run {
121
-
struct rkvdec_run base;
122
-
const struct v4l2_ctrl_hevc_slice_params *slices_params;
123
-
const struct v4l2_ctrl_hevc_decode_params *decode_params;
124
-
const struct v4l2_ctrl_hevc_sps *sps;
125
-
const struct v4l2_ctrl_hevc_pps *pps;
126
-
const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix;
127
-
int num_slices;
128
117
};
129
118
130
119
struct rkvdec_hevc_ctx {
131
120
struct rkvdec_aux_buf priv_tbl;
132
121
struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix_cache;
133
122
struct rkvdec_regs regs;
134
-
};
135
-
136
-
struct scaling_factor {
137
-
u8 scalingfactor0[1248];
138
-
u8 scalingfactor1[96]; /*4X4 TU Rotate, total 16X4*/
139
-
u8 scalingdc[12]; /*N1005 Vienna Meeting*/
140
-
u8 reserved[4]; /*16Bytes align*/
141
123
};
142
124
143
125
static void set_ps_field(u32 *buf, struct rkvdec_ps_field field, u32 value)
···
399
415
}
400
416
}
401
417
402
-
/*
403
-
* Flip one or more matrices along their main diagonal and flatten them
404
-
* before writing it to the memory.
405
-
* Convert:
406
-
* ABCD AEIM
407
-
* EFGH => BFJN => AEIMBFJNCGKODHLP
408
-
* IJKL CGKO
409
-
* MNOP DHLP
410
-
*/
411
-
static void transpose_and_flatten_matrices(u8 *output, const u8 *input,
412
-
int matrices, int row_length)
413
-
{
414
-
int i, j, row, x_offset, matrix_offset, rot_index, y_offset, matrix_size, new_value;
415
-
416
-
matrix_size = row_length * row_length;
417
-
for (i = 0; i < matrices; i++) {
418
-
row = 0;
419
-
x_offset = 0;
420
-
matrix_offset = i * matrix_size;
421
-
for (j = 0; j < matrix_size; j++) {
422
-
y_offset = j - (row * row_length);
423
-
rot_index = y_offset * row_length + x_offset;
424
-
new_value = *(input + i * matrix_size + j);
425
-
output[matrix_offset + rot_index] = new_value;
426
-
if ((j + 1) % row_length == 0) {
427
-
row += 1;
428
-
x_offset += 1;
429
-
}
430
-
}
431
-
}
432
-
}
433
-
434
-
static void assemble_scalingfactor0(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input)
435
-
{
436
-
int offset = 0;
437
-
438
-
transpose_and_flatten_matrices(output, (const u8 *)input->scaling_list_4x4, 6, 4);
439
-
offset = 6 * 16 * sizeof(u8);
440
-
transpose_and_flatten_matrices(output + offset, (const u8 *)input->scaling_list_8x8, 6, 8);
441
-
offset += 6 * 64 * sizeof(u8);
442
-
transpose_and_flatten_matrices(output + offset,
443
-
(const u8 *)input->scaling_list_16x16, 6, 8);
444
-
offset += 6 * 64 * sizeof(u8);
445
-
/* Add a 128 byte padding with 0s between the two 32x32 matrices */
446
-
transpose_and_flatten_matrices(output + offset,
447
-
(const u8 *)input->scaling_list_32x32, 1, 8);
448
-
offset += 64 * sizeof(u8);
449
-
memset(output + offset, 0, 128);
450
-
offset += 128 * sizeof(u8);
451
-
transpose_and_flatten_matrices(output + offset,
452
-
(const u8 *)input->scaling_list_32x32 + (64 * sizeof(u8)),
453
-
1, 8);
454
-
offset += 64 * sizeof(u8);
455
-
memset(output + offset, 0, 128);
456
-
}
457
-
458
-
/*
459
-
* Required layout:
460
-
* A = scaling_list_dc_coef_16x16
461
-
* B = scaling_list_dc_coef_32x32
462
-
* 0 = Padding
463
-
*
464
-
* A, A, A, A, A, A, B, 0, 0, B, 0, 0
465
-
*/
466
-
static void assemble_scalingdc(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input)
467
-
{
468
-
u8 list_32x32[6] = {0};
469
-
470
-
memcpy(output, input->scaling_list_dc_coef_16x16, 6 * sizeof(u8));
471
-
list_32x32[0] = input->scaling_list_dc_coef_32x32[0];
472
-
list_32x32[3] = input->scaling_list_dc_coef_32x32[1];
473
-
memcpy(output + 6 * sizeof(u8), list_32x32, 6 * sizeof(u8));
474
-
}
475
-
476
-
static void translate_scaling_list(struct scaling_factor *output,
477
-
const struct v4l2_ctrl_hevc_scaling_matrix *input)
478
-
{
479
-
assemble_scalingfactor0(output->scalingfactor0, input);
480
-
memcpy(output->scalingfactor1, (const u8 *)input->scaling_list_4x4, 96);
481
-
assemble_scalingdc(output->scalingdc, input);
482
-
memset(output->reserved, 0, 4 * sizeof(u8));
483
-
}
484
-
485
-
static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx,
486
-
struct rkvdec_hevc_run *run)
487
-
{
488
-
const struct v4l2_ctrl_hevc_scaling_matrix *scaling = run->scaling_matrix;
489
-
struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
490
-
struct rkvdec_hevc_priv_tbl *tbl = hevc_ctx->priv_tbl.cpu;
491
-
u8 *dst;
492
-
493
-
if (!memcmp((void *)&hevc_ctx->scaling_matrix_cache, scaling,
494
-
sizeof(struct v4l2_ctrl_hevc_scaling_matrix)))
495
-
return;
496
-
497
-
dst = tbl->scaling_list;
498
-
translate_scaling_list((struct scaling_factor *)dst, scaling);
499
-
500
-
memcpy((void *)&hevc_ctx->scaling_matrix_cache, scaling,
501
-
sizeof(struct v4l2_ctrl_hevc_scaling_matrix));
502
-
}
503
-
504
-
static struct vb2_buffer *
505
-
get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run,
506
-
unsigned int dpb_idx)
507
-
{
508
-
struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
509
-
const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params;
510
-
const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb;
511
-
struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q;
512
-
struct vb2_buffer *buf = NULL;
513
-
514
-
if (dpb_idx < decode_params->num_active_dpb_entries)
515
-
buf = vb2_find_buffer(cap_q, dpb[dpb_idx].timestamp);
516
-
517
-
/*
518
-
* If a DPB entry is unused or invalid, the address of current destination
519
-
* buffer is returned.
520
-
*/
521
-
if (!buf)
522
-
return &run->base.bufs.dst->vb2_buf;
523
-
524
-
return buf;
525
-
}
526
-
527
418
static void config_registers(struct rkvdec_ctx *ctx,
528
419
struct rkvdec_hevc_run *run)
529
420
{
···
502
643
MIN(sizeof(*regs), sizeof(u32) * rkvdec->variant->num_regs));
503
644
}
504
645
505
-
#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2
506
-
507
-
static int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx,
508
-
struct v4l2_format *f)
509
-
{
510
-
struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp;
511
-
512
-
fmt->num_planes = 1;
513
-
if (!fmt->plane_fmt[0].sizeimage)
514
-
fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height *
515
-
RKVDEC_HEVC_MAX_DEPTH_IN_BYTES;
516
-
return 0;
517
-
}
518
-
519
-
static enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx,
520
-
struct v4l2_ctrl *ctrl)
521
-
{
522
-
const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
523
-
524
-
if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS)
525
-
return RKVDEC_IMG_FMT_ANY;
526
-
527
-
if (sps->bit_depth_luma_minus8 == 0) {
528
-
if (sps->chroma_format_idc == 2)
529
-
return RKVDEC_IMG_FMT_422_8BIT;
530
-
else
531
-
return RKVDEC_IMG_FMT_420_8BIT;
532
-
} else if (sps->bit_depth_luma_minus8 == 2) {
533
-
if (sps->chroma_format_idc == 2)
534
-
return RKVDEC_IMG_FMT_422_10BIT;
535
-
else
536
-
return RKVDEC_IMG_FMT_420_10BIT;
537
-
}
538
-
539
-
return RKVDEC_IMG_FMT_ANY;
540
-
}
541
-
542
646
static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx,
543
647
const struct v4l2_ctrl_hevc_sps *sps)
544
648
{
···
512
690
/* Luma and chroma bit depth mismatch */
513
691
return -EINVAL;
514
692
if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
515
-
/* Only 8-bit and 10-bit is supported */
693
+
/* Only 8-bit and 10-bit are supported */
516
694
return -EINVAL;
517
695
518
696
if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width ||
···
558
736
kfree(hevc_ctx);
559
737
}
560
738
561
-
static void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx,
562
-
struct rkvdec_hevc_run *run)
563
-
{
564
-
struct v4l2_ctrl *ctrl;
565
-
566
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
567
-
V4L2_CID_STATELESS_HEVC_DECODE_PARAMS);
568
-
run->decode_params = ctrl ? ctrl->p_cur.p : NULL;
569
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
570
-
V4L2_CID_STATELESS_HEVC_SLICE_PARAMS);
571
-
run->slices_params = ctrl ? ctrl->p_cur.p : NULL;
572
-
run->num_slices = ctrl ? ctrl->new_elems : 0;
573
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
574
-
V4L2_CID_STATELESS_HEVC_SPS);
575
-
run->sps = ctrl ? ctrl->p_cur.p : NULL;
576
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
577
-
V4L2_CID_STATELESS_HEVC_PPS);
578
-
run->pps = ctrl ? ctrl->p_cur.p : NULL;
579
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
580
-
V4L2_CID_STATELESS_HEVC_SCALING_MATRIX);
581
-
run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL;
582
-
583
-
rkvdec_run_preamble(ctx, &run->base);
584
-
}
585
-
586
739
static int rkvdec_hevc_run(struct rkvdec_ctx *ctx)
587
740
{
588
741
struct rkvdec_dev *rkvdec = ctx->dev;
589
742
struct rkvdec_hevc_run run;
743
+
struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
744
+
struct rkvdec_hevc_priv_tbl *tbl = hevc_ctx->priv_tbl.cpu;
590
745
u32 reg;
591
746
592
747
rkvdec_hevc_run_preamble(ctx, &run);
593
748
594
-
assemble_hw_scaling_list(ctx, &run);
749
+
rkvdec_hevc_assemble_hw_scaling_list(&run, &tbl->scaling_list,
750
+
&hevc_ctx->scaling_matrix_cache);
595
751
assemble_hw_pps(ctx, &run);
596
752
assemble_sw_rps(ctx, &run);
597
753
config_registers(ctx, &run);