tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/i915/lt_phy: Remove LT PHY specific state verification

Remove LT PHY specific state verification as DPLL framework
has state verification check.

v2: Reuse intel_lt_phy_pll_compare_hw_state() as only config[0]
and config[0] parameters are reliable with LT PHY (Suraj)
v3: Rephrase handling of LT PHY case when verifying the state (CI)
v4: Fix checkpatch warning of line length exceeding 100 columns

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-23-mika.kahola@intel.com

Mika Kahola 35349695 a60d7084

+13 -45
+13 -3
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
··· 5075 5075 const struct intel_crtc_state *new_crtc_state) 5076 5076 { 5077 5077 struct intel_dpll_hw_state dpll_hw_state = {}; 5078 + bool pll_mismatch = false; 5078 5079 u8 pipe_mask; 5079 5080 bool active; 5080 5081 ··· 5117 5116 "%s: pll enabled crtcs mismatch (expected 0x%x in 0x%x)\n", 5118 5117 pll->info->name, pipe_mask, pll->state.pipe_mask); 5119 5118 5120 - if (INTEL_DISPLAY_STATE_WARN(display, 5121 - pll->on && memcmp(&pll->state.hw_state, &dpll_hw_state, 5122 - sizeof(dpll_hw_state)), 5119 + if (pll->on) { 5120 + const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr; 5121 + 5122 + if (HAS_LT_PHY(display)) 5123 + pll_mismatch = !dpll_mgr->compare_hw_state(&pll->state.hw_state, 5124 + &dpll_hw_state); 5125 + else 5126 + pll_mismatch = memcmp(&pll->state.hw_state, &dpll_hw_state, 5127 + sizeof(dpll_hw_state)); 5128 + } 5129 + 5130 + if (INTEL_DISPLAY_STATE_WARN(display, pll_mismatch, 5123 5131 "%s: pll hw state mismatch\n", 5124 5132 pll->info->name)) { 5125 5133 struct drm_printer p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL);
-39
drivers/gpu/drm/i915/display/intel_lt_phy.c
··· 2268 2268 return true; 2269 2269 } 2270 2270 2271 - void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, 2272 - struct intel_crtc *crtc) 2273 - { 2274 - struct intel_display *display = to_intel_display(state); 2275 - struct intel_digital_port *dig_port; 2276 - const struct intel_crtc_state *new_crtc_state = 2277 - intel_atomic_get_new_crtc_state(state, crtc); 2278 - struct intel_encoder *encoder; 2279 - struct intel_lt_phy_pll_state pll_hw_state = {}; 2280 - const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state->dpll_hw_state.ltpll; 2281 - 2282 - if (DISPLAY_VER(display) < 35) 2283 - return; 2284 - 2285 - if (!new_crtc_state->hw.active) 2286 - return; 2287 - 2288 - /* intel_get_crtc_new_encoder() only works for modeset/fastset commits */ 2289 - if (!intel_crtc_needs_modeset(new_crtc_state) && 2290 - !intel_crtc_needs_fastset(new_crtc_state)) 2291 - return; 2292 - 2293 - encoder = intel_get_crtc_new_encoder(state, new_crtc_state); 2294 - intel_lt_phy_pll_readout_hw_state(encoder, &pll_hw_state); 2295 - 2296 - dig_port = enc_to_dig_port(encoder); 2297 - if (intel_tc_port_in_tbt_alt_mode(dig_port)) 2298 - return; 2299 - 2300 - INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[0] != pll_sw_state->config[0], 2301 - "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 0: (expected 0x%04x, found 0x%04x)", 2302 - crtc->base.base.id, crtc->base.name, 2303 - pll_sw_state->config[0], pll_hw_state.config[0]); 2304 - INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[2] != pll_sw_state->config[2], 2305 - "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 2: (expected 0x%04x, found 0x%04x)", 2306 - crtc->base.base.id, crtc->base.name, 2307 - pll_sw_state->config[2], pll_hw_state.config[2]); 2308 - } 2309 - 2310 2271 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, 2311 2272 struct intel_dpll *pll, 2312 2273 const struct intel_dpll_hw_state *dpll_hw_state)
-2
drivers/gpu/drm/i915/display/intel_lt_phy.h
··· 41 41 struct intel_dpll_hw_state *hw_state); 42 42 bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, 43 43 struct intel_lt_phy_pll_state *pll_state); 44 - void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, 45 - struct intel_crtc *crtc); 46 44 int 47 45 intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state, 48 46 u32 frequency_khz);
-1
drivers/gpu/drm/i915/display/intel_modeset_verify.c
··· 246 246 verify_crtc_state(state, crtc); 247 247 intel_dpll_state_verify(state, crtc); 248 248 intel_mpllb_state_verify(state, crtc); 249 - intel_lt_phy_pll_state_verify(state, crtc); 250 249 } 251 250 252 251 void intel_modeset_verify_disabled(struct intel_atomic_state *state)