Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/vga: Use MMIO for VGA registers on pre-g4x
On pre-g4x VGA registers are accessible via MMIO. Make use of
it so that we can avoid dealing with the VGA arbiter.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251208182637.334-14-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
+22
-11
+22
-11
drivers/gpu/drm/i915/display/intel_vga.c
+22
-11
drivers/gpu/drm/i915/display/intel_vga.c
···
58
58
return DISPLAY_VER(display) < 7;
59
59
}
60
60
61
+
static bool has_vga_mmio_access(struct intel_display *display)
62
+
{
63
+
/* WaEnableVGAAccessThroughIOPort:ctg+ */
64
+
return DISPLAY_VER(display) < 5 && !display->platform.g4x;
65
+
}
66
+
61
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static bool intel_pci_has_vga_io_decode(struct pci_dev *pdev)
62
68
{
63
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u16 cmd = 0;
···
112
106
return old & PCI_BRIDGE_CTL_VGA;
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}
114
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115
-
static bool intel_vga_get(struct intel_display *display)
109
+
static bool intel_vga_get(struct intel_display *display, bool mmio)
116
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{
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struct pci_dev *pdev = to_pci_dev(display->drm->dev);
118
112
119
-
/* WaEnableVGAAccessThroughIOPort:ctg+ */
113
+
if (mmio)
114
+
return false;
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115
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/*
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* Bypass the VGA arbiter on the iGPU and just enable
···
136
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return intel_pci_set_io_decode(pdev, true);
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130
}
138
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139
-
static void intel_vga_put(struct intel_display *display, bool io_decode)
132
+
static void intel_vga_put(struct intel_display *display, bool io_decode, bool mmio)
140
133
{
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struct pci_dev *pdev = to_pci_dev(display->drm->dev);
135
+
136
+
if (mmio)
137
+
return;
142
138
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/* see intel_vga_get() */
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intel_pci_set_io_decode(pdev, io_decode);
···
171
161
{
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struct pci_dev *pdev = to_pci_dev(display->drm->dev);
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i915_reg_t vga_reg = intel_vga_cntrl_reg(display);
164
+
bool mmio = has_vga_mmio_access(display);
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bool io_decode;
175
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u8 msr, sr1;
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167
u32 tmp;
···
216
205
goto reset_vgacntr;
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206
}
218
207
219
-
io_decode = intel_vga_get(display);
208
+
io_decode = intel_vga_get(display, mmio);
220
209
221
-
drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev));
210
+
drm_WARN_ON(display->drm, !mmio && !intel_pci_has_vga_io_decode(pdev));
222
211
223
-
intel_vga_write(display, VGA_SEQ_I, 0x01, false);
224
-
sr1 = intel_vga_read(display, VGA_SEQ_D, false);
212
+
intel_vga_write(display, VGA_SEQ_I, 0x01, mmio);
213
+
sr1 = intel_vga_read(display, VGA_SEQ_D, mmio);
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sr1 |= VGA_SR01_SCREEN_OFF;
226
-
intel_vga_write(display, VGA_SEQ_D, sr1, false);
215
+
intel_vga_write(display, VGA_SEQ_D, sr1, mmio);
227
216
228
-
msr = intel_vga_read(display, VGA_MIS_R, false);
217
+
msr = intel_vga_read(display, VGA_MIS_R, mmio);
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/*
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* Always disable VGA memory decode for iGPU so that
231
220
* intel_vga_set_decode() doesn't need to access VGA registers.
···
245
234
* RMbus NoClaim errors.
246
235
*/
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msr &= ~VGA_MIS_COLOR;
248
-
intel_vga_write(display, VGA_MIS_W, msr, false);
237
+
intel_vga_write(display, VGA_MIS_W, msr, mmio);
249
238
250
-
intel_vga_put(display, io_decode);
239
+
intel_vga_put(display, io_decode, mmio);
251
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/*
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* Inform the arbiter about VGA memory decode being disabled so