platform/x86/intel/pmc: Add debug attribute for Die C6 counter

Add a "die_c6_us_show" debugfs attribute. Reads the counter value using
Intel Platform Monitoring Technology (PMT) driver API. This counter is
useful for determining the idle residency of CPUs in the compute tile.
Also adds a missing forward declaration for punit_ep which was declared in
an earlier upstream commit but only used for the first time in this one.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-20-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

authored by

David E. Box and committed by

Hans de Goede 2 years ago 3621df43 935b8211

+59

2 changed files

expand all

drivers

platform

x86

intel

pmc

core.c

core.h

+55

drivers/platform/x86/intel/pmc/core.c

··· 20 20 #include <linux/pci.h> 21 21 #include <linux/slab.h> 22 22 #include <linux/suspend.h> 23 + #include <linux/units.h> 23 24 24 25 #include <asm/cpu_device_id.h> 25 26 #include <asm/intel-family.h> ··· 28 27 #include <asm/tsc.h> 29 28 30 29 #include "core.h" 30 + #include "../pmt/telemetry.h" 31 31 32 32 /* Maximum number of modes supported by platfoms that has low power mode capability */ 33 33 const char *pmc_lpm_modes[] = { ··· 824 822 } 825 823 DEFINE_SHOW_ATTRIBUTE(pmc_core_substate_req_regs); 826 824 825 + static unsigned int pmc_core_get_crystal_freq(void) 826 + { 827 + unsigned int eax_denominator, ebx_numerator, ecx_hz, edx; 828 + 829 + if (boot_cpu_data.cpuid_level < 0x15) 830 + return 0; 831 + 832 + eax_denominator = ebx_numerator = ecx_hz = edx = 0; 833 + 834 + /* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */ 835 + cpuid(0x15, &eax_denominator, &ebx_numerator, &ecx_hz, &edx); 836 + 837 + if (ebx_numerator == 0 || eax_denominator == 0) 838 + return 0; 839 + 840 + return ecx_hz; 841 + } 842 + 843 + static int pmc_core_die_c6_us_show(struct seq_file *s, void *unused) 844 + { 845 + struct pmc_dev *pmcdev = s->private; 846 + u64 die_c6_res, count; 847 + int ret; 848 + 849 + if (!pmcdev->crystal_freq) { 850 + dev_warn_once(&pmcdev->pdev->dev, "Crystal frequency unavailable\n"); 851 + return -ENXIO; 852 + } 853 + 854 + ret = pmt_telem_read(pmcdev->punit_ep, pmcdev->die_c6_offset, 855 + &count, 1); 856 + if (ret) 857 + return ret; 858 + 859 + die_c6_res = div64_u64(count * HZ_PER_MHZ, pmcdev->crystal_freq); 860 + seq_printf(s, "%llu\n", die_c6_res); 861 + 862 + return 0; 863 + } 864 + DEFINE_SHOW_ATTRIBUTE(pmc_core_die_c6_us); 865 + 827 866 static int pmc_core_lpm_latch_mode_show(struct seq_file *s, void *unused) 828 867 { 829 868 struct pmc_dev *pmcdev = s->private; ··· 1161 1118 pmcdev->dbgfs_dir, pmcdev, 1162 1119 &pmc_core_substate_req_regs_fops); 1163 1120 } 1121 + 1122 + if (pmcdev->has_die_c6) { 1123 + debugfs_create_file("die_c6_us_show", 0444, 1124 + pmcdev->dbgfs_dir, pmcdev, 1125 + &pmc_core_die_c6_us_fops); 1126 + } 1164 1127 } 1165 1128 1166 1129 static const struct x86_cpu_id intel_pmc_core_ids[] = { ··· 1261 1212 pci_dev_put(pmcdev->ssram_pcidev); 1262 1213 pci_disable_device(pmcdev->ssram_pcidev); 1263 1214 } 1215 + 1216 + if (pmcdev->punit_ep) 1217 + pmt_telem_unregister_endpoint(pmcdev->punit_ep); 1218 + 1264 1219 platform_set_drvdata(pdev, NULL); 1265 1220 mutex_destroy(&pmcdev->lock); 1266 1221 } ··· 1284 1231 pmcdev = devm_kzalloc(&pdev->dev, sizeof(*pmcdev), GFP_KERNEL); 1285 1232 if (!pmcdev) 1286 1233 return -ENOMEM; 1234 + 1235 + pmcdev->crystal_freq = pmc_core_get_crystal_freq(); 1287 1236 1288 1237 platform_set_drvdata(pdev, pmcdev); 1289 1238 pmcdev->pdev = pdev;

drivers/platform/x86/intel/pmc/core.h

··· 16 16 #include <linux/bits.h> 17 17 #include <linux/platform_device.h> 18 18 19 + struct telem_endpoint; 20 + 19 21 #define SLP_S0_RES_COUNTER_MASK GENMASK(31, 0) 20 22 21 23 #define PMC_BASE_ADDR_DEFAULT 0xFE000000 ··· 359 357 * @devs: pointer to an array of pmc pointers 360 358 * @pdev: pointer to platform_device struct 361 359 * @ssram_pcidev: pointer to pci device struct for the PMC SSRAM 360 + * @crystal_freq: crystal frequency from cpuid 362 361 * @dbgfs_dir: path to debugfs interface 363 362 * @pmc_xram_read_bit: flag to indicate whether PMC XRAM shadow registers 364 363 * used to read MPHY PG and PLL status are available ··· 377 374 struct dentry *dbgfs_dir; 378 375 struct platform_device *pdev; 379 376 struct pci_dev *ssram_pcidev; 377 + unsigned int crystal_freq; 380 378 int pmc_xram_read_bit; 381 379 struct mutex lock; /* generic mutex lock for PMC Core */ 382 380

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