Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/{i915,xe}/display: move irq calls to parent interface
Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.
Introduce new intel_parent.[ch] as the wrapper layer to chase the
function pointers and convert between generic and more specific display
types.
v2: Keep static wrappers in intel_display_irq.c (Ville)
v3: Full blown wrappers in intel_parent.[ch] (Ville)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/dd62dd52ef10d9ecf77da3bdf6a70f71193d141c.1763370931.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+119
-79
+1
drivers/gpu/drm/i915/Makefile
+1
drivers/gpu/drm/i915/Makefile
+12
-25
drivers/gpu/drm/i915/display/intel_display_irq.c
+12
-25
drivers/gpu/drm/i915/display/intel_display_irq.c
···
6
6
#include <drm/drm_print.h>
7
7
#include <drm/drm_vblank.h>
8
8
9
-
#include "i915_drv.h"
10
-
#include "i915_irq.h"
11
9
#include "i915_reg.h"
12
10
#include "icl_dsi_regs.h"
13
11
#include "intel_crtc.h"
···
23
25
#include "intel_fifo_underrun.h"
24
26
#include "intel_gmbus.h"
25
27
#include "intel_hotplug_irq.h"
28
+
#include "intel_parent.h"
26
29
#include "intel_pipe_crc_regs.h"
27
30
#include "intel_plane.h"
28
31
#include "intel_pmdemand.h"
···
159
160
void ilk_update_display_irq(struct intel_display *display,
160
161
u32 interrupt_mask, u32 enabled_irq_mask)
161
162
{
162
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
163
163
u32 new_val;
164
164
165
165
lockdep_assert_held(&display->irq.lock);
···
169
171
new_val |= (~enabled_irq_mask & interrupt_mask);
170
172
171
173
if (new_val != display->irq.ilk_de_imr_mask &&
172
-
!drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
174
+
!drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display))) {
173
175
display->irq.ilk_de_imr_mask = new_val;
174
176
intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
175
177
intel_de_posting_read(display, DEIMR);
···
195
197
void bdw_update_port_irq(struct intel_display *display,
196
198
u32 interrupt_mask, u32 enabled_irq_mask)
197
199
{
198
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
199
200
u32 new_val;
200
201
u32 old_val;
201
202
···
202
205
203
206
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
204
207
205
-
if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
208
+
if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
206
209
return;
207
210
208
211
old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
···
228
231
enum pipe pipe, u32 interrupt_mask,
229
232
u32 enabled_irq_mask)
230
233
{
231
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
232
234
u32 new_val;
233
235
234
236
lockdep_assert_held(&display->irq.lock);
235
237
236
238
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
237
239
238
-
if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
240
+
if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
239
241
return;
240
242
241
243
new_val = display->irq.de_pipe_imr_mask[pipe];
···
270
274
u32 interrupt_mask,
271
275
u32 enabled_irq_mask)
272
276
{
273
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
274
277
u32 sdeimr = intel_de_read(display, SDEIMR);
275
278
276
279
sdeimr &= ~interrupt_mask;
···
279
284
280
285
lockdep_assert_held(&display->irq.lock);
281
286
282
-
if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
287
+
if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
283
288
return;
284
289
285
290
intel_de_write(display, SDEIMR, sdeimr);
···
343
348
void i915_enable_pipestat(struct intel_display *display,
344
349
enum pipe pipe, u32 status_mask)
345
350
{
346
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
347
351
i915_reg_t reg = PIPESTAT(display, pipe);
348
352
u32 enable_mask;
349
353
···
351
357
pipe_name(pipe), status_mask);
352
358
353
359
lockdep_assert_held(&display->irq.lock);
354
-
drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
360
+
drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
355
361
356
362
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
357
363
return;
···
366
372
void i915_disable_pipestat(struct intel_display *display,
367
373
enum pipe pipe, u32 status_mask)
368
374
{
369
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
370
375
i915_reg_t reg = PIPESTAT(display, pipe);
371
376
u32 enable_mask;
372
377
···
374
381
pipe_name(pipe), status_mask);
375
382
376
383
lockdep_assert_held(&display->irq.lock);
377
-
drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
384
+
drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
378
385
379
386
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
380
387
return;
···
2167
2174
void gen8_irq_power_well_post_enable(struct intel_display *display,
2168
2175
u8 pipe_mask)
2169
2176
{
2170
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
2171
2177
u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
2172
2178
gen8_de_pipe_flip_done_mask(display);
2173
2179
enum pipe pipe;
2174
2180
2175
2181
spin_lock_irq(&display->irq.lock);
2176
2182
2177
-
if (!intel_irqs_enabled(dev_priv)) {
2183
+
if (!intel_parent_irq_enabled(display)) {
2178
2184
spin_unlock_irq(&display->irq.lock);
2179
2185
return;
2180
2186
}
···
2189
2197
void gen8_irq_power_well_pre_disable(struct intel_display *display,
2190
2198
u8 pipe_mask)
2191
2199
{
2192
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
2193
2200
enum pipe pipe;
2194
2201
2195
2202
spin_lock_irq(&display->irq.lock);
2196
2203
2197
-
if (!intel_irqs_enabled(dev_priv)) {
2204
+
if (!intel_parent_irq_enabled(display)) {
2198
2205
spin_unlock_irq(&display->irq.lock);
2199
2206
return;
2200
2207
}
···
2204
2213
spin_unlock_irq(&display->irq.lock);
2205
2214
2206
2215
/* make sure we're done processing display irqs */
2207
-
intel_synchronize_irq(dev_priv);
2216
+
intel_parent_irq_synchronize(display);
2208
2217
}
2209
2218
2210
2219
/*
···
2237
2246
2238
2247
void valleyview_enable_display_irqs(struct intel_display *display)
2239
2248
{
2240
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
2241
-
2242
2249
spin_lock_irq(&display->irq.lock);
2243
2250
2244
2251
if (display->irq.vlv_display_irqs_enabled)
···
2244
2255
2245
2256
display->irq.vlv_display_irqs_enabled = true;
2246
2257
2247
-
if (intel_irqs_enabled(dev_priv)) {
2258
+
if (intel_parent_irq_enabled(display)) {
2248
2259
_vlv_display_irq_reset(display);
2249
2260
_vlv_display_irq_postinstall(display);
2250
2261
}
···
2255
2266
2256
2267
void valleyview_disable_display_irqs(struct intel_display *display)
2257
2268
{
2258
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
2259
-
2260
2269
spin_lock_irq(&display->irq.lock);
2261
2270
2262
2271
if (!display->irq.vlv_display_irqs_enabled)
···
2262
2275
2263
2276
display->irq.vlv_display_irqs_enabled = false;
2264
2277
2265
-
if (intel_irqs_enabled(dev_priv))
2278
+
if (intel_parent_irq_enabled(display))
2266
2279
_vlv_display_irq_reset(display);
2267
2280
out:
2268
2281
spin_unlock_irq(&display->irq.lock);
+2
-3
drivers/gpu/drm/i915/display/intel_display_power.c
+2
-3
drivers/gpu/drm/i915/display/intel_display_power.c
···
11
11
#include "soc/intel_dram.h"
12
12
13
13
#include "i915_drv.h"
14
-
#include "i915_irq.h"
15
14
#include "i915_reg.h"
16
15
#include "intel_backlight_regs.h"
17
16
#include "intel_cdclk.h"
···
26
27
#include "intel_display_utils.h"
27
28
#include "intel_dmc.h"
28
29
#include "intel_mchbar_regs.h"
30
+
#include "intel_parent.h"
29
31
#include "intel_pch_refclk.h"
30
32
#include "intel_pcode.h"
31
33
#include "intel_pmdemand.h"
···
1202
1202
1203
1203
static void assert_can_disable_lcpll(struct intel_display *display)
1204
1204
{
1205
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
1206
1205
struct intel_crtc *crtc;
1207
1206
1208
1207
for_each_intel_crtc(display->drm, crtc)
···
1246
1247
* gen-specific and since we only disable LCPLL after we fully disable
1247
1248
* the interrupts, the check below should be enough.
1248
1249
*/
1249
-
INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
1250
+
INTEL_DISPLAY_STATE_WARN(display, intel_parent_irq_enabled(display),
1250
1251
"IRQs enabled\n");
1251
1252
}
1252
1253
+4
-11
drivers/gpu/drm/i915/display/intel_display_power_well.c
+4
-11
drivers/gpu/drm/i915/display/intel_display_power_well.c
···
7
7
8
8
#include <drm/drm_print.h>
9
9
10
-
#include "i915_drv.h"
11
-
#include "i915_irq.h"
12
10
#include "i915_reg.h"
13
11
#include "intel_backlight_regs.h"
14
12
#include "intel_combo_phy.h"
···
26
28
#include "intel_dpio_phy.h"
27
29
#include "intel_dpll.h"
28
30
#include "intel_hotplug.h"
31
+
#include "intel_parent.h"
29
32
#include "intel_pcode.h"
30
33
#include "intel_pps.h"
31
34
#include "intel_psr.h"
···
627
628
628
629
static void assert_can_enable_dc9(struct intel_display *display)
629
630
{
630
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
631
-
632
631
drm_WARN_ONCE(display->drm,
633
632
(intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
634
633
"DC9 already programmed to be enabled.\n");
···
638
641
intel_de_read(display, HSW_PWR_WELL_CTL2) &
639
642
HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
640
643
"Power well 2 on.\n");
641
-
drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
644
+
drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
642
645
"Interrupts not disabled yet.\n");
643
646
644
647
/*
···
652
655
653
656
static void assert_can_disable_dc9(struct intel_display *display)
654
657
{
655
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
656
-
657
-
drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
658
+
drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
658
659
"Interrupts not disabled yet.\n");
659
660
drm_WARN_ONCE(display->drm,
660
661
intel_de_read(display, DC_STATE_EN) &
···
1276
1281
1277
1282
static void vlv_display_power_well_deinit(struct intel_display *display)
1278
1283
{
1279
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
1280
-
1281
1284
valleyview_disable_display_irqs(display);
1282
1285
1283
1286
/* make sure we're done processing display irqs */
1284
-
intel_synchronize_irq(dev_priv);
1287
+
intel_parent_irq_synchronize(display);
1285
1288
1286
1289
vlv_pps_reset_all(display);
1287
1290
+2
-4
drivers/gpu/drm/i915/display/intel_gmbus.c
+2
-4
drivers/gpu/drm/i915/display/intel_gmbus.c
···
35
35
#include <drm/drm_print.h>
36
36
#include <drm/display/drm_hdcp_helper.h>
37
37
38
-
#include "i915_drv.h"
39
-
#include "i915_irq.h"
40
38
#include "i915_reg.h"
41
39
#include "intel_de.h"
42
40
#include "intel_display_regs.h"
···
42
44
#include "intel_display_wa.h"
43
45
#include "intel_gmbus.h"
44
46
#include "intel_gmbus_regs.h"
47
+
#include "intel_parent.h"
45
48
46
49
struct intel_gmbus {
47
50
struct i2c_adapter adapter;
···
390
391
391
392
static bool has_gmbus_irq(struct intel_display *display)
392
393
{
393
-
struct drm_i915_private *i915 = to_i915(display->drm);
394
394
/*
395
395
* encoder->shutdown() may want to use GMBUS
396
396
* after irqs have already been disabled.
397
397
*/
398
-
return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
398
+
return HAS_GMBUS_IRQ(display) && intel_parent_irq_enabled(display);
399
399
}
400
400
401
401
static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
+2
-4
drivers/gpu/drm/i915/display/intel_hotplug.c
+2
-4
drivers/gpu/drm/i915/display/intel_hotplug.c
···
27
27
#include <drm/drm_print.h>
28
28
#include <drm/drm_probe_helper.h>
29
29
30
-
#include "i915_drv.h"
31
-
#include "i915_irq.h"
32
30
#include "intel_connector.h"
33
31
#include "intel_display_core.h"
34
32
#include "intel_display_power.h"
···
37
39
#include "intel_hdcp.h"
38
40
#include "intel_hotplug.h"
39
41
#include "intel_hotplug_irq.h"
42
+
#include "intel_parent.h"
40
43
41
44
/**
42
45
* DOC: Hotplug
···
1176
1177
static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
1177
1178
{
1178
1179
struct intel_display *display = m->private;
1179
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
1180
1180
struct intel_hotplug *hotplug = &display->hotplug;
1181
1181
1182
1182
/* Synchronize with everything first in case there's been an HPD
1183
1183
* storm, but we haven't finished handling it in the kernel yet
1184
1184
*/
1185
-
intel_synchronize_irq(dev_priv);
1185
+
intel_parent_irq_synchronize(display);
1186
1186
flush_work(&display->hotplug.dig_port_work);
1187
1187
flush_delayed_work(&display->hotplug.hotplug_work);
1188
1188
-1
drivers/gpu/drm/i915/display/intel_lpe_audio.c
-1
drivers/gpu/drm/i915/display/intel_lpe_audio.c
+33
drivers/gpu/drm/i915/display/intel_parent.c
+33
drivers/gpu/drm/i915/display/intel_parent.c
···
1
+
// SPDX-License-Identifier: MIT
2
+
/* Copyright © 2025 Intel Corporation */
3
+
4
+
/*
5
+
* Convenience wrapper functions to call the parent interface functions:
6
+
*
7
+
* - display->parent->SUBSTRUCT->FUNCTION()
8
+
* - display->parent->FUNCTION()
9
+
*
10
+
* All functions here should be named accordingly:
11
+
*
12
+
* - intel_parent_SUBSTRUCT_FUNCTION()
13
+
* - intel_parent_FUNCTION()
14
+
*
15
+
* These functions may use display driver specific types for parameters and
16
+
* return values, translating them to and from the generic types used in the
17
+
* function pointer interface.
18
+
*/
19
+
20
+
#include <drm/intel/display_parent_interface.h>
21
+
22
+
#include "intel_display_core.h"
23
+
#include "intel_parent.h"
24
+
25
+
bool intel_parent_irq_enabled(struct intel_display *display)
26
+
{
27
+
return display->parent->irq->enabled(display->drm);
28
+
}
29
+
30
+
void intel_parent_irq_synchronize(struct intel_display *display)
31
+
{
32
+
display->parent->irq->synchronize(display->drm);
33
+
}
+14
drivers/gpu/drm/i915/display/intel_parent.h
+14
drivers/gpu/drm/i915/display/intel_parent.h
···
1
+
/* SPDX-License-Identifier: MIT */
2
+
/* Copyright © 2025 Intel Corporation */
3
+
4
+
#ifndef __INTEL_PARENT_H__
5
+
#define __INTEL_PARENT_H__
6
+
7
+
#include <linux/types.h>
8
+
9
+
struct intel_display;
10
+
11
+
bool intel_parent_irq_enabled(struct intel_display *display);
12
+
void intel_parent_irq_synchronize(struct intel_display *display);
13
+
14
+
#endif /* __INTEL_PARENT_H__ */
+2
-4
drivers/gpu/drm/i915/display/intel_pipe_crc.c
+2
-4
drivers/gpu/drm/i915/display/intel_pipe_crc.c
···
30
30
31
31
#include <drm/drm_print.h>
32
32
33
-
#include "i915_drv.h"
34
-
#include "i915_irq.h"
35
33
#include "intel_atomic.h"
36
34
#include "intel_de.h"
37
35
#include "intel_display_irq.h"
38
36
#include "intel_display_regs.h"
39
37
#include "intel_display_types.h"
38
+
#include "intel_parent.h"
40
39
#include "intel_pipe_crc.h"
41
40
#include "intel_pipe_crc_regs.h"
42
41
···
657
658
void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
658
659
{
659
660
struct intel_display *display = to_intel_display(crtc);
660
-
struct drm_i915_private *dev_priv = to_i915(display->drm);
661
661
struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
662
662
enum pipe pipe = crtc->pipe;
663
663
···
667
669
668
670
intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
669
671
intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
670
-
intel_synchronize_irq(dev_priv);
672
+
intel_parent_irq_synchronize(display);
671
673
}
+1
drivers/gpu/drm/i915/i915_driver.c
+1
drivers/gpu/drm/i915/i915_driver.c
+16
drivers/gpu/drm/i915/i915_irq.c
+16
drivers/gpu/drm/i915/i915_irq.c
···
33
33
34
34
#include <drm/drm_drv.h>
35
35
#include <drm/drm_print.h>
36
+
#include <drm/intel/display_parent_interface.h>
36
37
37
38
#include "display/intel_display_irq.h"
38
39
#include "display/intel_hotplug.h"
···
1253
1252
{
1254
1253
synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
1255
1254
}
1255
+
1256
+
static bool _intel_irq_enabled(struct drm_device *drm)
1257
+
{
1258
+
return intel_irqs_enabled(to_i915(drm));
1259
+
}
1260
+
1261
+
static void _intel_irq_synchronize(struct drm_device *drm)
1262
+
{
1263
+
return intel_synchronize_irq(to_i915(drm));
1264
+
}
1265
+
1266
+
const struct intel_display_irq_interface i915_display_irq_interface = {
1267
+
.enabled = _intel_irq_enabled,
1268
+
.synchronize = _intel_irq_synchronize,
1269
+
};
+2
drivers/gpu/drm/i915/i915_irq.h
+2
drivers/gpu/drm/i915/i915_irq.h
+2
-3
drivers/gpu/drm/xe/Makefile
+2
-3
drivers/gpu/drm/xe/Makefile
···
187
187
188
188
# i915 Display compat #defines and #includes
189
189
subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
190
-
-I$(src)/display/ext \
191
190
-I$(src)/compat-i915-headers \
192
191
-I$(srctree)/drivers/gpu/drm/i915/display/ \
193
192
-Ddrm_i915_private=xe_device
···
203
204
204
205
# Display code specific to xe
205
206
xe-$(CONFIG_DRM_XE_DISPLAY) += \
206
-
display/ext/i915_irq.o \
207
207
display/intel_bo.o \
208
208
display/intel_fb_bo.o \
209
209
display/intel_fbdev_fb.o \
···
298
300
i915-display/intel_modeset_setup.o \
299
301
i915-display/intel_modeset_verify.o \
300
302
i915-display/intel_panel.o \
303
+
i915-display/intel_parent.o \
304
+
i915-display/intel_pch.o \
301
305
i915-display/intel_pfit.o \
302
306
i915-display/intel_plane.o \
303
307
i915-display/intel_pmdemand.o \
304
-
i915-display/intel_pch.o \
305
308
i915-display/intel_pps.o \
306
309
i915-display/intel_psr.o \
307
310
i915-display/intel_qp_tables.o \
-6
drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
-6
drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
-18
drivers/gpu/drm/xe/display/ext/i915_irq.c
-18
drivers/gpu/drm/xe/display/ext/i915_irq.c
···
1
-
// SPDX-License-Identifier: MIT
2
-
/*
3
-
* Copyright © 2023 Intel Corporation
4
-
*/
5
-
6
-
#include "i915_irq.h"
7
-
#include "i915_reg.h"
8
-
#include "intel_uncore.h"
9
-
10
-
bool intel_irqs_enabled(struct xe_device *xe)
11
-
{
12
-
return atomic_read(&xe->irq.enabled);
13
-
}
14
-
15
-
void intel_synchronize_irq(struct xe_device *xe)
16
-
{
17
-
synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
18
-
}
+18
drivers/gpu/drm/xe/display/xe_display.c
+18
drivers/gpu/drm/xe/display/xe_display.c
···
516
516
intel_display_device_remove(display);
517
517
}
518
518
519
+
static bool irq_enabled(struct drm_device *drm)
520
+
{
521
+
struct xe_device *xe = to_xe_device(drm);
522
+
523
+
return atomic_read(&xe->irq.enabled);
524
+
}
525
+
526
+
static void irq_synchronize(struct drm_device *drm)
527
+
{
528
+
synchronize_irq(to_pci_dev(drm->dev)->irq);
529
+
}
530
+
531
+
static const struct intel_display_irq_interface xe_display_irq_interface = {
532
+
.enabled = irq_enabled,
533
+
.synchronize = irq_synchronize,
534
+
};
535
+
519
536
static const struct intel_display_parent_interface parent = {
520
537
.rpm = &xe_display_rpm_interface,
538
+
.irq = &xe_display_irq_interface,
521
539
};
522
540
523
541
/**
+8
include/drm/intel/display_parent_interface.h
+8
include/drm/intel/display_parent_interface.h
···
25
25
void (*assert_unblock)(const struct drm_device *drm);
26
26
};
27
27
28
+
struct intel_display_irq_interface {
29
+
bool (*enabled)(struct drm_device *drm);
30
+
void (*synchronize)(struct drm_device *drm);
31
+
};
32
+
28
33
/**
29
34
* struct intel_display_parent_interface - services parent driver provides to display
30
35
*
···
45
40
struct intel_display_parent_interface {
46
41
/** @rpm: Runtime PM functions */
47
42
const struct intel_display_rpm_interface *rpm;
43
+
44
+
/** @irq: IRQ interface */
45
+
const struct intel_display_irq_interface *irq;
48
46
};
49
47
50
48
#endif