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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
clk: qcom: msm8996-cpu: Unify cluster order
The power cluster comes before the performance cluster. Make
everything in the driver follow this order.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220621160621.24415-4-y.oudjana@protonmail.com
authored by
Yassine Oudjana
and committed by
Bjorn Andersson
382139bf
de37e021
+32
-32
+32
-32
drivers/clk/qcom/clk-cpu-8996.c
+32
-32
drivers/clk/qcom/clk-cpu-8996.c
···
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.early_output_mask = BIT(3),
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};
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-
static struct clk_alpha_pll perfcl_pll = {
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.offset = PERFCL_REG_OFFSET,
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.regs = prim_pll_regs,
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.flags = SUPPORTS_DYNAMIC_UPDATE | SUPPORTS_FSM_MODE,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "perfcl_pll",
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.parent_names = (const char *[]){ "xo" },
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.num_parents = 1,
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.ops = &clk_alpha_pll_huayra_ops,
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},
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};
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-
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static struct clk_alpha_pll pwrcl_pll = {
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.offset = PWRCL_REG_OFFSET,
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.regs = prim_pll_regs,
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.flags = SUPPORTS_DYNAMIC_UPDATE | SUPPORTS_FSM_MODE,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "pwrcl_pll",
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.parent_names = (const char *[]){ "xo" },
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.num_parents = 1,
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.ops = &clk_alpha_pll_huayra_ops,
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},
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};
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+
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static struct clk_alpha_pll perfcl_pll = {
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.offset = PERFCL_REG_OFFSET,
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.regs = prim_pll_regs,
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.flags = SUPPORTS_DYNAMIC_UPDATE | SUPPORTS_FSM_MODE,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "perfcl_pll",
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.parent_names = (const char *[]){ "xo" },
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.num_parents = 1,
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.ops = &clk_alpha_pll_huayra_ops,
···
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.early_output_mask = BIT(3),
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};
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static struct clk_alpha_pll perfcl_alt_pll = {
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.offset = PERFCL_REG_OFFSET + ALT_PLL_OFFSET,
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.regs = alt_pll_regs,
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.vco_table = alt_pll_vco_modes,
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.num_vco = ARRAY_SIZE(alt_pll_vco_modes),
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.flags = SUPPORTS_OFFLINE_REQ | SUPPORTS_FSM_MODE,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "perfcl_alt_pll",
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.parent_names = (const char *[]){ "xo" },
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.num_parents = 1,
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.ops = &clk_alpha_pll_hwfsm_ops,
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},
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};
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static struct clk_alpha_pll pwrcl_alt_pll = {
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.offset = PWRCL_REG_OFFSET + ALT_PLL_OFFSET,
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.regs = alt_pll_regs,
···
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.flags = SUPPORTS_OFFLINE_REQ | SUPPORTS_FSM_MODE,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "pwrcl_alt_pll",
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.parent_names = (const char *[]){ "xo" },
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.num_parents = 1,
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.ops = &clk_alpha_pll_hwfsm_ops,
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},
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};
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static struct clk_alpha_pll perfcl_alt_pll = {
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.offset = PERFCL_REG_OFFSET + ALT_PLL_OFFSET,
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.regs = alt_pll_regs,
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.vco_table = alt_pll_vco_modes,
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.num_vco = ARRAY_SIZE(alt_pll_vco_modes),
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.flags = SUPPORTS_OFFLINE_REQ | SUPPORTS_FSM_MODE,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "perfcl_alt_pll",
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.parent_names = (const char *[]){ "xo" },
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.num_parents = 1,
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.ops = &clk_alpha_pll_hwfsm_ops,
···
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};
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static struct clk_regmap *cpu_msm8996_clks[] = {
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&perfcl_pll.clkr,
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&pwrcl_pll.clkr,
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&perfcl_alt_pll.clkr,
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&perfcl_pll.clkr,
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&pwrcl_alt_pll.clkr,
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&perfcl_smux.clkr,
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&perfcl_alt_pll.clkr,
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&pwrcl_smux.clkr,
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&perfcl_pmux.clkr,
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&perfcl_smux.clkr,
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&pwrcl_pmux.clkr,
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&perfcl_pmux.clkr,
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};
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static int qcom_cpu_clk_msm8996_register_clks(struct device *dev,
···
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return ret;
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}
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clk_alpha_pll_configure(&perfcl_pll, regmap, &hfpll_config);
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clk_alpha_pll_configure(&pwrcl_pll, regmap, &hfpll_config);
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clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config);
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clk_alpha_pll_configure(&perfcl_pll, regmap, &hfpll_config);
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clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config);
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clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config);
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/* Enable alt PLLs */
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clk_prepare_enable(pwrcl_alt_pll.clkr.hw.clk);