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spi: sh-msiof: SITMDR2 and SIRMDR2 bitfield conversion

Convert MSIOF Transmit and Receive Mode Register 2 field accesses to use
the FIELD_PREP() bitfield access macro.

This gets rid of explicit shifts and custom field preparation macros.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/135b92d010a71e2c224feab3a5792724b4e60ff1.1747401908.git.geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Geert Uytterhoeven and committed by
Mark Brown 386cc520 6bae252a

+5 -4
+5 -4
drivers/spi/spi-sh-msiof.c
··· 100 100 /* 0=MSIOF_SYNC, 1=MSIOF_SS1, 2=MSIOF_SS2 */ 101 101 102 102 /* SITMDR2 and SIRMDR2 */ 103 - #define SIMDR2_BITLEN1(i) (((i) - 1) << 24) /* Data Size (8-32 bits) */ 104 - #define SIMDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */ 103 + #define SIMDR2_BITLEN1 GENMASK(28, 24) /* Data Size (8-32 bits) */ 104 + #define SIMDR2_WDLEN1 GENMASK(23, 16) /* Word Count (1-64/256 (SH, A1))) */ 105 105 #define SIMDR2_GRPMASK1 BIT(0) /* Group Output Mask 1 (SH, A1) */ 106 106 107 107 /* SITSCR and SIRSCR */ ··· 397 397 const void *tx_buf, void *rx_buf, 398 398 u32 bits, u32 words) 399 399 { 400 - u32 dr2 = SIMDR2_BITLEN1(bits) | SIMDR2_WDLEN1(words); 400 + u32 dr2 = FIELD_PREP(SIMDR2_BITLEN1, bits - 1) | 401 + FIELD_PREP(SIMDR2_WDLEN1, words - 1); 401 402 402 403 if (tx_buf || (p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) 403 404 sh_msiof_write(p, SITMDR2, dr2); ··· 932 931 struct spi_transfer *t) 933 932 { 934 933 struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr); 934 + unsigned int max_wdlen = FIELD_MAX(SIMDR2_WDLEN1) + 1; 935 935 void (*copy32)(u32 *, const u32 *, unsigned int); 936 936 void (*tx_fifo)(struct sh_msiof_spi_priv *, const void *, unsigned int, 937 937 unsigned int); ··· 942 940 void *rx_buf = t->rx_buf; 943 941 unsigned int len = t->len; 944 942 unsigned int bits = t->bits_per_word; 945 - unsigned int max_wdlen = 256; 946 943 unsigned int bytes_per_word; 947 944 unsigned int words; 948 945 int n;