Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
"Mostly stable material, a lot of ARM fixes"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (22 commits)
sched: access local runqueue directly in single_task_running
arm/arm64: KVM: Remove 'config KVM_ARM_MAX_VCPUS'
arm64: KVM: Remove all traces of the ThumbEE registers
arm: KVM: Disable virtual timer even if the guest is not using it
arm64: KVM: Disable virtual timer even if the guest is not using it
arm/arm64: KVM: vgic: Check for !irqchip_in_kernel() when mapping resources
KVM: s390: Replace incorrect atomic_or with atomic_andnot
arm: KVM: Fix incorrect device to IPA mapping
arm64: KVM: Fix user access for debug registers
KVM: vmx: fix VPID is 0000H in non-root operation
KVM: add halt_attempted_poll to VCPU stats
kvm: fix zero length mmio searching
kvm: fix double free for fast mmio eventfd
kvm: factor out core eventfd assign/deassign logic
kvm: don't try to register to KVM_FAST_MMIO_BUS for non mmio eventfd
KVM: make the declaration of functions within 80 characters
KVM: arm64: add workaround for Cortex-A57 erratum #852523
KVM: fix polling for guest halt continued even if disable it
arm/arm64: KVM: Fix PSCI affinity info return value for non valid cores
arm64: KVM: set {v,}TCR_EL2 RES1 bits
...
+199
-165
+3
-6
arch/arm/include/asm/kvm_host.h
+3
-6
arch/arm/include/asm/kvm_host.h
···
29
29
30
30
#define __KVM_HAVE_ARCH_INTC_INITIALIZED
31
31
32
-
#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
33
-
#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
34
-
#else
35
-
#define KVM_MAX_VCPUS 0
36
-
#endif
37
-
38
32
#define KVM_USER_MEM_SLOTS 32
39
33
#define KVM_PRIVATE_MEM_SLOTS 4
40
34
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
···
37
43
#define KVM_VCPU_MAX_FEATURES 2
38
44
39
45
#include <kvm/arm_vgic.h>
46
+
47
+
#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
40
48
41
49
u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
42
50
int __attribute_const__ kvm_target_cpu(void);
···
144
148
145
149
struct kvm_vcpu_stat {
146
150
u32 halt_successful_poll;
151
+
u32 halt_attempted_poll;
147
152
u32 halt_wakeup;
148
153
};
149
154
-11
arch/arm/kvm/Kconfig
-11
arch/arm/kvm/Kconfig
···
45
45
---help---
46
46
Provides host support for ARM processors.
47
47
48
-
config KVM_ARM_MAX_VCPUS
49
-
int "Number maximum supported virtual CPUs per VM"
50
-
depends on KVM_ARM_HOST
51
-
default 4
52
-
help
53
-
Static number of max supported virtual CPUs per VM.
54
-
55
-
If you choose a high number, the vcpu structures will be quite
56
-
large, so only choose a reasonable number that you expect to
57
-
actually use.
58
-
59
48
endif # VIRTUALIZATION
+1
-1
arch/arm/kvm/arm.c
+1
-1
arch/arm/kvm/arm.c
···
446
446
* Map the VGIC hardware resources before running a vcpu the first
447
447
* time on this VM.
448
448
*/
449
-
if (unlikely(!vgic_ready(kvm))) {
449
+
if (unlikely(irqchip_in_kernel(kvm) && !vgic_ready(kvm))) {
450
450
ret = kvm_vgic_map_resources(kvm);
451
451
if (ret)
452
452
return ret;
+4
-2
arch/arm/kvm/interrupts_head.S
+4
-2
arch/arm/kvm/interrupts_head.S
···
515
515
516
516
mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL
517
517
str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
518
-
bic r2, #1 @ Clear ENABLE
519
-
mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
518
+
520
519
isb
521
520
522
521
mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
···
528
529
mcrr p15, 4, r2, r2, c14 @ CNTVOFF
529
530
530
531
1:
532
+
mov r2, #0 @ Clear ENABLE
533
+
mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
534
+
531
535
@ Allow physical timer/counter access for the host
532
536
mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
533
537
orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
+4
-2
arch/arm/kvm/mmu.c
+4
-2
arch/arm/kvm/mmu.c
···
1792
1792
if (vma->vm_flags & VM_PFNMAP) {
1793
1793
gpa_t gpa = mem->guest_phys_addr +
1794
1794
(vm_start - mem->userspace_addr);
1795
-
phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) +
1796
-
vm_start - vma->vm_start;
1795
+
phys_addr_t pa;
1796
+
1797
+
pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1798
+
pa += vm_start - vma->vm_start;
1797
1799
1798
1800
/* IO region dirty page logging not allowed */
1799
1801
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
+8
-4
arch/arm/kvm/psci.c
+8
-4
arch/arm/kvm/psci.c
···
126
126
127
127
static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
128
128
{
129
-
int i;
129
+
int i, matching_cpus = 0;
130
130
unsigned long mpidr;
131
131
unsigned long target_affinity;
132
132
unsigned long target_affinity_mask;
···
151
151
*/
152
152
kvm_for_each_vcpu(i, tmp, kvm) {
153
153
mpidr = kvm_vcpu_get_mpidr_aff(tmp);
154
-
if (((mpidr & target_affinity_mask) == target_affinity) &&
155
-
!tmp->arch.pause) {
156
-
return PSCI_0_2_AFFINITY_LEVEL_ON;
154
+
if ((mpidr & target_affinity_mask) == target_affinity) {
155
+
matching_cpus++;
156
+
if (!tmp->arch.pause)
157
+
return PSCI_0_2_AFFINITY_LEVEL_ON;
157
158
}
158
159
}
160
+
161
+
if (!matching_cpus)
162
+
return PSCI_RET_INVALID_PARAMS;
159
163
160
164
return PSCI_0_2_AFFINITY_LEVEL_OFF;
161
165
}
+7
-4
arch/arm64/include/asm/kvm_arm.h
+7
-4
arch/arm64/include/asm/kvm_arm.h
···
95
95
SCTLR_EL2_SA | SCTLR_EL2_I)
96
96
97
97
/* TCR_EL2 Registers bits */
98
+
#define TCR_EL2_RES1 ((1 << 31) | (1 << 23))
98
99
#define TCR_EL2_TBI (1 << 20)
99
100
#define TCR_EL2_PS (7 << 16)
100
101
#define TCR_EL2_PS_40B (2 << 16)
···
107
106
#define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \
108
107
TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ)
109
108
110
-
#define TCR_EL2_FLAGS (TCR_EL2_PS_40B)
109
+
#define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B)
111
110
112
111
/* VTCR_EL2 Registers bits */
112
+
#define VTCR_EL2_RES1 (1 << 31)
113
113
#define VTCR_EL2_PS_MASK (7 << 16)
114
114
#define VTCR_EL2_TG0_MASK (1 << 14)
115
115
#define VTCR_EL2_TG0_4K (0 << 14)
···
149
147
*/
150
148
#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \
151
149
VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \
152
-
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B)
150
+
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \
151
+
VTCR_EL2_RES1)
153
152
#define VTTBR_X (38 - VTCR_EL2_T0SZ_40B)
154
153
#else
155
154
/*
···
161
158
*/
162
159
#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \
163
160
VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \
164
-
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B)
161
+
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \
162
+
VTCR_EL2_RES1)
165
163
#define VTTBR_X (37 - VTCR_EL2_T0SZ_40B)
166
164
#endif
167
165
···
172
168
#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)
173
169
174
170
/* Hyp System Trap Register */
175
-
#define HSTR_EL2_TTEE (1 << 16)
176
171
#define HSTR_EL2_T(x) (1 << x)
177
172
178
173
/* Hyp Coproccessor Trap Register Shifts */
+1
-3
arch/arm64/include/asm/kvm_asm.h
+1
-3
arch/arm64/include/asm/kvm_asm.h
···
53
53
#define IFSR32_EL2 25 /* Instruction Fault Status Register */
54
54
#define FPEXC32_EL2 26 /* Floating-Point Exception Control Register */
55
55
#define DBGVCR32_EL2 27 /* Debug Vector Catch Register */
56
-
#define TEECR32_EL1 28 /* ThumbEE Configuration Register */
57
-
#define TEEHBR32_EL1 29 /* ThumbEE Handler Base Register */
58
-
#define NR_SYS_REGS 30
56
+
#define NR_SYS_REGS 28
59
57
60
58
/* 32bit mapping */
61
59
#define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
+3
-6
arch/arm64/include/asm/kvm_host.h
+3
-6
arch/arm64/include/asm/kvm_host.h
···
30
30
31
31
#define __KVM_HAVE_ARCH_INTC_INITIALIZED
32
32
33
-
#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
34
-
#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
35
-
#else
36
-
#define KVM_MAX_VCPUS 0
37
-
#endif
38
-
39
33
#define KVM_USER_MEM_SLOTS 32
40
34
#define KVM_PRIVATE_MEM_SLOTS 4
41
35
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
42
36
43
37
#include <kvm/arm_vgic.h>
44
38
#include <kvm/arm_arch_timer.h>
39
+
40
+
#define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
45
41
46
42
#define KVM_VCPU_MAX_FEATURES 3
47
43
···
191
195
192
196
struct kvm_vcpu_stat {
193
197
u32 halt_successful_poll;
198
+
u32 halt_attempted_poll;
194
199
u32 halt_wakeup;
195
200
};
196
201
-11
arch/arm64/kvm/Kconfig
-11
arch/arm64/kvm/Kconfig
···
41
41
---help---
42
42
Provides host support for ARM processors.
43
43
44
-
config KVM_ARM_MAX_VCPUS
45
-
int "Number maximum supported virtual CPUs per VM"
46
-
depends on KVM_ARM_HOST
47
-
default 4
48
-
help
49
-
Static number of max supported virtual CPUs per VM.
50
-
51
-
If you choose a high number, the vcpu structures will be quite
52
-
large, so only choose a reasonable number that you expect to
53
-
actually use.
54
-
55
44
endif # VIRTUALIZATION
+10
-21
arch/arm64/kvm/hyp.S
+10
-21
arch/arm64/kvm/hyp.S
···
433
433
mrs x5, ifsr32_el2
434
434
stp x4, x5, [x3]
435
435
436
-
skip_fpsimd_state x8, 3f
436
+
skip_fpsimd_state x8, 2f
437
437
mrs x6, fpexc32_el2
438
438
str x6, [x3, #16]
439
-
3:
440
-
skip_debug_state x8, 2f
439
+
2:
440
+
skip_debug_state x8, 1f
441
441
mrs x7, dbgvcr32_el2
442
442
str x7, [x3, #24]
443
-
2:
444
-
skip_tee_state x8, 1f
445
-
446
-
add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
447
-
mrs x4, teecr32_el1
448
-
mrs x5, teehbr32_el1
449
-
stp x4, x5, [x3]
450
443
1:
451
444
.endm
452
445
···
459
466
msr dacr32_el2, x4
460
467
msr ifsr32_el2, x5
461
468
462
-
skip_debug_state x8, 2f
469
+
skip_debug_state x8, 1f
463
470
ldr x7, [x3, #24]
464
471
msr dbgvcr32_el2, x7
465
-
2:
466
-
skip_tee_state x8, 1f
467
-
468
-
add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
469
-
ldp x4, x5, [x3]
470
-
msr teecr32_el1, x4
471
-
msr teehbr32_el1, x5
472
472
1:
473
473
.endm
474
474
···
556
570
mrs x3, cntv_ctl_el0
557
571
and x3, x3, #3
558
572
str w3, [x0, #VCPU_TIMER_CNTV_CTL]
559
-
bic x3, x3, #1 // Clear Enable
560
-
msr cntv_ctl_el0, x3
561
573
562
574
isb
563
575
···
563
579
str x3, [x0, #VCPU_TIMER_CNTV_CVAL]
564
580
565
581
1:
582
+
// Disable the virtual timer
583
+
msr cntv_ctl_el0, xzr
584
+
566
585
// Allow physical timer/counter access for the host
567
586
mrs x2, cnthctl_el2
568
587
orr x2, x2, #3
···
740
753
// Guest context
741
754
add x2, x0, #VCPU_CONTEXT
742
755
756
+
// We must restore the 32-bit state before the sysregs, thanks
757
+
// to Cortex-A57 erratum #852523.
758
+
restore_guest_32bit_state
743
759
bl __restore_sysregs
744
760
745
761
skip_debug_state x3, 1f
···
750
760
kern_hyp_va x3
751
761
bl __restore_debug
752
762
1:
753
-
restore_guest_32bit_state
754
763
restore_guest_regs
755
764
756
765
// That's it, no more messing around.
+4
-11
arch/arm64/kvm/sys_regs.c
+4
-11
arch/arm64/kvm/sys_regs.c
···
272
272
{
273
273
__u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg];
274
274
275
-
if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
275
+
if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
276
276
return -EFAULT;
277
277
return 0;
278
278
}
···
314
314
{
315
315
__u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg];
316
316
317
-
if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
317
+
if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
318
318
return -EFAULT;
319
319
320
320
return 0;
···
358
358
{
359
359
__u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg];
360
360
361
-
if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
361
+
if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
362
362
return -EFAULT;
363
363
return 0;
364
364
}
···
400
400
{
401
401
__u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg];
402
402
403
-
if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
403
+
if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
404
404
return -EFAULT;
405
405
return 0;
406
406
}
···
538
538
/* DBGAUTHSTATUS_EL1 */
539
539
{ Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),
540
540
trap_dbgauthstatus_el1 },
541
-
542
-
/* TEECR32_EL1 */
543
-
{ Op0(0b10), Op1(0b010), CRn(0b0000), CRm(0b0000), Op2(0b000),
544
-
NULL, reset_val, TEECR32_EL1, 0 },
545
-
/* TEEHBR32_EL1 */
546
-
{ Op0(0b10), Op1(0b010), CRn(0b0001), CRm(0b0000), Op2(0b000),
547
-
NULL, reset_val, TEEHBR32_EL1, 0 },
548
541
549
542
/* MDCCSR_EL1 */
550
543
{ Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),
+1
arch/mips/include/asm/kvm_host.h
+1
arch/mips/include/asm/kvm_host.h
+1
arch/mips/kvm/mips.c
+1
arch/mips/kvm/mips.c
···
55
55
{ "msa_disabled", VCPU_STAT(msa_disabled_exits), KVM_STAT_VCPU },
56
56
{ "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
57
57
{ "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU },
58
+
{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), KVM_STAT_VCPU },
58
59
{ "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
59
60
{NULL}
60
61
};
+1
arch/powerpc/include/asm/kvm_host.h
+1
arch/powerpc/include/asm/kvm_host.h
+1
arch/powerpc/kvm/book3s.c
+1
arch/powerpc/kvm/book3s.c
···
53
53
{ "ext_intr", VCPU_STAT(ext_intr_exits) },
54
54
{ "queue_intr", VCPU_STAT(queue_intr) },
55
55
{ "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
56
+
{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
56
57
{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
57
58
{ "pf_storage", VCPU_STAT(pf_storage) },
58
59
{ "sp_storage", VCPU_STAT(sp_storage) },
+1
arch/powerpc/kvm/booke.c
+1
arch/powerpc/kvm/booke.c
···
63
63
{ "dec", VCPU_STAT(dec_exits) },
64
64
{ "ext_intr", VCPU_STAT(ext_intr_exits) },
65
65
{ "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66
+
{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
66
67
{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
67
68
{ "doorbell", VCPU_STAT(dbell_exits) },
68
69
{ "guest doorbell", VCPU_STAT(gdbell_exits) },
+1
arch/s390/include/asm/kvm_host.h
+1
arch/s390/include/asm/kvm_host.h
+2
-1
arch/s390/kvm/kvm-s390.c
+2
-1
arch/s390/kvm/kvm-s390.c
···
63
63
{ "exit_program_interruption", VCPU_STAT(exit_program_interruption) },
64
64
{ "exit_instr_and_program_int", VCPU_STAT(exit_instr_and_program) },
65
65
{ "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66
+
{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
66
67
{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
67
68
{ "instruction_lctlg", VCPU_STAT(instruction_lctlg) },
68
69
{ "instruction_lctl", VCPU_STAT(instruction_lctl) },
···
1575
1574
1576
1575
static void kvm_s390_vcpu_request_handled(struct kvm_vcpu *vcpu)
1577
1576
{
1578
-
atomic_or(PROG_REQUEST, &vcpu->arch.sie_block->prog20);
1577
+
atomic_andnot(PROG_REQUEST, &vcpu->arch.sie_block->prog20);
1579
1578
}
1580
1579
1581
1580
/*
+1
arch/x86/include/asm/kvm_host.h
+1
arch/x86/include/asm/kvm_host.h
+2
arch/x86/kvm/vmx.c
+2
arch/x86/kvm/vmx.c
···
6064
6064
memcpy(vmx_msr_bitmap_longmode_x2apic,
6065
6065
vmx_msr_bitmap_longmode, PAGE_SIZE);
6066
6066
6067
+
set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
6068
+
6067
6069
if (enable_apicv) {
6068
6070
for (msr = 0x800; msr <= 0x8ff; msr++)
6069
6071
vmx_disable_intercept_msr_read_x2apic(msr);
+1
arch/x86/kvm/x86.c
+1
arch/x86/kvm/x86.c
···
149
149
{ "nmi_window", VCPU_STAT(nmi_window_exits) },
150
150
{ "halt_exits", VCPU_STAT(halt_exits) },
151
151
{ "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
152
+
{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
152
153
{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
153
154
{ "hypercalls", VCPU_STAT(hypercalls) },
154
155
{ "request_irq", VCPU_STAT(request_irq_exits) },
+1
-5
include/kvm/arm_vgic.h
+1
-5
include/kvm/arm_vgic.h
···
35
35
#define VGIC_V3_MAX_LRS 16
36
36
#define VGIC_MAX_IRQS 1024
37
37
#define VGIC_V2_MAX_CPUS 8
38
-
39
-
/* Sanity checks... */
40
-
#if (KVM_MAX_VCPUS > 255)
41
-
#error Too many KVM VCPUs, the VGIC only supports up to 255 VCPUs for now
42
-
#endif
38
+
#define VGIC_V3_MAX_CPUS 255
43
39
44
40
#if (VGIC_NR_IRQS_LEGACY & 31)
45
41
#error "VGIC_NR_IRQS must be a multiple of 32"
+11
-4
kernel/sched/core.c
+11
-4
kernel/sched/core.c
···
2669
2669
2670
2670
/*
2671
2671
* Check if only the current task is running on the cpu.
2672
+
*
2673
+
* Caution: this function does not check that the caller has disabled
2674
+
* preemption, thus the result might have a time-of-check-to-time-of-use
2675
+
* race. The caller is responsible to use it correctly, for example:
2676
+
*
2677
+
* - from a non-preemptable section (of course)
2678
+
*
2679
+
* - from a thread that is bound to a single CPU
2680
+
*
2681
+
* - in a loop with very short iterations (e.g. a polling loop)
2672
2682
*/
2673
2683
bool single_task_running(void)
2674
2684
{
2675
-
if (cpu_rq(smp_processor_id())->nr_running == 1)
2676
-
return true;
2677
-
else
2678
-
return false;
2685
+
return raw_rq()->nr_running == 1;
2679
2686
}
2680
2687
EXPORT_SYMBOL(single_task_running);
2681
2688
+8
virt/kvm/arm/arch_timer.c
+8
virt/kvm/arm/arch_timer.c
···
200
200
timer->irq = irq;
201
201
202
202
/*
203
+
* The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
204
+
* and to 0 for ARMv7. We provide an implementation that always
205
+
* resets the timer to be disabled and unmasked and is compliant with
206
+
* the ARMv7 architecture.
207
+
*/
208
+
timer->cntv_ctl = 0;
209
+
210
+
/*
203
211
* Tell the VGIC that the virtual interrupt is tied to a
204
212
* physical interrupt. We do that once per VCPU.
205
213
*/
+1
-1
virt/kvm/arm/vgic-v3.c
+1
-1
virt/kvm/arm/vgic-v3.c
+26
-16
virt/kvm/arm/vgic.c
+26
-16
virt/kvm/arm/vgic.c
···
1144
1144
struct irq_phys_map *map;
1145
1145
map = vgic_irq_map_search(vcpu, irq);
1146
1146
1147
-
/*
1148
-
* If we have a mapping, and the virtual interrupt is
1149
-
* being injected, then we must set the state to
1150
-
* active in the physical world. Otherwise the
1151
-
* physical interrupt will fire and the guest will
1152
-
* exit before processing the virtual interrupt.
1153
-
*/
1154
1147
if (map) {
1155
-
int ret;
1156
-
1157
-
BUG_ON(!map->active);
1158
1148
vlr.hwirq = map->phys_irq;
1159
1149
vlr.state |= LR_HW;
1160
1150
vlr.state &= ~LR_EOI_INT;
1161
-
1162
-
ret = irq_set_irqchip_state(map->irq,
1163
-
IRQCHIP_STATE_ACTIVE,
1164
-
true);
1165
-
WARN_ON(ret);
1166
1151
1167
1152
/*
1168
1153
* Make sure we're not going to sample this
···
1240
1255
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
1241
1256
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
1242
1257
unsigned long *pa_percpu, *pa_shared;
1243
-
int i, vcpu_id;
1258
+
int i, vcpu_id, lr, ret;
1244
1259
int overflow = 0;
1245
1260
int nr_shared = vgic_nr_shared_irqs(dist);
1246
1261
···
1294
1309
* adjust that if needed while exiting.
1295
1310
*/
1296
1311
clear_bit(vcpu_id, dist->irq_pending_on_cpu);
1312
+
}
1313
+
1314
+
for (lr = 0; lr < vgic->nr_lr; lr++) {
1315
+
struct vgic_lr vlr;
1316
+
1317
+
if (!test_bit(lr, vgic_cpu->lr_used))
1318
+
continue;
1319
+
1320
+
vlr = vgic_get_lr(vcpu, lr);
1321
+
1322
+
/*
1323
+
* If we have a mapping, and the virtual interrupt is
1324
+
* presented to the guest (as pending or active), then we must
1325
+
* set the state to active in the physical world. See
1326
+
* Documentation/virtual/kvm/arm/vgic-mapped-irqs.txt.
1327
+
*/
1328
+
if (vlr.state & LR_HW) {
1329
+
struct irq_phys_map *map;
1330
+
map = vgic_irq_map_search(vcpu, vlr.irq);
1331
+
1332
+
ret = irq_set_irqchip_state(map->irq,
1333
+
IRQCHIP_STATE_ACTIVE,
1334
+
true);
1335
+
WARN_ON(ret);
1336
+
}
1297
1337
}
1298
1338
}
1299
1339
+2
-2
virt/kvm/coalesced_mmio.h
+2
-2
virt/kvm/coalesced_mmio.h
···
24
24
int kvm_coalesced_mmio_init(struct kvm *kvm);
25
25
void kvm_coalesced_mmio_free(struct kvm *kvm);
26
26
int kvm_vm_ioctl_register_coalesced_mmio(struct kvm *kvm,
27
-
struct kvm_coalesced_mmio_zone *zone);
27
+
struct kvm_coalesced_mmio_zone *zone);
28
28
int kvm_vm_ioctl_unregister_coalesced_mmio(struct kvm *kvm,
29
-
struct kvm_coalesced_mmio_zone *zone);
29
+
struct kvm_coalesced_mmio_zone *zone);
30
30
31
31
#else
32
32
+73
-51
virt/kvm/eventfd.c
+73
-51
virt/kvm/eventfd.c
···
771
771
return KVM_MMIO_BUS;
772
772
}
773
773
774
-
static int
775
-
kvm_assign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
774
+
static int kvm_assign_ioeventfd_idx(struct kvm *kvm,
775
+
enum kvm_bus bus_idx,
776
+
struct kvm_ioeventfd *args)
776
777
{
777
-
enum kvm_bus bus_idx;
778
-
struct _ioeventfd *p;
779
-
struct eventfd_ctx *eventfd;
780
-
int ret;
781
778
782
-
bus_idx = ioeventfd_bus_from_flags(args->flags);
783
-
/* must be natural-word sized, or 0 to ignore length */
784
-
switch (args->len) {
785
-
case 0:
786
-
case 1:
787
-
case 2:
788
-
case 4:
789
-
case 8:
790
-
break;
791
-
default:
792
-
return -EINVAL;
793
-
}
794
-
795
-
/* check for range overflow */
796
-
if (args->addr + args->len < args->addr)
797
-
return -EINVAL;
798
-
799
-
/* check for extra flags that we don't understand */
800
-
if (args->flags & ~KVM_IOEVENTFD_VALID_FLAG_MASK)
801
-
return -EINVAL;
802
-
803
-
/* ioeventfd with no length can't be combined with DATAMATCH */
804
-
if (!args->len &&
805
-
args->flags & (KVM_IOEVENTFD_FLAG_PIO |
806
-
KVM_IOEVENTFD_FLAG_DATAMATCH))
807
-
return -EINVAL;
779
+
struct eventfd_ctx *eventfd;
780
+
struct _ioeventfd *p;
781
+
int ret;
808
782
809
783
eventfd = eventfd_ctx_fdget(args->fd);
810
784
if (IS_ERR(eventfd))
···
817
843
if (ret < 0)
818
844
goto unlock_fail;
819
845
820
-
/* When length is ignored, MMIO is also put on a separate bus, for
821
-
* faster lookups.
822
-
*/
823
-
if (!args->len && !(args->flags & KVM_IOEVENTFD_FLAG_PIO)) {
824
-
ret = kvm_io_bus_register_dev(kvm, KVM_FAST_MMIO_BUS,
825
-
p->addr, 0, &p->dev);
826
-
if (ret < 0)
827
-
goto register_fail;
828
-
}
829
-
830
846
kvm->buses[bus_idx]->ioeventfd_count++;
831
847
list_add_tail(&p->list, &kvm->ioeventfds);
832
848
···
824
860
825
861
return 0;
826
862
827
-
register_fail:
828
-
kvm_io_bus_unregister_dev(kvm, bus_idx, &p->dev);
829
863
unlock_fail:
830
864
mutex_unlock(&kvm->slots_lock);
831
865
···
835
873
}
836
874
837
875
static int
838
-
kvm_deassign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
876
+
kvm_deassign_ioeventfd_idx(struct kvm *kvm, enum kvm_bus bus_idx,
877
+
struct kvm_ioeventfd *args)
839
878
{
840
-
enum kvm_bus bus_idx;
841
879
struct _ioeventfd *p, *tmp;
842
880
struct eventfd_ctx *eventfd;
843
881
int ret = -ENOENT;
844
882
845
-
bus_idx = ioeventfd_bus_from_flags(args->flags);
846
883
eventfd = eventfd_ctx_fdget(args->fd);
847
884
if (IS_ERR(eventfd))
848
885
return PTR_ERR(eventfd);
···
862
901
continue;
863
902
864
903
kvm_io_bus_unregister_dev(kvm, bus_idx, &p->dev);
865
-
if (!p->length) {
866
-
kvm_io_bus_unregister_dev(kvm, KVM_FAST_MMIO_BUS,
867
-
&p->dev);
868
-
}
869
904
kvm->buses[bus_idx]->ioeventfd_count--;
870
905
ioeventfd_release(p);
871
906
ret = 0;
···
872
915
873
916
eventfd_ctx_put(eventfd);
874
917
918
+
return ret;
919
+
}
920
+
921
+
static int kvm_deassign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
922
+
{
923
+
enum kvm_bus bus_idx = ioeventfd_bus_from_flags(args->flags);
924
+
int ret = kvm_deassign_ioeventfd_idx(kvm, bus_idx, args);
925
+
926
+
if (!args->len && bus_idx == KVM_MMIO_BUS)
927
+
kvm_deassign_ioeventfd_idx(kvm, KVM_FAST_MMIO_BUS, args);
928
+
929
+
return ret;
930
+
}
931
+
932
+
static int
933
+
kvm_assign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
934
+
{
935
+
enum kvm_bus bus_idx;
936
+
int ret;
937
+
938
+
bus_idx = ioeventfd_bus_from_flags(args->flags);
939
+
/* must be natural-word sized, or 0 to ignore length */
940
+
switch (args->len) {
941
+
case 0:
942
+
case 1:
943
+
case 2:
944
+
case 4:
945
+
case 8:
946
+
break;
947
+
default:
948
+
return -EINVAL;
949
+
}
950
+
951
+
/* check for range overflow */
952
+
if (args->addr + args->len < args->addr)
953
+
return -EINVAL;
954
+
955
+
/* check for extra flags that we don't understand */
956
+
if (args->flags & ~KVM_IOEVENTFD_VALID_FLAG_MASK)
957
+
return -EINVAL;
958
+
959
+
/* ioeventfd with no length can't be combined with DATAMATCH */
960
+
if (!args->len &&
961
+
args->flags & (KVM_IOEVENTFD_FLAG_PIO |
962
+
KVM_IOEVENTFD_FLAG_DATAMATCH))
963
+
return -EINVAL;
964
+
965
+
ret = kvm_assign_ioeventfd_idx(kvm, bus_idx, args);
966
+
if (ret)
967
+
goto fail;
968
+
969
+
/* When length is ignored, MMIO is also put on a separate bus, for
970
+
* faster lookups.
971
+
*/
972
+
if (!args->len && bus_idx == KVM_MMIO_BUS) {
973
+
ret = kvm_assign_ioeventfd_idx(kvm, KVM_FAST_MMIO_BUS, args);
974
+
if (ret < 0)
975
+
goto fast_fail;
976
+
}
977
+
978
+
return 0;
979
+
980
+
fast_fail:
981
+
kvm_deassign_ioeventfd_idx(kvm, bus_idx, args);
982
+
fail:
875
983
return ret;
876
984
}
877
985
+20
-3
virt/kvm/kvm_main.c
+20
-3
virt/kvm/kvm_main.c
···
2004
2004
if (vcpu->halt_poll_ns) {
2005
2005
ktime_t stop = ktime_add_ns(ktime_get(), vcpu->halt_poll_ns);
2006
2006
2007
+
++vcpu->stat.halt_attempted_poll;
2007
2008
do {
2008
2009
/*
2009
2010
* This sets KVM_REQ_UNHALT if an interrupt
···
2044
2043
else if (vcpu->halt_poll_ns < halt_poll_ns &&
2045
2044
block_ns < halt_poll_ns)
2046
2045
grow_halt_poll_ns(vcpu);
2047
-
}
2046
+
} else
2047
+
vcpu->halt_poll_ns = 0;
2048
2048
2049
2049
trace_kvm_vcpu_wakeup(block_ns, waited);
2050
2050
}
···
3158
3156
static inline int kvm_io_bus_cmp(const struct kvm_io_range *r1,
3159
3157
const struct kvm_io_range *r2)
3160
3158
{
3161
-
if (r1->addr < r2->addr)
3159
+
gpa_t addr1 = r1->addr;
3160
+
gpa_t addr2 = r2->addr;
3161
+
3162
+
if (addr1 < addr2)
3162
3163
return -1;
3163
-
if (r1->addr + r1->len > r2->addr + r2->len)
3164
+
3165
+
/* If r2->len == 0, match the exact address. If r2->len != 0,
3166
+
* accept any overlapping write. Any order is acceptable for
3167
+
* overlapping ranges, because kvm_io_bus_get_first_dev ensures
3168
+
* we process all of them.
3169
+
*/
3170
+
if (r2->len) {
3171
+
addr1 += r1->len;
3172
+
addr2 += r2->len;
3173
+
}
3174
+
3175
+
if (addr1 > addr2)
3164
3176
return 1;
3177
+
3165
3178
return 0;
3166
3179
}
3167
3180