Merge branch 'lan78xx-phylink-prep' · tjh.dev/kernel@3e52667

+344 -120

1 changed file

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drivers

net

usb

lan78xx.c

+344 -120

drivers/net/usb/lan78xx.c

··· 1554 1554 schedule_work(&pdata->set_multicast); 1555 1555 } 1556 1556 1557 + static int lan78xx_configure_flowcontrol(struct lan78xx_net *dev, 1558 + bool tx_pause, bool rx_pause); 1559 + 1557 1560 static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex, 1558 1561 u16 lcladv, u16 rmtadv) 1559 1562 { 1560 - u32 flow = 0, fct_flow = 0; 1561 1563 u8 cap; 1562 1564 1563 1565 if (dev->fc_autoneg) ··· 1567 1565 else 1568 1566 cap = dev->fc_request_control; 1569 1567 1570 - if (cap & FLOW_CTRL_TX) 1571 - flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF); 1572 - 1573 - if (cap & FLOW_CTRL_RX) 1574 - flow |= FLOW_CR_RX_FCEN_; 1575 - 1576 - if (dev->udev->speed == USB_SPEED_SUPER) 1577 - fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS); 1578 - else if (dev->udev->speed == USB_SPEED_HIGH) 1579 - fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS); 1580 - 1581 1568 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s", 1582 1569 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 1583 1570 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 1584 1571 1585 - lan78xx_write_reg(dev, FCT_FLOW, fct_flow); 1586 - 1587 - /* threshold value should be set before enabling flow */ 1588 - lan78xx_write_reg(dev, FLOW, flow); 1589 - 1590 - return 0; 1572 + return lan78xx_configure_flowcontrol(dev, 1573 + cap & FLOW_CTRL_TX, 1574 + cap & FLOW_CTRL_RX); 1591 1575 } 1592 1576 1593 1577 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev); ··· 1624 1636 return ret; 1625 1637 } 1626 1638 1639 + /** 1640 + * lan78xx_phy_int_ack - Acknowledge PHY interrupt 1641 + * @dev: pointer to the LAN78xx device structure 1642 + * 1643 + * This function acknowledges the PHY interrupt by setting the 1644 + * INT_STS_PHY_INT_ bit in the interrupt status register (INT_STS). 1645 + * 1646 + * Return: 0 on success or a negative error code on failure. 1647 + */ 1648 + static int lan78xx_phy_int_ack(struct lan78xx_net *dev) 1649 + { 1650 + return lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_); 1651 + } 1652 + 1653 + static int lan78xx_configure_usb(struct lan78xx_net *dev, int speed); 1654 + 1627 1655 static int lan78xx_link_reset(struct lan78xx_net *dev) 1628 1656 { 1629 1657 struct phy_device *phydev = dev->net->phydev; 1630 1658 struct ethtool_link_ksettings ecmd; 1631 1659 int ladv, radv, ret, link; 1632 - u32 buf; 1633 1660 1634 1661 /* clear LAN78xx interrupt status */ 1635 - ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_); 1662 + ret = lan78xx_phy_int_ack(dev); 1636 1663 if (unlikely(ret < 0)) 1637 1664 return ret; 1638 1665 ··· 1670 1667 1671 1668 phy_ethtool_ksettings_get(phydev, &ecmd); 1672 1669 1673 - if (dev->udev->speed == USB_SPEED_SUPER) { 1674 - if (ecmd.base.speed == 1000) { 1675 - /* disable U2 */ 1676 - ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 1677 - if (ret < 0) 1678 - return ret; 1679 - buf &= ~USB_CFG1_DEV_U2_INIT_EN_; 1680 - ret = lan78xx_write_reg(dev, USB_CFG1, buf); 1681 - if (ret < 0) 1682 - return ret; 1683 - /* enable U1 */ 1684 - ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 1685 - if (ret < 0) 1686 - return ret; 1687 - buf |= USB_CFG1_DEV_U1_INIT_EN_; 1688 - ret = lan78xx_write_reg(dev, USB_CFG1, buf); 1689 - if (ret < 0) 1690 - return ret; 1691 - } else { 1692 - /* enable U1 & U2 */ 1693 - ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 1694 - if (ret < 0) 1695 - return ret; 1696 - buf |= USB_CFG1_DEV_U2_INIT_EN_; 1697 - buf |= USB_CFG1_DEV_U1_INIT_EN_; 1698 - ret = lan78xx_write_reg(dev, USB_CFG1, buf); 1699 - if (ret < 0) 1700 - return ret; 1701 - } 1702 - } 1670 + ret = lan78xx_configure_usb(dev, ecmd.base.speed); 1671 + if (ret < 0) 1672 + return ret; 1703 1673 1704 1674 ladv = phy_read(phydev, MII_ADVERTISE); 1705 1675 if (ladv < 0) ··· 2484 2508 dev->domain_data.irqdomain = NULL; 2485 2509 } 2486 2510 2487 - static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev) 2511 + /** 2512 + * lan78xx_configure_usb - Configure USB link power settings 2513 + * @dev: pointer to the LAN78xx device structure 2514 + * @speed: negotiated Ethernet link speed (in Mbps) 2515 + * 2516 + * This function configures U1/U2 link power management for SuperSpeed 2517 + * USB devices based on the current Ethernet link speed. It uses the 2518 + * USB_CFG1 register to enable or disable U1 and U2 low-power states. 2519 + * 2520 + * Note: Only LAN7800 and LAN7801 support SuperSpeed (USB 3.x). 2521 + * LAN7850 is a High-Speed-only (USB 2.0) device and is skipped. 2522 + * 2523 + * Return: 0 on success or a negative error code on failure. 2524 + */ 2525 + static int lan78xx_configure_usb(struct lan78xx_net *dev, int speed) 2488 2526 { 2489 - u32 buf; 2527 + u32 mask, val; 2490 2528 int ret; 2529 + 2530 + /* Only configure USB settings for SuperSpeed devices */ 2531 + if (dev->udev->speed != USB_SPEED_SUPER) 2532 + return 0; 2533 + 2534 + /* LAN7850 does not support USB 3.x */ 2535 + if (dev->chipid == ID_REV_CHIP_ID_7850_) { 2536 + netdev_warn_once(dev->net, "Unexpected SuperSpeed for LAN7850 (USB 2.0 only)\n"); 2537 + return 0; 2538 + } 2539 + 2540 + switch (speed) { 2541 + case SPEED_1000: 2542 + /* Disable U2, enable U1 */ 2543 + ret = lan78xx_update_reg(dev, USB_CFG1, 2544 + USB_CFG1_DEV_U2_INIT_EN_, 0); 2545 + if (ret < 0) 2546 + return ret; 2547 + 2548 + return lan78xx_update_reg(dev, USB_CFG1, 2549 + USB_CFG1_DEV_U1_INIT_EN_, 2550 + USB_CFG1_DEV_U1_INIT_EN_); 2551 + 2552 + case SPEED_100: 2553 + case SPEED_10: 2554 + /* Enable both U1 and U2 */ 2555 + mask = USB_CFG1_DEV_U1_INIT_EN_ | USB_CFG1_DEV_U2_INIT_EN_; 2556 + val = mask; 2557 + return lan78xx_update_reg(dev, USB_CFG1, mask, val); 2558 + 2559 + default: 2560 + netdev_warn(dev->net, "Unsupported link speed: %d\n", speed); 2561 + return -EINVAL; 2562 + } 2563 + } 2564 + 2565 + /** 2566 + * lan78xx_configure_flowcontrol - Set MAC and FIFO flow control configuration 2567 + * @dev: pointer to the LAN78xx device structure 2568 + * @tx_pause: enable transmission of pause frames 2569 + * @rx_pause: enable reception of pause frames 2570 + * 2571 + * This function configures the LAN78xx flow control settings by writing 2572 + * to the FLOW and FCT_FLOW registers. The pause time is set to the 2573 + * maximum allowed value (65535 quanta). FIFO thresholds are selected 2574 + * based on USB speed. 2575 + * 2576 + * The Pause Time field is measured in units of 512-bit times (quanta): 2577 + * - At 1 Gbps: 1 quanta = 512 ns → max ~33.6 ms pause 2578 + * - At 100 Mbps: 1 quanta = 5.12 µs → max ~335 ms pause 2579 + * - At 10 Mbps: 1 quanta = 51.2 µs → max ~3.3 s pause 2580 + * 2581 + * Flow control thresholds (FCT_FLOW) are used to trigger pause/resume: 2582 + * - RXUSED is the number of bytes used in the RX FIFO 2583 + * - Flow is turned ON when RXUSED ≥ FLOW_ON threshold 2584 + * - Flow is turned OFF when RXUSED ≤ FLOW_OFF threshold 2585 + * - Both thresholds are encoded in units of 512 bytes (rounded up) 2586 + * 2587 + * Thresholds differ by USB speed because available USB bandwidth 2588 + * affects how fast packets can be drained from the RX FIFO: 2589 + * - USB 3.x (SuperSpeed): 2590 + * FLOW_ON = 9216 bytes → 18 units 2591 + * FLOW_OFF = 4096 bytes → 8 units 2592 + * - USB 2.0 (High-Speed): 2593 + * FLOW_ON = 8704 bytes → 17 units 2594 + * FLOW_OFF = 1024 bytes → 2 units 2595 + * 2596 + * Note: The FCT_FLOW register must be configured before enabling TX pause 2597 + * (i.e., before setting FLOW_CR_TX_FCEN_), as required by the hardware. 2598 + * 2599 + * Return: 0 on success or a negative error code on failure. 2600 + */ 2601 + static int lan78xx_configure_flowcontrol(struct lan78xx_net *dev, 2602 + bool tx_pause, bool rx_pause) 2603 + { 2604 + /* Use maximum pause time: 65535 quanta (512-bit times) */ 2605 + const u32 pause_time_quanta = 65535; 2606 + u32 fct_flow = 0; 2607 + u32 flow = 0; 2608 + int ret; 2609 + 2610 + /* Prepare MAC flow control bits */ 2611 + if (tx_pause) 2612 + flow |= FLOW_CR_TX_FCEN_ | pause_time_quanta; 2613 + 2614 + if (rx_pause) 2615 + flow |= FLOW_CR_RX_FCEN_; 2616 + 2617 + /* Select RX FIFO thresholds based on USB speed 2618 + * 2619 + * FCT_FLOW layout: 2620 + * bits [6:0] FLOW_ON threshold (RXUSED ≥ ON → assert pause) 2621 + * bits [14:8] FLOW_OFF threshold (RXUSED ≤ OFF → deassert pause) 2622 + * thresholds are expressed in units of 512 bytes 2623 + */ 2624 + switch (dev->udev->speed) { 2625 + case USB_SPEED_SUPER: 2626 + fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS); 2627 + break; 2628 + case USB_SPEED_HIGH: 2629 + fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS); 2630 + break; 2631 + default: 2632 + netdev_warn(dev->net, "Unsupported USB speed: %d\n", 2633 + dev->udev->speed); 2634 + return -EINVAL; 2635 + } 2636 + 2637 + /* Step 1: Write FIFO thresholds before enabling pause frames */ 2638 + ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow); 2639 + if (ret < 0) 2640 + return ret; 2641 + 2642 + /* Step 2: Enable MAC pause functionality */ 2643 + return lan78xx_write_reg(dev, FLOW, flow); 2644 + } 2645 + 2646 + /** 2647 + * lan78xx_register_fixed_phy() - Register a fallback fixed PHY 2648 + * @dev: LAN78xx device 2649 + * 2650 + * Registers a fixed PHY with 1 Gbps full duplex. This is used in special cases 2651 + * like EVB-KSZ9897-1, where LAN7801 acts as a USB-to-Ethernet interface to a 2652 + * switch without a visible PHY. 2653 + * 2654 + * Return: pointer to the registered fixed PHY, or ERR_PTR() on error. 2655 + */ 2656 + static struct phy_device *lan78xx_register_fixed_phy(struct lan78xx_net *dev) 2657 + { 2491 2658 struct fixed_phy_status fphy_status = { 2492 2659 .link = 1, 2493 2660 .speed = SPEED_1000, 2494 2661 .duplex = DUPLEX_FULL, 2495 2662 }; 2663 + 2664 + netdev_info(dev->net, 2665 + "No PHY found on LAN7801 – registering fixed PHY (e.g. EVB-KSZ9897-1)\n"); 2666 + 2667 + return fixed_phy_register(PHY_POLL, &fphy_status, NULL); 2668 + } 2669 + 2670 + /** 2671 + * lan78xx_get_phy() - Probe or register PHY device and set interface mode 2672 + * @dev: LAN78xx device structure 2673 + * 2674 + * This function attempts to find a PHY on the MDIO bus. If no PHY is found 2675 + * and the chip is LAN7801, it registers a fixed PHY as fallback. It also 2676 + * sets dev->interface based on chip ID and detected PHY type. 2677 + * 2678 + * Return: a valid PHY device pointer, or ERR_PTR() on failure. 2679 + */ 2680 + static struct phy_device *lan78xx_get_phy(struct lan78xx_net *dev) 2681 + { 2496 2682 struct phy_device *phydev; 2497 2683 2684 + /* Attempt to locate a PHY on the MDIO bus */ 2498 2685 phydev = phy_find_first(dev->mdiobus); 2499 - if (!phydev) { 2500 - netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n"); 2501 - phydev = fixed_phy_register(PHY_POLL, &fphy_status, NULL); 2502 - if (IS_ERR(phydev)) { 2503 - netdev_err(dev->net, "No PHY/fixed_PHY found\n"); 2504 - return NULL; 2686 + 2687 + switch (dev->chipid) { 2688 + case ID_REV_CHIP_ID_7801_: 2689 + if (phydev) { 2690 + /* External RGMII PHY detected */ 2691 + dev->interface = PHY_INTERFACE_MODE_RGMII_ID; 2692 + phydev->is_internal = false; 2693 + 2694 + if (!phydev->drv) 2695 + netdev_warn(dev->net, 2696 + "PHY driver not found – assuming RGMII delays are on PCB or strapped for the PHY\n"); 2697 + 2698 + return phydev; 2505 2699 } 2506 - netdev_dbg(dev->net, "Registered FIXED PHY\n"); 2700 + 2507 2701 dev->interface = PHY_INTERFACE_MODE_RGMII; 2702 + /* No PHY found – fallback to fixed PHY (e.g. KSZ switch board) */ 2703 + return lan78xx_register_fixed_phy(dev); 2704 + 2705 + case ID_REV_CHIP_ID_7800_: 2706 + case ID_REV_CHIP_ID_7850_: 2707 + if (!phydev) 2708 + return ERR_PTR(-ENODEV); 2709 + 2710 + /* These use internal GMII-connected PHY */ 2711 + dev->interface = PHY_INTERFACE_MODE_GMII; 2712 + phydev->is_internal = true; 2713 + return phydev; 2714 + 2715 + default: 2716 + netdev_err(dev->net, "Unknown CHIP ID: 0x%08x\n", dev->chipid); 2717 + return ERR_PTR(-ENODEV); 2718 + } 2719 + } 2720 + 2721 + /** 2722 + * lan78xx_mac_prepare_for_phy() - Preconfigure MAC-side interface settings 2723 + * @dev: LAN78xx device 2724 + * 2725 + * Configure MAC-side registers according to dev->interface, which should be 2726 + * set by lan78xx_get_phy(). 2727 + * 2728 + * - For PHY_INTERFACE_MODE_RGMII: 2729 + * Enable MAC-side TXC delay. This mode seems to be used in a special setup 2730 + * without a real PHY, likely on EVB-KSZ9897-1. In that design, LAN7801 is 2731 + * connected to the KSZ9897 switch, and the link timing is expected to be 2732 + * hardwired (e.g. via strapping or board layout). No devicetree support is 2733 + * assumed here. 2734 + * 2735 + * - For PHY_INTERFACE_MODE_RGMII_ID: 2736 + * Disable MAC-side delay and rely on the PHY driver to provide delay. 2737 + * 2738 + * - For GMII, no MAC-specific config is needed. 2739 + * 2740 + * Return: 0 on success or a negative error code. 2741 + */ 2742 + static int lan78xx_mac_prepare_for_phy(struct lan78xx_net *dev) 2743 + { 2744 + int ret; 2745 + 2746 + switch (dev->interface) { 2747 + case PHY_INTERFACE_MODE_RGMII: 2748 + /* Enable MAC-side TX clock delay */ 2508 2749 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 2509 2750 MAC_RGMII_ID_TXC_DELAY_EN_); 2510 - ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2511 - ret = lan78xx_read_reg(dev, HW_CFG, &buf); 2512 - buf |= HW_CFG_CLK125_EN_; 2513 - buf |= HW_CFG_REFCLK25_EN_; 2514 - ret = lan78xx_write_reg(dev, HW_CFG, buf); 2515 - } else { 2516 - if (!phydev->drv) { 2517 - netdev_err(dev->net, "no PHY driver found\n"); 2518 - return NULL; 2519 - } 2520 - dev->interface = PHY_INTERFACE_MODE_RGMII_ID; 2521 - /* The PHY driver is responsible to configure proper RGMII 2522 - * interface delays. Disable RGMII delays on MAC side. 2523 - */ 2524 - lan78xx_write_reg(dev, MAC_RGMII_ID, 0); 2751 + if (ret < 0) 2752 + return ret; 2525 2753 2526 - phydev->is_internal = false; 2754 + ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2755 + if (ret < 0) 2756 + return ret; 2757 + 2758 + ret = lan78xx_update_reg(dev, HW_CFG, 2759 + HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_, 2760 + HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_); 2761 + if (ret < 0) 2762 + return ret; 2763 + 2764 + break; 2765 + 2766 + case PHY_INTERFACE_MODE_RGMII_ID: 2767 + /* Disable MAC-side TXC delay, PHY provides it */ 2768 + ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 0); 2769 + if (ret < 0) 2770 + return ret; 2771 + 2772 + break; 2773 + 2774 + case PHY_INTERFACE_MODE_GMII: 2775 + /* No MAC-specific configuration required */ 2776 + break; 2777 + 2778 + default: 2779 + netdev_warn(dev->net, "Unsupported interface mode: %d\n", 2780 + dev->interface); 2781 + break; 2527 2782 } 2528 - return phydev; 2783 + 2784 + return 0; 2785 + } 2786 + 2787 + /** 2788 + * lan78xx_configure_leds_from_dt() - Configure LED enables based on DT 2789 + * @dev: LAN78xx device 2790 + * @phydev: PHY device (must be valid) 2791 + * 2792 + * Reads "microchip,led-modes" property from the PHY's DT node and enables 2793 + * the corresponding number of LEDs by writing to HW_CFG. 2794 + * 2795 + * This helper preserves the original logic, enabling up to 4 LEDs. 2796 + * If the property is not present, this function does nothing. 2797 + * 2798 + * Return: 0 on success or a negative error code. 2799 + */ 2800 + static int lan78xx_configure_leds_from_dt(struct lan78xx_net *dev, 2801 + struct phy_device *phydev) 2802 + { 2803 + struct device_node *np = phydev->mdio.dev.of_node; 2804 + u32 reg; 2805 + int len, ret; 2806 + 2807 + if (!np) 2808 + return 0; 2809 + 2810 + len = of_property_count_elems_of_size(np, "microchip,led-modes", 2811 + sizeof(u32)); 2812 + if (len < 0) 2813 + return 0; 2814 + 2815 + ret = lan78xx_read_reg(dev, HW_CFG, &reg); 2816 + if (ret < 0) 2817 + return ret; 2818 + 2819 + reg &= ~(HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_ | 2820 + HW_CFG_LED2_EN_ | HW_CFG_LED3_EN_); 2821 + 2822 + reg |= (len > 0) * HW_CFG_LED0_EN_ | 2823 + (len > 1) * HW_CFG_LED1_EN_ | 2824 + (len > 2) * HW_CFG_LED2_EN_ | 2825 + (len > 3) * HW_CFG_LED3_EN_; 2826 + 2827 + return lan78xx_write_reg(dev, HW_CFG, reg); 2529 2828 } 2530 2829 2531 2830 static int lan78xx_phy_init(struct lan78xx_net *dev) ··· 2810 2559 u32 mii_adv; 2811 2560 struct phy_device *phydev; 2812 2561 2813 - switch (dev->chipid) { 2814 - case ID_REV_CHIP_ID_7801_: 2815 - phydev = lan7801_phy_init(dev); 2816 - if (!phydev) { 2817 - netdev_err(dev->net, "lan7801: PHY Init Failed"); 2818 - return -EIO; 2819 - } 2820 - break; 2562 + phydev = lan78xx_get_phy(dev); 2563 + if (IS_ERR(phydev)) 2564 + return PTR_ERR(phydev); 2821 2565 2822 - case ID_REV_CHIP_ID_7800_: 2823 - case ID_REV_CHIP_ID_7850_: 2824 - phydev = phy_find_first(dev->mdiobus); 2825 - if (!phydev) { 2826 - netdev_err(dev->net, "no PHY found\n"); 2827 - return -EIO; 2828 - } 2829 - phydev->is_internal = true; 2830 - dev->interface = PHY_INTERFACE_MODE_GMII; 2831 - break; 2832 - 2833 - default: 2834 - netdev_err(dev->net, "Unknown CHIP ID found\n"); 2835 - return -EIO; 2836 - } 2566 + ret = lan78xx_mac_prepare_for_phy(dev); 2567 + if (ret < 0) 2568 + goto free_phy; 2837 2569 2838 2570 /* if phyirq is not set, use polling mode in phylib */ 2839 2571 if (dev->domain_data.phyirq > 0) ··· 2858 2624 2859 2625 phy_support_eee(phydev); 2860 2626 2861 - if (phydev->mdio.dev.of_node) { 2862 - u32 reg; 2863 - int len; 2864 - 2865 - len = of_property_count_elems_of_size(phydev->mdio.dev.of_node, 2866 - "microchip,led-modes", 2867 - sizeof(u32)); 2868 - if (len >= 0) { 2869 - /* Ensure the appropriate LEDs are enabled */ 2870 - lan78xx_read_reg(dev, HW_CFG, &reg); 2871 - reg &= ~(HW_CFG_LED0_EN_ | 2872 - HW_CFG_LED1_EN_ | 2873 - HW_CFG_LED2_EN_ | 2874 - HW_CFG_LED3_EN_); 2875 - reg |= (len > 0) * HW_CFG_LED0_EN_ | 2876 - (len > 1) * HW_CFG_LED1_EN_ | 2877 - (len > 2) * HW_CFG_LED2_EN_ | 2878 - (len > 3) * HW_CFG_LED3_EN_; 2879 - lan78xx_write_reg(dev, HW_CFG, reg); 2880 - } 2881 - } 2627 + ret = lan78xx_configure_leds_from_dt(dev, phydev); 2628 + if (ret) 2629 + goto free_phy; 2882 2630 2883 2631 genphy_config_aneg(phydev); 2884 2632 2885 2633 dev->fc_autoneg = phydev->autoneg; 2886 2634 2887 2635 return 0; 2636 + 2637 + free_phy: 2638 + if (phy_is_pseudo_fixed_link(phydev)) { 2639 + fixed_phy_unregister(phydev); 2640 + phy_device_free(phydev); 2641 + } 2642 + 2643 + return ret; 2888 2644 } 2889 2645 2890 2646 static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)

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