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cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()

Cases can be divided into two categories which are DVSEC range enabled and
not enabled when HDM decoders exist but is not enabled. To avoid checking
info->mem_enabled, which indicates the enablement of DVSEC range, every
time, we can check !info->mem_enabled once in advance. This simplification
can make the code clearer.

No functional change intended.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20240828084231.1378789-5-yanfei.xu@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

authored by

Yanfei Xu and committed by
Dave Jiang 3f9e0753 99bf0eeb

+11 -10
+11 -10
drivers/cxl/core/pci.c
··· 426 426 return -ENODEV; 427 427 } 428 428 429 - for (i = 0, allowed = 0; info->mem_enabled && i < info->ranges; i++) { 429 + if (!info->mem_enabled) { 430 + rc = devm_cxl_enable_hdm(&port->dev, cxlhdm); 431 + if (rc) 432 + return rc; 433 + 434 + return devm_cxl_enable_mem(&port->dev, cxlds); 435 + } 436 + 437 + for (i = 0, allowed = 0; i < info->ranges; i++) { 430 438 struct device *cxld_dev; 431 439 432 440 cxld_dev = device_find_child(&root->dev, &info->dvsec_range[i], ··· 448 440 allowed++; 449 441 } 450 442 451 - if (!allowed && info->mem_enabled) { 443 + if (!allowed) { 452 444 dev_err(dev, "Range register decodes outside platform defined CXL ranges.\n"); 453 445 return -ENXIO; 454 446 } ··· 462 454 * match. If at least one DVSEC range is enabled and allowed, skip HDM 463 455 * Decoder Capability Enable. 464 456 */ 465 - if (info->mem_enabled) 466 - return 0; 467 - 468 - rc = devm_cxl_enable_hdm(&port->dev, cxlhdm); 469 - if (rc) 470 - return rc; 471 - 472 - return devm_cxl_enable_mem(&port->dev, cxlds); 457 + return 0; 473 458 } 474 459 EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, CXL); 475 460