Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

+2

drivers/connector/connector.c

··· 145 145 if (queue_work(dev->cbdev->cn_queue, 146 146 &__cbq->work)) 147 147 err = 0; 148 + else 149 + err = -EINVAL; 148 150 } else { 149 151 struct cn_callback_data *d; 150 152

+3

drivers/isdn/i4l/isdn_common.c

··· 914 914 dflag = 0; 915 915 count_pull = count_put = 0; 916 916 while ((count_pull < skb->len) && (len > 0)) { 917 + /* push every character but the last to the tty buffer directly */ 918 + if ( count_put ) 919 + tty_insert_flip_char(tty, last, TTY_NORMAL); 917 920 len--; 918 921 if (dev->drv[di]->DLEflag & DLEmask) { 919 922 last = DLE;

+7

drivers/isdn/i4l/isdn_tty.c

··· 85 85 tty_insert_flip_char(tty, DLE, 0); 86 86 tty_insert_flip_char(tty, *dp++, 0); 87 87 } 88 + if (*dp == DLE) 89 + tty_insert_flip_char(tty, DLE, 0); 88 90 last = *dp; 89 91 } else { 90 92 #endif ··· 2647 2645 if ((info->flags & ISDN_ASYNC_CLOSING) || (!info->tty)) { 2648 2646 return; 2649 2647 } 2648 + #ifdef CONFIG_ISDN_AUDIO 2649 + if ( !info->vonline ) 2650 + tty_ldisc_flush(info->tty); 2651 + #else 2650 2652 tty_ldisc_flush(info->tty); 2653 + #endif 2651 2654 if ((info->flags & ISDN_ASYNC_CHECK_CD) && 2652 2655 (!((info->flags & ISDN_ASYNC_CALLOUT_ACTIVE) && 2653 2656 (info->flags & ISDN_ASYNC_CALLOUT_NOHUP)))) {

+100 -39

drivers/net/cassini.c

··· 142 142 143 143 #define DRV_MODULE_NAME "cassini" 144 144 #define PFX DRV_MODULE_NAME ": " 145 - #define DRV_MODULE_VERSION "1.4" 146 - #define DRV_MODULE_RELDATE "1 July 2004" 145 + #define DRV_MODULE_VERSION "1.5" 146 + #define DRV_MODULE_RELDATE "4 Jan 2008" 147 147 148 148 #define CAS_DEF_MSG_ENABLE \ 149 149 (NETIF_MSG_DRV | \ ··· 336 336 cas_disable_irq(cp, i); 337 337 } 338 338 339 - static inline void cas_buffer_init(cas_page_t *cp) 340 - { 341 - struct page *page = cp->buffer; 342 - atomic_set((atomic_t *)&page->lru.next, 1); 343 - } 344 - 345 - static inline int cas_buffer_count(cas_page_t *cp) 346 - { 347 - struct page *page = cp->buffer; 348 - return atomic_read((atomic_t *)&page->lru.next); 349 - } 350 - 351 - static inline void cas_buffer_inc(cas_page_t *cp) 352 - { 353 - struct page *page = cp->buffer; 354 - atomic_inc((atomic_t *)&page->lru.next); 355 - } 356 - 357 - static inline void cas_buffer_dec(cas_page_t *cp) 358 - { 359 - struct page *page = cp->buffer; 360 - atomic_dec((atomic_t *)&page->lru.next); 361 - } 362 - 363 339 static void cas_enable_irq(struct cas *cp, const int ring) 364 340 { 365 341 if (ring == 0) { /* all but TX_DONE */ ··· 473 497 { 474 498 pci_unmap_page(cp->pdev, page->dma_addr, cp->page_size, 475 499 PCI_DMA_FROMDEVICE); 476 - cas_buffer_dec(page); 477 500 __free_pages(page->buffer, cp->page_order); 478 501 kfree(page); 479 502 return 0; ··· 502 527 page->buffer = alloc_pages(flags, cp->page_order); 503 528 if (!page->buffer) 504 529 goto page_err; 505 - cas_buffer_init(page); 506 530 page->dma_addr = pci_map_page(cp->pdev, page->buffer, 0, 507 531 cp->page_size, PCI_DMA_FROMDEVICE); 508 532 return page; ··· 580 606 list_for_each_safe(elem, tmp, &list) { 581 607 cas_page_t *page = list_entry(elem, cas_page_t, list); 582 608 583 - if (cas_buffer_count(page) > 1) 609 + if (page_count(page->buffer) > 1) 584 610 continue; 585 611 586 612 list_del(elem); ··· 1348 1374 cas_page_t *page = cp->rx_pages[1][index]; 1349 1375 cas_page_t *new; 1350 1376 1351 - if (cas_buffer_count(page) == 1) 1377 + if (page_count(page->buffer) == 1) 1352 1378 return page; 1353 1379 1354 1380 new = cas_page_dequeue(cp); ··· 1368 1394 cas_page_t **page1 = cp->rx_pages[1]; 1369 1395 1370 1396 /* swap if buffer is in use */ 1371 - if (cas_buffer_count(page0[index]) > 1) { 1397 + if (page_count(page0[index]->buffer) > 1) { 1372 1398 cas_page_t *new = cas_page_spare(cp, index); 1373 1399 if (new) { 1374 1400 page1[index] = page0[index]; ··· 1953 1979 struct cas_page *page; 1954 1980 struct sk_buff *skb; 1955 1981 void *addr, *crcaddr; 1982 + __sum16 csum; 1956 1983 char *p; 1957 1984 1958 1985 hlen = CAS_VAL(RX_COMP2_HDR_SIZE, words[1]); ··· 2037 2062 2038 2063 skb_shinfo(skb)->nr_frags++; 2039 2064 skb->data_len += hlen - swivel; 2065 + skb->truesize += hlen - swivel; 2040 2066 skb->len += hlen - swivel; 2041 2067 2042 2068 get_page(page->buffer); 2043 - cas_buffer_inc(page); 2044 2069 frag->page = page->buffer; 2045 2070 frag->page_offset = off; 2046 2071 frag->size = hlen - swivel; ··· 2065 2090 frag++; 2066 2091 2067 2092 get_page(page->buffer); 2068 - cas_buffer_inc(page); 2069 2093 frag->page = page->buffer; 2070 2094 frag->page_offset = 0; 2071 2095 frag->size = hlen; ··· 2132 2158 skb_put(skb, alloclen); 2133 2159 } 2134 2160 2135 - i = CAS_VAL(RX_COMP4_TCP_CSUM, words[3]); 2161 + csum = (__force __sum16)htons(CAS_VAL(RX_COMP4_TCP_CSUM, words[3])); 2136 2162 if (cp->crc_size) { 2137 2163 /* checksum includes FCS. strip it out. */ 2138 - i = csum_fold(csum_partial(crcaddr, cp->crc_size, i)); 2164 + csum = csum_fold(csum_partial(crcaddr, cp->crc_size, 2165 + csum_unfold(csum))); 2139 2166 if (addr) 2140 2167 cas_page_unmap(addr); 2141 2168 } 2142 - skb->csum = ntohs(i ^ 0xffff); 2169 + skb->csum = csum_unfold(~csum); 2143 2170 skb->ip_summed = CHECKSUM_COMPLETE; 2144 2171 skb->protocol = eth_type_trans(skb, cp->dev); 2145 2172 return len; ··· 2228 2253 released = 0; 2229 2254 while (entry != last) { 2230 2255 /* make a new buffer if it's still in use */ 2231 - if (cas_buffer_count(page[entry]) > 1) { 2256 + if (page_count(page[entry]->buffer) > 1) { 2232 2257 cas_page_t *new = cas_page_dequeue(cp); 2233 2258 if (!new) { 2234 2259 /* let the timer know that we need to ··· 2586 2611 { 2587 2612 struct cas *cp = container_of(napi, struct cas, napi); 2588 2613 struct net_device *dev = cp->dev; 2589 - int i, enable_intr, todo, credits; 2614 + int i, enable_intr, credits; 2590 2615 u32 status = readl(cp->regs + REG_INTR_STATUS); 2591 2616 unsigned long flags; 2592 2617 ··· 4350 4375 struct cas *cp = netdev_priv(dev); 4351 4376 4352 4377 #ifdef USE_NAPI 4353 - napi_enable(&cp->napi); 4378 + napi_disable(&cp->napi); 4354 4379 #endif 4355 4380 /* Make sure we don't get distracted by suspend/resume */ 4356 4381 mutex_lock(&cp->pm_mutex); ··· 4847 4872 return rc; 4848 4873 } 4849 4874 4875 + /* When this chip sits underneath an Intel 31154 bridge, it is the 4876 + * only subordinate device and we can tweak the bridge settings to 4877 + * reflect that fact. 4878 + */ 4879 + static void __devinit cas_program_bridge(struct pci_dev *cas_pdev) 4880 + { 4881 + struct pci_dev *pdev = cas_pdev->bus->self; 4882 + u32 val; 4883 + 4884 + if (!pdev) 4885 + return; 4886 + 4887 + if (pdev->vendor != 0x8086 || pdev->device != 0x537c) 4888 + return; 4889 + 4890 + /* Clear bit 10 (Bus Parking Control) in the Secondary 4891 + * Arbiter Control/Status Register which lives at offset 4892 + * 0x41. Using a 32-bit word read/modify/write at 0x40 4893 + * is much simpler so that's how we do this. 4894 + */ 4895 + pci_read_config_dword(pdev, 0x40, &val); 4896 + val &= ~0x00040000; 4897 + pci_write_config_dword(pdev, 0x40, val); 4898 + 4899 + /* Max out the Multi-Transaction Timer settings since 4900 + * Cassini is the only device present. 4901 + * 4902 + * The register is 16-bit and lives at 0x50. When the 4903 + * settings are enabled, it extends the GRANT# signal 4904 + * for a requestor after a transaction is complete. This 4905 + * allows the next request to run without first needing 4906 + * to negotiate the GRANT# signal back. 4907 + * 4908 + * Bits 12:10 define the grant duration: 4909 + * 4910 + * 1 -- 16 clocks 4911 + * 2 -- 32 clocks 4912 + * 3 -- 64 clocks 4913 + * 4 -- 128 clocks 4914 + * 5 -- 256 clocks 4915 + * 4916 + * All other values are illegal. 4917 + * 4918 + * Bits 09:00 define which REQ/GNT signal pairs get the 4919 + * GRANT# signal treatment. We set them all. 4920 + */ 4921 + pci_write_config_word(pdev, 0x50, (5 << 10) | 0x3ff); 4922 + 4923 + /* The Read Prefecth Policy register is 16-bit and sits at 4924 + * offset 0x52. It enables a "smart" pre-fetch policy. We 4925 + * enable it and max out all of the settings since only one 4926 + * device is sitting underneath and thus bandwidth sharing is 4927 + * not an issue. 4928 + * 4929 + * The register has several 3 bit fields, which indicates a 4930 + * multiplier applied to the base amount of prefetching the 4931 + * chip would do. These fields are at: 4932 + * 4933 + * 15:13 --- ReRead Primary Bus 4934 + * 12:10 --- FirstRead Primary Bus 4935 + * 09:07 --- ReRead Secondary Bus 4936 + * 06:04 --- FirstRead Secondary Bus 4937 + * 4938 + * Bits 03:00 control which REQ/GNT pairs the prefetch settings 4939 + * get enabled on. Bit 3 is a grouped enabler which controls 4940 + * all of the REQ/GNT pairs from [8:3]. Bits 2 to 0 control 4941 + * the individual REQ/GNT pairs [2:0]. 4942 + */ 4943 + pci_write_config_word(pdev, 0x52, 4944 + (0x7 << 13) | 4945 + (0x7 << 10) | 4946 + (0x7 << 7) | 4947 + (0x7 << 4) | 4948 + (0xf << 0)); 4949 + 4950 + /* Force cacheline size to 0x8 */ 4951 + pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08); 4952 + 4953 + /* Force latency timer to maximum setting so Cassini can 4954 + * sit on the bus as long as it likes. 4955 + */ 4956 + pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xff); 4957 + } 4958 + 4850 4959 static int __devinit cas_init_one(struct pci_dev *pdev, 4851 4960 const struct pci_device_id *ent) 4852 4961 { ··· 4985 4926 if (pci_try_set_mwi(pdev)) 4986 4927 printk(KERN_WARNING PFX "Could not enable MWI for %s\n", 4987 4928 pci_name(pdev)); 4929 + 4930 + cas_program_bridge(pdev); 4988 4931 4989 4932 /* 4990 4933 * On some architectures, the default cache line size set

+9 -9

drivers/net/cassini.h

··· 4122 4122 inserted into 4123 4123 outgoing frame. */ 4124 4124 struct cas_tx_desc { 4125 - u64 control; 4126 - u64 buffer; 4125 + __le64 control; 4126 + __le64 buffer; 4127 4127 }; 4128 4128 4129 4129 /* descriptor ring for free buffers contains page-sized buffers. the index ··· 4131 4131 * the completion ring. 4132 4132 */ 4133 4133 struct cas_rx_desc { 4134 - u64 index; 4135 - u64 buffer; 4134 + __le64 index; 4135 + __le64 buffer; 4136 4136 }; 4137 4137 4138 4138 /* received packets are put on the completion ring. */ ··· 4210 4210 #define RX_INDEX_RELEASE 0x0000000000002000ULL 4211 4211 4212 4212 struct cas_rx_comp { 4213 - u64 word1; 4214 - u64 word2; 4215 - u64 word3; 4216 - u64 word4; 4213 + __le64 word1; 4214 + __le64 word2; 4215 + __le64 word3; 4216 + __le64 word4; 4217 4217 }; 4218 4218 4219 4219 enum link_state { ··· 4252 4252 struct cas_rx_comp rxcs[N_RX_COMP_RINGS][INIT_BLOCK_RX_COMP]; 4253 4253 struct cas_rx_desc rxds[N_RX_DESC_RINGS][INIT_BLOCK_RX_DESC]; 4254 4254 struct cas_tx_desc txds[N_TX_RINGS][INIT_BLOCK_TX]; 4255 - u64 tx_compwb; 4255 + __le64 tx_compwb; 4256 4256 }; 4257 4257 4258 4258 /* tiny buffers to deal with target abort issue. we allocate a bit

+1 -1

net/ipv4/devinet.c

··· 1027 1027 memcpy(ifa->ifa_label, dev->name, IFNAMSIZ); 1028 1028 if (named++ == 0) 1029 1029 continue; 1030 - dot = strchr(ifa->ifa_label, ':'); 1030 + dot = strchr(old, ':'); 1031 1031 if (dot == NULL) { 1032 1032 sprintf(old, ":%d", named); 1033 1033 dot = old;

+3 -2

net/x25/x25_forward.c

··· 118 118 goto out; 119 119 120 120 if ( (skbn = pskb_copy(skb, GFP_ATOMIC)) == NULL){ 121 - goto out; 121 + goto output; 122 122 123 123 } 124 124 x25_transmit_link(skbn, nb); 125 125 126 - x25_neigh_put(nb); 127 126 rc = 1; 127 + output: 128 + x25_neigh_put(nb); 128 129 out: 129 130 return rc; 130 131 }

+2

net/xfrm/xfrm_state.c

··· 1749 1749 } 1750 1750 EXPORT_SYMBOL(km_policy_expired); 1751 1751 1752 + #ifdef CONFIG_XFRM_MIGRATE 1752 1753 int km_migrate(struct xfrm_selector *sel, u8 dir, u8 type, 1753 1754 struct xfrm_migrate *m, int num_migrate) 1754 1755 { ··· 1769 1768 return err; 1770 1769 } 1771 1770 EXPORT_SYMBOL(km_migrate); 1771 + #endif 1772 1772 1773 1773 int km_report(u8 proto, struct xfrm_selector *sel, xfrm_address_t *addr) 1774 1774 {

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