Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/dpu: get rid of DPU_INTF_INPUT_CTRL
Continue migration to the MDSS-revision based checks and replace
DPU_INTF_INPUT_CTRL feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655389/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-15-3b2085a07884@oss.qualcomm.com
authored by
Dmitry Baryshkov
and committed by
Dmitry Baryshkov
458de858
e432d2e1
+1
-94
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
···
364
364
{
365
365
.name = "intf_0", .id = INTF_0,
366
366
.base = 0x34000, .len = 0x280,
367
-
.features = INTF_SC7180_MASK,
368
367
.type = INTF_DP,
369
368
.controller_id = MSM_DP_CONTROLLER_0,
370
369
.prog_fetch_lines_worst_case = 24,
···
372
373
}, {
373
374
.name = "intf_1", .id = INTF_1,
374
375
.base = 0x35000, .len = 0x300,
375
-
.features = INTF_SC7180_MASK,
376
376
.type = INTF_DSI,
377
377
.controller_id = MSM_DSI_CONTROLLER_0,
378
378
.prog_fetch_lines_worst_case = 24,
···
381
383
}, {
382
384
.name = "intf_2", .id = INTF_2,
383
385
.base = 0x36000, .len = 0x300,
384
-
.features = INTF_SC7180_MASK,
385
386
.type = INTF_DSI,
386
387
.controller_id = MSM_DSI_CONTROLLER_1,
387
388
.prog_fetch_lines_worst_case = 24,
···
390
393
}, {
391
394
.name = "intf_3", .id = INTF_3,
392
395
.base = 0x37000, .len = 0x280,
393
-
.features = INTF_SC7180_MASK,
394
396
.type = INTF_DP,
395
397
.controller_id = MSM_DP_CONTROLLER_1,
396
398
.prog_fetch_lines_worst_case = 24,
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
···
301
301
{
302
302
.name = "intf_0", .id = INTF_0,
303
303
.base = 0x6a000, .len = 0x280,
304
-
.features = INTF_SC7180_MASK,
305
304
.type = INTF_DP,
306
305
.controller_id = MSM_DP_CONTROLLER_0,
307
306
.prog_fetch_lines_worst_case = 24,
···
309
310
}, {
310
311
.name = "intf_1", .id = INTF_1,
311
312
.base = 0x6a800, .len = 0x2bc,
312
-
.features = INTF_SC7180_MASK,
313
313
.type = INTF_DSI,
314
314
.controller_id = MSM_DSI_CONTROLLER_0,
315
315
.prog_fetch_lines_worst_case = 24,
···
318
320
}, {
319
321
.name = "intf_2", .id = INTF_2,
320
322
.base = 0x6b000, .len = 0x2bc,
321
-
.features = INTF_SC7180_MASK,
322
323
.type = INTF_DSI,
323
324
.controller_id = MSM_DSI_CONTROLLER_1,
324
325
.prog_fetch_lines_worst_case = 24,
···
327
330
}, {
328
331
.name = "intf_3", .id = INTF_3,
329
332
.base = 0x6b800, .len = 0x280,
330
-
.features = INTF_SC7180_MASK,
331
333
.type = INTF_DP,
332
334
.controller_id = MSM_DP_CONTROLLER_1,
333
335
.prog_fetch_lines_worst_case = 24,
-6
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
-6
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
···
309
309
{
310
310
.name = "intf_0", .id = INTF_0,
311
311
.base = 0x6a000, .len = 0x280,
312
-
.features = INTF_SC7180_MASK,
313
312
.type = INTF_DP,
314
313
.controller_id = MSM_DP_CONTROLLER_0,
315
314
.prog_fetch_lines_worst_case = 24,
···
317
318
}, {
318
319
.name = "intf_1", .id = INTF_1,
319
320
.base = 0x6a800, .len = 0x2bc,
320
-
.features = INTF_SC7180_MASK,
321
321
.type = INTF_DSI,
322
322
.controller_id = MSM_DSI_CONTROLLER_0,
323
323
.prog_fetch_lines_worst_case = 24,
···
326
328
}, {
327
329
.name = "intf_2", .id = INTF_2,
328
330
.base = 0x6b000, .len = 0x2bc,
329
-
.features = INTF_SC7180_MASK,
330
331
.type = INTF_DSI,
331
332
.controller_id = MSM_DSI_CONTROLLER_1,
332
333
.prog_fetch_lines_worst_case = 24,
···
337
340
{
338
341
.name = "intf_3", .id = INTF_3,
339
342
.base = 0x6b800, .len = 0x280,
340
-
.features = INTF_SC7180_MASK,
341
343
.type = INTF_DP,
342
344
.controller_id = 999,
343
345
.prog_fetch_lines_worst_case = 24,
···
345
349
}, {
346
350
.name = "intf_4", .id = INTF_4,
347
351
.base = 0x6c000, .len = 0x280,
348
-
.features = INTF_SC7180_MASK,
349
352
.type = INTF_DP,
350
353
.controller_id = MSM_DP_CONTROLLER_1,
351
354
.prog_fetch_lines_worst_case = 24,
···
353
358
}, {
354
359
.name = "intf_5", .id = INTF_5,
355
360
.base = 0x6c800, .len = 0x280,
356
-
.features = INTF_SC7180_MASK,
357
361
.type = INTF_DP,
358
362
.controller_id = MSM_DP_CONTROLLER_2,
359
363
.prog_fetch_lines_worst_case = 24,
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
···
210
210
{
211
211
.name = "intf_0", .id = INTF_0,
212
212
.base = 0x6a000, .len = 0x280,
213
-
.features = INTF_SC7180_MASK,
214
213
.type = INTF_DP,
215
214
.controller_id = MSM_DP_CONTROLLER_0,
216
215
.prog_fetch_lines_worst_case = 24,
···
218
219
}, {
219
220
.name = "intf_1", .id = INTF_1,
220
221
.base = 0x6a800, .len = 0x2bc,
221
-
.features = INTF_SC7180_MASK,
222
222
.type = INTF_DSI,
223
223
.controller_id = MSM_DSI_CONTROLLER_0,
224
224
.prog_fetch_lines_worst_case = 24,
···
227
229
}, {
228
230
.name = "intf_2", .id = INTF_2,
229
231
.base = 0x6b000, .len = 0x2bc,
230
-
.features = INTF_SC7180_MASK,
231
232
.type = INTF_DSI,
232
233
.controller_id = MSM_DSI_CONTROLLER_1,
233
234
.prog_fetch_lines_worst_case = 24,
···
236
239
}, {
237
240
.name = "intf_3", .id = INTF_3,
238
241
.base = 0x6b800, .len = 0x280,
239
-
.features = INTF_SC7180_MASK,
240
242
.type = INTF_DP,
241
243
.controller_id = MSM_DP_CONTROLLER_1,
242
244
.prog_fetch_lines_worst_case = 24,
-3
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
-3
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
···
175
175
{
176
176
.name = "intf_0", .id = INTF_0,
177
177
.base = 0x6a000, .len = 0x280,
178
-
.features = INTF_SC7180_MASK,
179
178
.type = INTF_DP,
180
179
.controller_id = MSM_DP_CONTROLLER_0,
181
180
.prog_fetch_lines_worst_case = 24,
···
183
184
}, {
184
185
.name = "intf_1", .id = INTF_1,
185
186
.base = 0x6a800, .len = 0x2c0,
186
-
.features = INTF_SC7180_MASK,
187
187
.type = INTF_DSI,
188
188
.controller_id = MSM_DSI_CONTROLLER_0,
189
189
.prog_fetch_lines_worst_case = 24,
···
192
194
}, {
193
195
.name = "intf_3", .id = INTF_3,
194
196
.base = 0x6b800, .len = 0x280,
195
-
.features = INTF_SC7180_MASK,
196
197
.type = INTF_DP,
197
198
.controller_id = MSM_DP_CONTROLLER_1,
198
199
.prog_fetch_lines_worst_case = 24,
-2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
-2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
···
152
152
{
153
153
.name = "intf_0", .id = INTF_0,
154
154
.base = 0x6a000, .len = 0x280,
155
-
.features = INTF_SC7180_MASK,
156
155
.type = INTF_DP,
157
156
.controller_id = MSM_DP_CONTROLLER_0,
158
157
.prog_fetch_lines_worst_case = 24,
···
160
161
}, {
161
162
.name = "intf_1", .id = INTF_1,
162
163
.base = 0x6a800, .len = 0x2c0,
163
-
.features = INTF_SC7180_MASK,
164
164
.type = INTF_DSI,
165
165
.controller_id = 0,
166
166
.prog_fetch_lines_worst_case = 24,
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
···
284
284
{
285
285
.name = "intf_0", .id = INTF_0,
286
286
.base = 0x6a000, .len = 0x280,
287
-
.features = INTF_SC7180_MASK,
288
287
.type = INTF_DP,
289
288
.controller_id = MSM_DP_CONTROLLER_0,
290
289
.prog_fetch_lines_worst_case = 24,
···
292
293
}, {
293
294
.name = "intf_1", .id = INTF_1,
294
295
.base = 0x6a800, .len = 0x2c0,
295
-
.features = INTF_SC7180_MASK,
296
296
.type = INTF_DSI,
297
297
.controller_id = MSM_DSI_CONTROLLER_0,
298
298
.prog_fetch_lines_worst_case = 24,
···
301
303
}, {
302
304
.name = "intf_2", .id = INTF_2,
303
305
.base = 0x6b000, .len = 0x2c0,
304
-
.features = INTF_SC7180_MASK,
305
306
.type = INTF_DSI,
306
307
.controller_id = MSM_DSI_CONTROLLER_1,
307
308
.prog_fetch_lines_worst_case = 24,
···
310
313
}, {
311
314
.name = "intf_3", .id = INTF_3,
312
315
.base = 0x6b800, .len = 0x280,
313
-
.features = INTF_SC7180_MASK,
314
316
.type = INTF_DP,
315
317
.controller_id = MSM_DP_CONTROLLER_1,
316
318
.prog_fetch_lines_worst_case = 24,
-2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
-2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
···
129
129
{
130
130
.name = "intf_0", .id = INTF_0,
131
131
.base = 0x6a000, .len = 0x280,
132
-
.features = INTF_SC7180_MASK,
133
132
.type = INTF_DP,
134
133
.controller_id = MSM_DP_CONTROLLER_0,
135
134
.prog_fetch_lines_worst_case = 24,
···
137
138
}, {
138
139
.name = "intf_1", .id = INTF_1,
139
140
.base = 0x6a800, .len = 0x2c0,
140
-
.features = INTF_SC7180_MASK,
141
141
.type = INTF_DSI,
142
142
.controller_id = MSM_DSI_CONTROLLER_0,
143
143
.prog_fetch_lines_worst_case = 24,
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
-2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
-2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
···
160
160
{
161
161
.name = "intf_0", .id = INTF_0,
162
162
.base = 0x6a000, .len = 0x280,
163
-
.features = INTF_SC7180_MASK,
164
163
.type = INTF_DP,
165
164
.controller_id = MSM_DP_CONTROLLER_0,
166
165
.prog_fetch_lines_worst_case = 35,
···
168
169
}, {
169
170
.name = "intf_1", .id = INTF_1,
170
171
.base = 0x6a800, .len = 0x2c0,
171
-
.features = INTF_SC7180_MASK,
172
172
.type = INTF_DSI,
173
173
.controller_id = MSM_DSI_CONTROLLER_0,
174
174
.prog_fetch_lines_worst_case = 35,
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
···
308
308
{
309
309
.name = "intf_0", .id = INTF_0,
310
310
.base = 0x34000, .len = 0x280,
311
-
.features = INTF_SC7180_MASK,
312
311
.type = INTF_DP,
313
312
.controller_id = MSM_DP_CONTROLLER_0,
314
313
.prog_fetch_lines_worst_case = 24,
···
316
317
}, {
317
318
.name = "intf_1", .id = INTF_1,
318
319
.base = 0x35000, .len = 0x2c4,
319
-
.features = INTF_SC7180_MASK,
320
320
.type = INTF_DSI,
321
321
.controller_id = MSM_DSI_CONTROLLER_0,
322
322
.prog_fetch_lines_worst_case = 24,
···
325
327
}, {
326
328
.name = "intf_2", .id = INTF_2,
327
329
.base = 0x36000, .len = 0x2c4,
328
-
.features = INTF_SC7180_MASK,
329
330
.type = INTF_DSI,
330
331
.controller_id = MSM_DSI_CONTROLLER_1,
331
332
.prog_fetch_lines_worst_case = 24,
···
334
337
}, {
335
338
.name = "intf_3", .id = INTF_3,
336
339
.base = 0x37000, .len = 0x280,
337
-
.features = INTF_SC7180_MASK,
338
340
.type = INTF_DP,
339
341
.controller_id = MSM_DP_CONTROLLER_1,
340
342
.prog_fetch_lines_worst_case = 24,
-3
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
-3
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
···
178
178
{
179
179
.name = "intf_0", .id = INTF_0,
180
180
.base = 0x34000, .len = 0x280,
181
-
.features = INTF_SC7180_MASK,
182
181
.type = INTF_DP,
183
182
.controller_id = MSM_DP_CONTROLLER_0,
184
183
.prog_fetch_lines_worst_case = 24,
···
186
187
}, {
187
188
.name = "intf_1", .id = INTF_1,
188
189
.base = 0x35000, .len = 0x2c4,
189
-
.features = INTF_SC7180_MASK,
190
190
.type = INTF_DSI,
191
191
.controller_id = MSM_DSI_CONTROLLER_0,
192
192
.prog_fetch_lines_worst_case = 24,
···
195
197
}, {
196
198
.name = "intf_5", .id = INTF_5,
197
199
.base = 0x39000, .len = 0x280,
198
-
.features = INTF_SC7180_MASK,
199
200
.type = INTF_DP,
200
201
.controller_id = MSM_DP_CONTROLLER_1,
201
202
.prog_fetch_lines_worst_case = 24,
-9
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
-9
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
···
304
304
{
305
305
.name = "intf_0", .id = INTF_0,
306
306
.base = 0x34000, .len = 0x280,
307
-
.features = INTF_SC7180_MASK,
308
307
.type = INTF_DP,
309
308
.controller_id = MSM_DP_CONTROLLER_0,
310
309
.prog_fetch_lines_worst_case = 24,
···
312
313
}, {
313
314
.name = "intf_1", .id = INTF_1,
314
315
.base = 0x35000, .len = 0x300,
315
-
.features = INTF_SC7180_MASK,
316
316
.type = INTF_DSI,
317
317
.controller_id = MSM_DSI_CONTROLLER_0,
318
318
.prog_fetch_lines_worst_case = 24,
···
321
323
}, {
322
324
.name = "intf_2", .id = INTF_2,
323
325
.base = 0x36000, .len = 0x300,
324
-
.features = INTF_SC7180_MASK,
325
326
.type = INTF_DSI,
326
327
.controller_id = MSM_DSI_CONTROLLER_1,
327
328
.prog_fetch_lines_worst_case = 24,
···
330
333
}, {
331
334
.name = "intf_3", .id = INTF_3,
332
335
.base = 0x37000, .len = 0x280,
333
-
.features = INTF_SC7180_MASK,
334
336
.type = INTF_NONE,
335
337
.controller_id = MSM_DP_CONTROLLER_0,
336
338
.prog_fetch_lines_worst_case = 24,
···
338
342
}, {
339
343
.name = "intf_4", .id = INTF_4,
340
344
.base = 0x38000, .len = 0x280,
341
-
.features = INTF_SC7180_MASK,
342
345
.type = INTF_DP,
343
346
.controller_id = MSM_DP_CONTROLLER_1,
344
347
.prog_fetch_lines_worst_case = 24,
···
346
351
}, {
347
352
.name = "intf_5", .id = INTF_5,
348
353
.base = 0x39000, .len = 0x280,
349
-
.features = INTF_SC7180_MASK,
350
354
.type = INTF_DP,
351
355
.controller_id = MSM_DP_CONTROLLER_3,
352
356
.prog_fetch_lines_worst_case = 24,
···
354
360
}, {
355
361
.name = "intf_6", .id = INTF_6,
356
362
.base = 0x3a000, .len = 0x280,
357
-
.features = INTF_SC7180_MASK,
358
363
.type = INTF_DP,
359
364
.controller_id = MSM_DP_CONTROLLER_2,
360
365
.prog_fetch_lines_worst_case = 24,
···
362
369
}, {
363
370
.name = "intf_7", .id = INTF_7,
364
371
.base = 0x3b000, .len = 0x280,
365
-
.features = INTF_SC7180_MASK,
366
372
.type = INTF_NONE,
367
373
.controller_id = MSM_DP_CONTROLLER_2,
368
374
.prog_fetch_lines_worst_case = 24,
···
370
378
}, {
371
379
.name = "intf_8", .id = INTF_8,
372
380
.base = 0x3c000, .len = 0x280,
373
-
.features = INTF_SC7180_MASK,
374
381
.type = INTF_NONE,
375
382
.controller_id = MSM_DP_CONTROLLER_1,
376
383
.prog_fetch_lines_worst_case = 24,
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
···
324
324
{
325
325
.name = "intf_0", .id = INTF_0,
326
326
.base = 0x34000, .len = 0x280,
327
-
.features = INTF_SC7180_MASK,
328
327
.type = INTF_DP,
329
328
.controller_id = MSM_DP_CONTROLLER_0,
330
329
.prog_fetch_lines_worst_case = 24,
···
332
333
}, {
333
334
.name = "intf_1", .id = INTF_1,
334
335
.base = 0x35000, .len = 0x300,
335
-
.features = INTF_SC7180_MASK,
336
336
.type = INTF_DSI,
337
337
.controller_id = MSM_DSI_CONTROLLER_0,
338
338
.prog_fetch_lines_worst_case = 24,
···
341
343
}, {
342
344
.name = "intf_2", .id = INTF_2,
343
345
.base = 0x36000, .len = 0x300,
344
-
.features = INTF_SC7180_MASK,
345
346
.type = INTF_DSI,
346
347
.controller_id = MSM_DSI_CONTROLLER_1,
347
348
.prog_fetch_lines_worst_case = 24,
···
350
353
}, {
351
354
.name = "intf_3", .id = INTF_3,
352
355
.base = 0x37000, .len = 0x280,
353
-
.features = INTF_SC7180_MASK,
354
356
.type = INTF_DP,
355
357
.controller_id = MSM_DP_CONTROLLER_1,
356
358
.prog_fetch_lines_worst_case = 24,
-8
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h
-8
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h
···
334
334
{
335
335
.name = "intf_0", .id = INTF_0,
336
336
.base = 0x34000, .len = 0x280,
337
-
.features = INTF_SC7180_MASK,
338
337
.type = INTF_DP,
339
338
.controller_id = MSM_DP_CONTROLLER_0,
340
339
.prog_fetch_lines_worst_case = 24,
···
342
343
}, {
343
344
.name = "intf_1", .id = INTF_1,
344
345
.base = 0x35000, .len = 0x300,
345
-
.features = INTF_SC7180_MASK,
346
346
.type = INTF_DSI,
347
347
.controller_id = MSM_DSI_CONTROLLER_0,
348
348
.prog_fetch_lines_worst_case = 24,
···
351
353
}, {
352
354
.name = "intf_2", .id = INTF_2,
353
355
.base = 0x36000, .len = 0x300,
354
-
.features = INTF_SC7180_MASK,
355
356
.type = INTF_DSI,
356
357
.controller_id = MSM_DSI_CONTROLLER_1,
357
358
.prog_fetch_lines_worst_case = 24,
···
360
363
}, {
361
364
.name = "intf_3", .id = INTF_3,
362
365
.base = 0x37000, .len = 0x280,
363
-
.features = INTF_SC7180_MASK,
364
366
.type = INTF_NONE,
365
367
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
366
368
.prog_fetch_lines_worst_case = 24,
···
368
372
}, {
369
373
.name = "intf_4", .id = INTF_4,
370
374
.base = 0x38000, .len = 0x280,
371
-
.features = INTF_SC7180_MASK,
372
375
.type = INTF_DP,
373
376
.controller_id = MSM_DP_CONTROLLER_1,
374
377
.prog_fetch_lines_worst_case = 24,
···
376
381
}, {
377
382
.name = "intf_6", .id = INTF_6,
378
383
.base = 0x3A000, .len = 0x280,
379
-
.features = INTF_SC7180_MASK,
380
384
.type = INTF_NONE,
381
385
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
382
386
.prog_fetch_lines_worst_case = 24,
···
384
390
}, {
385
391
.name = "intf_7", .id = INTF_7,
386
392
.base = 0x3b000, .len = 0x280,
387
-
.features = INTF_SC7180_MASK,
388
393
.type = INTF_NONE,
389
394
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
390
395
.prog_fetch_lines_worst_case = 24,
···
392
399
}, {
393
400
.name = "intf_8", .id = INTF_8,
394
401
.base = 0x3c000, .len = 0x280,
395
-
.features = INTF_SC7180_MASK,
396
402
.type = INTF_NONE,
397
403
.controller_id = MSM_DP_CONTROLLER_1, /* pair with intf_4 for DP MST */
398
404
.prog_fetch_lines_worst_case = 24,
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
···
319
319
{
320
320
.name = "intf_0", .id = INTF_0,
321
321
.base = 0x34000, .len = 0x280,
322
-
.features = INTF_SC7180_MASK,
323
322
.type = INTF_DP,
324
323
.controller_id = MSM_DP_CONTROLLER_0,
325
324
.prog_fetch_lines_worst_case = 24,
···
327
328
}, {
328
329
.name = "intf_1", .id = INTF_1,
329
330
.base = 0x35000, .len = 0x300,
330
-
.features = INTF_SC7180_MASK,
331
331
.type = INTF_DSI,
332
332
.controller_id = MSM_DSI_CONTROLLER_0,
333
333
.prog_fetch_lines_worst_case = 24,
···
336
338
}, {
337
339
.name = "intf_2", .id = INTF_2,
338
340
.base = 0x36000, .len = 0x300,
339
-
.features = INTF_SC7180_MASK,
340
341
.type = INTF_DSI,
341
342
.controller_id = MSM_DSI_CONTROLLER_1,
342
343
.prog_fetch_lines_worst_case = 24,
···
345
348
}, {
346
349
.name = "intf_3", .id = INTF_3,
347
350
.base = 0x37000, .len = 0x280,
348
-
.features = INTF_SC7180_MASK,
349
351
.type = INTF_DP,
350
352
.controller_id = MSM_DP_CONTROLLER_1,
351
353
.prog_fetch_lines_worst_case = 24,
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h
-4
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h
···
319
319
{
320
320
.name = "intf_0", .id = INTF_0,
321
321
.base = 0x34000, .len = 0x280,
322
-
.features = INTF_SC7180_MASK,
323
322
.type = INTF_DP,
324
323
.controller_id = MSM_DP_CONTROLLER_0,
325
324
.prog_fetch_lines_worst_case = 24,
···
327
328
}, {
328
329
.name = "intf_1", .id = INTF_1,
329
330
.base = 0x35000, .len = 0x300,
330
-
.features = INTF_SC7180_MASK,
331
331
.type = INTF_DSI,
332
332
.controller_id = MSM_DSI_CONTROLLER_0,
333
333
.prog_fetch_lines_worst_case = 24,
···
336
338
}, {
337
339
.name = "intf_2", .id = INTF_2,
338
340
.base = 0x36000, .len = 0x300,
339
-
.features = INTF_SC7180_MASK,
340
341
.type = INTF_DSI,
341
342
.controller_id = MSM_DSI_CONTROLLER_1,
342
343
.prog_fetch_lines_worst_case = 24,
···
345
348
}, {
346
349
.name = "intf_3", .id = INTF_3,
347
350
.base = 0x37000, .len = 0x280,
348
-
.features = INTF_SC7180_MASK,
349
351
.type = INTF_DP,
350
352
.controller_id = MSM_DP_CONTROLLER_1,
351
353
.prog_fetch_lines_worst_case = 24,
-9
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
-9
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
···
320
320
{
321
321
.name = "intf_0", .id = INTF_0,
322
322
.base = 0x34000, .len = 0x280,
323
-
.features = INTF_SC7180_MASK,
324
323
.type = INTF_DP,
325
324
.controller_id = MSM_DP_CONTROLLER_0,
326
325
.prog_fetch_lines_worst_case = 24,
···
328
329
}, {
329
330
.name = "intf_1", .id = INTF_1,
330
331
.base = 0x35000, .len = 0x300,
331
-
.features = INTF_SC7180_MASK,
332
332
.type = INTF_DSI,
333
333
.controller_id = MSM_DSI_CONTROLLER_0,
334
334
.prog_fetch_lines_worst_case = 24,
···
337
339
}, {
338
340
.name = "intf_2", .id = INTF_2,
339
341
.base = 0x36000, .len = 0x300,
340
-
.features = INTF_SC7180_MASK,
341
342
.type = INTF_DSI,
342
343
.controller_id = MSM_DSI_CONTROLLER_1,
343
344
.prog_fetch_lines_worst_case = 24,
···
346
349
}, {
347
350
.name = "intf_3", .id = INTF_3,
348
351
.base = 0x37000, .len = 0x280,
349
-
.features = INTF_SC7180_MASK,
350
352
.type = INTF_NONE,
351
353
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
352
354
.prog_fetch_lines_worst_case = 24,
···
354
358
}, {
355
359
.name = "intf_4", .id = INTF_4,
356
360
.base = 0x38000, .len = 0x280,
357
-
.features = INTF_SC7180_MASK,
358
361
.type = INTF_DP,
359
362
.controller_id = MSM_DP_CONTROLLER_1,
360
363
.prog_fetch_lines_worst_case = 24,
···
362
367
}, {
363
368
.name = "intf_5", .id = INTF_5,
364
369
.base = 0x39000, .len = 0x280,
365
-
.features = INTF_SC7180_MASK,
366
370
.type = INTF_DP,
367
371
.controller_id = MSM_DP_CONTROLLER_3,
368
372
.prog_fetch_lines_worst_case = 24,
···
370
376
}, {
371
377
.name = "intf_6", .id = INTF_6,
372
378
.base = 0x3A000, .len = 0x280,
373
-
.features = INTF_SC7180_MASK,
374
379
.type = INTF_DP,
375
380
.controller_id = MSM_DP_CONTROLLER_2,
376
381
.prog_fetch_lines_worst_case = 24,
···
378
385
}, {
379
386
.name = "intf_7", .id = INTF_7,
380
387
.base = 0x3b000, .len = 0x280,
381
-
.features = INTF_SC7180_MASK,
382
388
.type = INTF_NONE,
383
389
.controller_id = MSM_DP_CONTROLLER_2, /* pair with intf_6 for DP MST */
384
390
.prog_fetch_lines_worst_case = 24,
···
386
394
}, {
387
395
.name = "intf_8", .id = INTF_8,
388
396
.base = 0x3c000, .len = 0x280,
389
-
.features = INTF_SC7180_MASK,
390
397
.type = INTF_NONE,
391
398
.controller_id = MSM_DP_CONTROLLER_1, /* pair with intf_4 for DP MST */
392
399
.prog_fetch_lines_worst_case = 24,
-3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
-3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
···
104
104
#define PINGPONG_SM8150_MASK \
105
105
(BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC))
106
106
107
-
#define INTF_SC7180_MASK \
108
-
(BIT(DPU_INTF_INPUT_CTRL))
109
-
110
107
#define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \
111
108
BIT(DPU_WB_UBWC) | \
112
109
BIT(DPU_WB_YUV_CONFIG) | \
-11
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
-11
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
···
140
140
};
141
141
142
142
/**
143
-
* INTF sub-blocks
144
-
* @DPU_INTF_INPUT_CTRL Supports the setting of pp block from which
145
-
* pixel data arrives to this INTF
146
-
* @DPU_INTF_MAX
147
-
*/
148
-
enum {
149
-
DPU_INTF_INPUT_CTRL = 0x1,
150
-
DPU_INTF_MAX
151
-
};
152
-
153
-
/**
154
143
* WB sub-blocks and features
155
144
* @DPU_WB_LINE_MODE Writeback module supports line/linear mode
156
145
* @DPU_WB_BLOCK_MODE Writeback module supports block mode read
+1
-1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+1
-1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
···
588
588
c->ops.setup_misr = dpu_hw_intf_setup_misr;
589
589
c->ops.collect_misr = dpu_hw_intf_collect_misr;
590
590
591
-
if (cfg->features & BIT(DPU_INTF_INPUT_CTRL))
591
+
if (mdss_rev->core_major_ver >= 5)
592
592
c->ops.bind_pingpong_blk = dpu_hw_intf_bind_pingpong_blk;
593
593
594
594
/* INTF TE is only for DSI interfaces */