Merge tag 'pcmcia-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux

-1

arch/mips/configs/mtx1_defconfig

··· 15 15 CONFIG_PCCARD=m 16 16 CONFIG_YENTA=m 17 17 CONFIG_PD6729=m 18 - CONFIG_I82092=m 19 18 CONFIG_MODULES=y 20 19 CONFIG_MODULE_UNLOAD=y 21 20 CONFIG_MODVERSIONS=y

-2

arch/powerpc/configs/ppc6xx_defconfig

··· 72 72 CONFIG_PCCARD=y 73 73 CONFIG_YENTA=y 74 74 CONFIG_PD6729=m 75 - CONFIG_I82092=m 76 - CONFIG_I82365=m 77 75 CONFIG_ADVANCED_OPTIONS=y 78 76 CONFIG_NET=y 79 77 CONFIG_PACKET=y

+1 -1

arch/x86/kernel/resource.c

··· 62 62 /* 63 63 * Trim out BIOS area (high 2MB) and E820 regions. We do not remove 64 64 * the low 1MB unconditionally, as this area is needed for some ISA 65 - * cards requiring a memory range, e.g. the i82365 PCMCIA controller. 65 + * cards requiring a memory range. 66 66 */ 67 67 if (avail->flags & IORESOURCE_MEM) { 68 68 resource_clip(avail, BIOS_ROM_BASE, BIOS_ROM_END);

+1 -3

drivers/pci/quirks.c

··· 1296 1296 1297 1297 /* 1298 1298 * CardBus controllers have a legacy base address that enables them to 1299 - * respond as i82365 pcmcia controllers. We don't want them to do this 1300 - * even if the Linux CardBus driver is not loaded, because the Linux i82365 1301 - * driver does not (and should not) handle CardBus. 1299 + * respond as i82365 PCMCIA controllers. We don't want them to do this. 1302 1300 */ 1303 1301 static void quirk_cardbus_legacy(struct pci_dev *dev) 1304 1302 {

-30

drivers/pcmcia/Kconfig

··· 119 119 This provides support for the Cirrus PD6729 PCI-to-PCMCIA bridge 120 120 device, found in some older laptops and PCMCIA card readers. 121 121 122 - config I82092 123 - tristate "i82092 compatible bridge support" 124 - depends on PCMCIA && PCI && HAS_IOPORT 125 - select PCCARD_NONSTATIC 126 - help 127 - This provides support for the Intel I82092AA PCI-to-PCMCIA bridge device, 128 - found in some older laptops and more commonly in evaluation boards for the 129 - chip. 130 - 131 - config I82365 132 - tristate "i82365 compatible bridge support" 133 - depends on PCMCIA && ISA 134 - select PCCARD_NONSTATIC 135 - help 136 - Say Y here to include support for ISA-bus PCMCIA host bridges that 137 - are register compatible with the Intel i82365. These are found on 138 - older laptops and ISA-bus card readers for desktop systems. A 139 - "bridge" is the hardware inside your computer that PCMCIA cards are 140 - plugged into. If unsure, say N. 141 - 142 - config TCIC 143 - tristate "Databook TCIC host bridge support" 144 - depends on PCMCIA && ISA 145 - select PCCARD_NONSTATIC 146 - help 147 - Say Y here to include support for the Databook TCIC family of PCMCIA 148 - host bridges. These are only found on a handful of old systems. 149 - "Bridge" is the name used for the hardware inside your computer that 150 - PCMCIA cards are plugged into. If unsure, say N. 151 - 152 122 config PCMCIA_ALCHEMY_DEVBOARD 153 123 tristate "Alchemy Db/Pb1xxx PCMCIA socket services" 154 124 depends on MIPS_DB1XXX && PCMCIA

-3

drivers/pcmcia/Makefile

··· 20 20 obj-$(CONFIG_YENTA) += yenta_socket.o 21 21 22 22 obj-$(CONFIG_PD6729) += pd6729.o 23 - obj-$(CONFIG_I82365) += i82365.o 24 - obj-$(CONFIG_I82092) += i82092.o 25 - obj-$(CONFIG_TCIC) += tcic.o 26 23 obj-$(CONFIG_PCMCIA_SOC_COMMON) += soc_common.o 27 24 obj-$(CONFIG_PCMCIA_SA11XX_BASE) += sa11xx_base.o 28 25 obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o

-679

drivers/pcmcia/i82092.c

··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Driver for Intel I82092AA PCI-PCMCIA bridge. 4 - * 5 - * (C) 2001 Red Hat, Inc. 6 - * 7 - * Author: Arjan Van De Ven <arjanv@redhat.com> 8 - * Loosly based on i82365.c from the pcmcia-cs package 9 - */ 10 - 11 - #include <linux/kernel.h> 12 - #include <linux/module.h> 13 - #include <linux/pci.h> 14 - #include <linux/init.h> 15 - #include <linux/workqueue.h> 16 - #include <linux/interrupt.h> 17 - #include <linux/device.h> 18 - 19 - #include <pcmcia/ss.h> 20 - 21 - #include <linux/io.h> 22 - 23 - #include "i82092aa.h" 24 - #include "i82365.h" 25 - 26 - MODULE_DESCRIPTION("Driver for Intel I82092AA PCI-PCMCIA bridge"); 27 - MODULE_LICENSE("GPL"); 28 - 29 - /* PCI core routines */ 30 - static const struct pci_device_id i82092aa_pci_ids[] = { 31 - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82092AA_0) }, 32 - { } 33 - }; 34 - MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids); 35 - 36 - static struct pci_driver i82092aa_pci_driver = { 37 - .name = "i82092aa", 38 - .id_table = i82092aa_pci_ids, 39 - .probe = i82092aa_pci_probe, 40 - .remove = i82092aa_pci_remove, 41 - }; 42 - 43 - 44 - /* the pccard structure and its functions */ 45 - static struct pccard_operations i82092aa_operations = { 46 - .init = i82092aa_init, 47 - .get_status = i82092aa_get_status, 48 - .set_socket = i82092aa_set_socket, 49 - .set_io_map = i82092aa_set_io_map, 50 - .set_mem_map = i82092aa_set_mem_map, 51 - }; 52 - 53 - /* The card can do up to 4 sockets, allocate a structure for each of them */ 54 - 55 - struct socket_info { 56 - int number; 57 - int card_state; 58 - /* 0 = no socket, 59 - * 1 = empty socket, 60 - * 2 = card but not initialized, 61 - * 3 = operational card 62 - */ 63 - unsigned int io_base; /* base io address of the socket */ 64 - 65 - struct pcmcia_socket socket; 66 - struct pci_dev *dev; /* The PCI device for the socket */ 67 - }; 68 - 69 - #define MAX_SOCKETS 4 70 - static struct socket_info sockets[MAX_SOCKETS]; 71 - static int socket_count; /* shortcut */ 72 - 73 - 74 - static int i82092aa_pci_probe(struct pci_dev *dev, 75 - const struct pci_device_id *id) 76 - { 77 - unsigned char configbyte; 78 - int i, ret; 79 - 80 - ret = pci_enable_device(dev); 81 - if (ret) 82 - return ret; 83 - 84 - /* PCI Configuration Control */ 85 - pci_read_config_byte(dev, 0x40, &configbyte); 86 - 87 - switch (configbyte&6) { 88 - case 0: 89 - socket_count = 2; 90 - break; 91 - case 2: 92 - socket_count = 1; 93 - break; 94 - case 4: 95 - case 6: 96 - socket_count = 4; 97 - break; 98 - 99 - default: 100 - dev_err(&dev->dev, 101 - "Oops, you did something we didn't think of.\n"); 102 - ret = -EIO; 103 - goto err_out_disable; 104 - } 105 - dev_info(&dev->dev, "configured as a %d socket device.\n", 106 - socket_count); 107 - 108 - if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) { 109 - ret = -EBUSY; 110 - goto err_out_disable; 111 - } 112 - 113 - for (i = 0; i < socket_count; i++) { 114 - sockets[i].card_state = 1; /* 1 = present but empty */ 115 - sockets[i].io_base = pci_resource_start(dev, 0); 116 - sockets[i].dev = dev; 117 - sockets[i].socket.features |= SS_CAP_PCCARD; 118 - sockets[i].socket.map_size = 0x1000; 119 - sockets[i].socket.irq_mask = 0; 120 - sockets[i].socket.pci_irq = dev->irq; 121 - sockets[i].socket.cb_dev = dev; 122 - sockets[i].socket.owner = THIS_MODULE; 123 - 124 - sockets[i].number = i; 125 - 126 - if (card_present(i)) { 127 - sockets[i].card_state = 3; 128 - dev_dbg(&dev->dev, "slot %i is occupied\n", i); 129 - } else { 130 - dev_dbg(&dev->dev, "slot %i is vacant\n", i); 131 - } 132 - } 133 - 134 - /* Now, specifiy that all interrupts are to be done as PCI interrupts 135 - * bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt 136 - */ 137 - configbyte = 0xFF; 138 - 139 - /* PCI Interrupt Routing Register */ 140 - pci_write_config_byte(dev, 0x50, configbyte); 141 - 142 - /* Register the interrupt handler */ 143 - dev_dbg(&dev->dev, "Requesting interrupt %i\n", dev->irq); 144 - ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, 145 - "i82092aa", i82092aa_interrupt); 146 - if (ret) { 147 - dev_err(&dev->dev, "Failed to register IRQ %d, aborting\n", 148 - dev->irq); 149 - goto err_out_free_res; 150 - } 151 - 152 - for (i = 0; i < socket_count; i++) { 153 - sockets[i].socket.dev.parent = &dev->dev; 154 - sockets[i].socket.ops = &i82092aa_operations; 155 - sockets[i].socket.resource_ops = &pccard_nonstatic_ops; 156 - ret = pcmcia_register_socket(&sockets[i].socket); 157 - if (ret) 158 - goto err_out_free_sockets; 159 - } 160 - 161 - return 0; 162 - 163 - err_out_free_sockets: 164 - if (i) { 165 - for (i--; i >= 0; i--) 166 - pcmcia_unregister_socket(&sockets[i].socket); 167 - } 168 - free_irq(dev->irq, i82092aa_interrupt); 169 - err_out_free_res: 170 - release_region(pci_resource_start(dev, 0), 2); 171 - err_out_disable: 172 - pci_disable_device(dev); 173 - return ret; 174 - } 175 - 176 - static void i82092aa_pci_remove(struct pci_dev *dev) 177 - { 178 - int i; 179 - 180 - free_irq(dev->irq, i82092aa_interrupt); 181 - 182 - for (i = 0; i < socket_count; i++) 183 - pcmcia_unregister_socket(&sockets[i].socket); 184 - } 185 - 186 - static DEFINE_SPINLOCK(port_lock); 187 - 188 - /* basic value read/write functions */ 189 - 190 - static unsigned char indirect_read(int socket, unsigned short reg) 191 - { 192 - unsigned short int port; 193 - unsigned char val; 194 - unsigned long flags; 195 - 196 - spin_lock_irqsave(&port_lock, flags); 197 - reg += socket * 0x40; 198 - port = sockets[socket].io_base; 199 - outb(reg, port); 200 - val = inb(port+1); 201 - spin_unlock_irqrestore(&port_lock, flags); 202 - return val; 203 - } 204 - 205 - static void indirect_write(int socket, unsigned short reg, unsigned char value) 206 - { 207 - unsigned short int port; 208 - unsigned long flags; 209 - 210 - spin_lock_irqsave(&port_lock, flags); 211 - reg = reg + socket * 0x40; 212 - port = sockets[socket].io_base; 213 - outb(reg, port); 214 - outb(value, port+1); 215 - spin_unlock_irqrestore(&port_lock, flags); 216 - } 217 - 218 - static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) 219 - { 220 - unsigned short int port; 221 - unsigned char val; 222 - unsigned long flags; 223 - 224 - spin_lock_irqsave(&port_lock, flags); 225 - reg = reg + socket * 0x40; 226 - port = sockets[socket].io_base; 227 - outb(reg, port); 228 - val = inb(port+1); 229 - val |= mask; 230 - outb(reg, port); 231 - outb(val, port+1); 232 - spin_unlock_irqrestore(&port_lock, flags); 233 - } 234 - 235 - 236 - static void indirect_resetbit(int socket, 237 - unsigned short reg, unsigned char mask) 238 - { 239 - unsigned short int port; 240 - unsigned char val; 241 - unsigned long flags; 242 - 243 - spin_lock_irqsave(&port_lock, flags); 244 - reg = reg + socket * 0x40; 245 - port = sockets[socket].io_base; 246 - outb(reg, port); 247 - val = inb(port+1); 248 - val &= ~mask; 249 - outb(reg, port); 250 - outb(val, port+1); 251 - spin_unlock_irqrestore(&port_lock, flags); 252 - } 253 - 254 - static void indirect_write16(int socket, 255 - unsigned short reg, unsigned short value) 256 - { 257 - unsigned short int port; 258 - unsigned char val; 259 - unsigned long flags; 260 - 261 - spin_lock_irqsave(&port_lock, flags); 262 - reg = reg + socket * 0x40; 263 - port = sockets[socket].io_base; 264 - 265 - outb(reg, port); 266 - val = value & 255; 267 - outb(val, port+1); 268 - 269 - reg++; 270 - 271 - outb(reg, port); 272 - val = value>>8; 273 - outb(val, port+1); 274 - spin_unlock_irqrestore(&port_lock, flags); 275 - } 276 - 277 - /* simple helper functions */ 278 - /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 279 - static int cycle_time = 120; 280 - 281 - static int to_cycles(int ns) 282 - { 283 - if (cycle_time != 0) 284 - return ns/cycle_time; 285 - else 286 - return 0; 287 - } 288 - 289 - 290 - /* Interrupt handler functionality */ 291 - 292 - static irqreturn_t i82092aa_interrupt(int irq, void *dev) 293 - { 294 - int i; 295 - int loopcount = 0; 296 - int handled = 0; 297 - 298 - unsigned int events, active = 0; 299 - 300 - while (1) { 301 - loopcount++; 302 - if (loopcount > 20) { 303 - pr_err("i82092aa: infinite eventloop in interrupt\n"); 304 - break; 305 - } 306 - 307 - active = 0; 308 - 309 - for (i = 0; i < socket_count; i++) { 310 - int csc; 311 - 312 - /* Inactive socket, should not happen */ 313 - if (sockets[i].card_state == 0) 314 - continue; 315 - 316 - /* card status change register */ 317 - csc = indirect_read(i, I365_CSC); 318 - 319 - if (csc == 0) /* no events on this socket */ 320 - continue; 321 - handled = 1; 322 - events = 0; 323 - 324 - if (csc & I365_CSC_DETECT) { 325 - events |= SS_DETECT; 326 - dev_info(&sockets[i].dev->dev, 327 - "Card detected in socket %i!\n", i); 328 - } 329 - 330 - if (indirect_read(i, I365_INTCTL) & I365_PC_IOCARD) { 331 - /* For IO/CARDS, bit 0 means "read the card" */ 332 - if (csc & I365_CSC_STSCHG) 333 - events |= SS_STSCHG; 334 - } else { 335 - /* Check for battery/ready events */ 336 - if (csc & I365_CSC_BVD1) 337 - events |= SS_BATDEAD; 338 - if (csc & I365_CSC_BVD2) 339 - events |= SS_BATWARN; 340 - if (csc & I365_CSC_READY) 341 - events |= SS_READY; 342 - } 343 - 344 - if (events) 345 - pcmcia_parse_events(&sockets[i].socket, events); 346 - active |= events; 347 - } 348 - 349 - if (active == 0) /* no more events to handle */ 350 - break; 351 - } 352 - return IRQ_RETVAL(handled); 353 - } 354 - 355 - 356 - 357 - /* socket functions */ 358 - 359 - static int card_present(int socketno) 360 - { 361 - unsigned int val; 362 - 363 - if ((socketno < 0) || (socketno >= MAX_SOCKETS)) 364 - return 0; 365 - if (sockets[socketno].io_base == 0) 366 - return 0; 367 - 368 - 369 - val = indirect_read(socketno, 1); /* Interface status register */ 370 - if ((val&12) == 12) 371 - return 1; 372 - 373 - return 0; 374 - } 375 - 376 - static void set_bridge_state(int sock) 377 - { 378 - indirect_write(sock, I365_GBLCTL, 0x00); 379 - indirect_write(sock, I365_GENCTL, 0x00); 380 - 381 - indirect_setbit(sock, I365_INTCTL, 0x08); 382 - } 383 - 384 - 385 - static int i82092aa_init(struct pcmcia_socket *sock) 386 - { 387 - int i; 388 - struct resource res = { .start = 0, .end = 0x0fff }; 389 - pccard_io_map io = { 0, 0, 0, 0, 1 }; 390 - pccard_mem_map mem = { .res = &res, }; 391 - 392 - for (i = 0; i < 2; i++) { 393 - io.map = i; 394 - i82092aa_set_io_map(sock, &io); 395 - } 396 - for (i = 0; i < 5; i++) { 397 - mem.map = i; 398 - i82092aa_set_mem_map(sock, &mem); 399 - } 400 - 401 - return 0; 402 - } 403 - 404 - static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value) 405 - { 406 - unsigned int sock = container_of(socket, 407 - struct socket_info, socket)->number; 408 - unsigned int status; 409 - 410 - /* Interface Status Register */ 411 - status = indirect_read(sock, I365_STATUS); 412 - 413 - *value = 0; 414 - 415 - if ((status & I365_CS_DETECT) == I365_CS_DETECT) 416 - *value |= SS_DETECT; 417 - 418 - /* IO cards have a different meaning of bits 0,1 */ 419 - /* Also notice the inverse-logic on the bits */ 420 - if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) { 421 - /* IO card */ 422 - if (!(status & I365_CS_STSCHG)) 423 - *value |= SS_STSCHG; 424 - } else { /* non I/O card */ 425 - if (!(status & I365_CS_BVD1)) 426 - *value |= SS_BATDEAD; 427 - if (!(status & I365_CS_BVD2)) 428 - *value |= SS_BATWARN; 429 - } 430 - 431 - if (status & I365_CS_WRPROT) 432 - (*value) |= SS_WRPROT; /* card is write protected */ 433 - 434 - if (status & I365_CS_READY) 435 - (*value) |= SS_READY; /* card is not busy */ 436 - 437 - if (status & I365_CS_POWERON) 438 - (*value) |= SS_POWERON; /* power is applied to the card */ 439 - 440 - return 0; 441 - } 442 - 443 - 444 - static int i82092aa_set_socket(struct pcmcia_socket *socket, 445 - socket_state_t *state) 446 - { 447 - struct socket_info *sock_info = container_of(socket, struct socket_info, 448 - socket); 449 - unsigned int sock = sock_info->number; 450 - unsigned char reg; 451 - 452 - /* First, set the global controller options */ 453 - 454 - set_bridge_state(sock); 455 - 456 - /* Values for the IGENC register */ 457 - 458 - reg = 0; 459 - 460 - /* The reset bit has "inverse" logic */ 461 - if (!(state->flags & SS_RESET)) 462 - reg = reg | I365_PC_RESET; 463 - if (state->flags & SS_IOCARD) 464 - reg = reg | I365_PC_IOCARD; 465 - 466 - /* IGENC, Interrupt and General Control Register */ 467 - indirect_write(sock, I365_INTCTL, reg); 468 - 469 - /* Power registers */ 470 - 471 - reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 472 - 473 - if (state->flags & SS_PWR_AUTO) { 474 - dev_info(&sock_info->dev->dev, "Auto power\n"); 475 - reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 476 - } 477 - if (state->flags & SS_OUTPUT_ENA) { 478 - dev_info(&sock_info->dev->dev, "Power Enabled\n"); 479 - reg |= I365_PWR_OUT; /* enable power */ 480 - } 481 - 482 - switch (state->Vcc) { 483 - case 0: 484 - break; 485 - case 50: 486 - dev_info(&sock_info->dev->dev, 487 - "setting voltage to Vcc to 5V on socket %i\n", 488 - sock); 489 - reg |= I365_VCC_5V; 490 - break; 491 - default: 492 - dev_err(&sock_info->dev->dev, 493 - "%s called with invalid VCC power value: %i", 494 - __func__, state->Vcc); 495 - return -EINVAL; 496 - } 497 - 498 - switch (state->Vpp) { 499 - case 0: 500 - dev_info(&sock_info->dev->dev, 501 - "not setting Vpp on socket %i\n", sock); 502 - break; 503 - case 50: 504 - dev_info(&sock_info->dev->dev, 505 - "setting Vpp to 5.0 for socket %i\n", sock); 506 - reg |= I365_VPP1_5V | I365_VPP2_5V; 507 - break; 508 - case 120: 509 - dev_info(&sock_info->dev->dev, "setting Vpp to 12.0\n"); 510 - reg |= I365_VPP1_12V | I365_VPP2_12V; 511 - break; 512 - default: 513 - dev_err(&sock_info->dev->dev, 514 - "%s called with invalid VPP power value: %i", 515 - __func__, state->Vcc); 516 - return -EINVAL; 517 - } 518 - 519 - if (reg != indirect_read(sock, I365_POWER)) /* only write if changed */ 520 - indirect_write(sock, I365_POWER, reg); 521 - 522 - /* Enable specific interrupt events */ 523 - 524 - reg = 0x00; 525 - if (state->csc_mask & SS_DETECT) 526 - reg |= I365_CSC_DETECT; 527 - if (state->flags & SS_IOCARD) { 528 - if (state->csc_mask & SS_STSCHG) 529 - reg |= I365_CSC_STSCHG; 530 - } else { 531 - if (state->csc_mask & SS_BATDEAD) 532 - reg |= I365_CSC_BVD1; 533 - if (state->csc_mask & SS_BATWARN) 534 - reg |= I365_CSC_BVD2; 535 - if (state->csc_mask & SS_READY) 536 - reg |= I365_CSC_READY; 537 - 538 - } 539 - 540 - /* now write the value and clear the (probably bogus) pending stuff 541 - * by doing a dummy read 542 - */ 543 - 544 - indirect_write(sock, I365_CSCINT, reg); 545 - (void)indirect_read(sock, I365_CSC); 546 - 547 - return 0; 548 - } 549 - 550 - static int i82092aa_set_io_map(struct pcmcia_socket *socket, 551 - struct pccard_io_map *io) 552 - { 553 - struct socket_info *sock_info = container_of(socket, struct socket_info, 554 - socket); 555 - unsigned int sock = sock_info->number; 556 - unsigned char map, ioctl; 557 - 558 - map = io->map; 559 - 560 - /* Check error conditions */ 561 - if (map > 1) 562 - return -EINVAL; 563 - 564 - if ((io->start > 0xffff) || (io->stop > 0xffff) 565 - || (io->stop < io->start)) 566 - return -EINVAL; 567 - 568 - /* Turn off the window before changing anything */ 569 - if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 570 - indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 571 - 572 - /* write the new values */ 573 - indirect_write16(sock, I365_IO(map)+I365_W_START, io->start); 574 - indirect_write16(sock, I365_IO(map)+I365_W_STOP, io->stop); 575 - 576 - ioctl = indirect_read(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map); 577 - 578 - if (io->flags & (MAP_16BIT|MAP_AUTOSZ)) 579 - ioctl |= I365_IOCTL_16BIT(map); 580 - 581 - indirect_write(sock, I365_IOCTL, ioctl); 582 - 583 - /* Turn the window back on if needed */ 584 - if (io->flags & MAP_ACTIVE) 585 - indirect_setbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 586 - 587 - return 0; 588 - } 589 - 590 - static int i82092aa_set_mem_map(struct pcmcia_socket *socket, 591 - struct pccard_mem_map *mem) 592 - { 593 - struct socket_info *sock_info = container_of(socket, struct socket_info, 594 - socket); 595 - unsigned int sock = sock_info->number; 596 - struct pci_bus_region region; 597 - unsigned short base, i; 598 - unsigned char map; 599 - 600 - pcibios_resource_to_bus(sock_info->dev->bus, &region, mem->res); 601 - 602 - map = mem->map; 603 - if (map > 4) 604 - return -EINVAL; 605 - 606 - if ((mem->card_start > 0x3ffffff) || (region.start > region.end) || 607 - (mem->speed > 1000)) { 608 - dev_err(&sock_info->dev->dev, 609 - "invalid mem map for socket %i: %llx to %llx with a start of %x\n", 610 - sock, 611 - (unsigned long long)region.start, 612 - (unsigned long long)region.end, 613 - mem->card_start); 614 - return -EINVAL; 615 - } 616 - 617 - /* Turn off the window before changing anything */ 618 - if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 619 - indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 620 - 621 - /* write the start address */ 622 - base = I365_MEM(map); 623 - i = (region.start >> 12) & 0x0fff; 624 - if (mem->flags & MAP_16BIT) 625 - i |= I365_MEM_16BIT; 626 - if (mem->flags & MAP_0WS) 627 - i |= I365_MEM_0WS; 628 - indirect_write16(sock, base+I365_W_START, i); 629 - 630 - /* write the stop address */ 631 - 632 - i = (region.end >> 12) & 0x0fff; 633 - switch (to_cycles(mem->speed)) { 634 - case 0: 635 - break; 636 - case 1: 637 - i |= I365_MEM_WS0; 638 - break; 639 - case 2: 640 - i |= I365_MEM_WS1; 641 - break; 642 - default: 643 - i |= I365_MEM_WS1 | I365_MEM_WS0; 644 - break; 645 - } 646 - 647 - indirect_write16(sock, base+I365_W_STOP, i); 648 - 649 - /* card start */ 650 - 651 - i = ((mem->card_start - region.start) >> 12) & 0x3fff; 652 - if (mem->flags & MAP_WRPROT) 653 - i |= I365_MEM_WRPROT; 654 - if (mem->flags & MAP_ATTRIB) 655 - i |= I365_MEM_REG; 656 - indirect_write16(sock, base+I365_W_OFF, i); 657 - 658 - /* Enable the window if necessary */ 659 - if (mem->flags & MAP_ACTIVE) 660 - indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 661 - 662 - return 0; 663 - } 664 - 665 - static int __init i82092aa_module_init(void) 666 - { 667 - return pci_register_driver(&i82092aa_pci_driver); 668 - } 669 - 670 - static void __exit i82092aa_module_exit(void) 671 - { 672 - pci_unregister_driver(&i82092aa_pci_driver); 673 - if (sockets[0].io_base > 0) 674 - release_region(sockets[0].io_base, 2); 675 - } 676 - 677 - module_init(i82092aa_module_init); 678 - module_exit(i82092aa_module_exit); 679 -

-24

drivers/pcmcia/i82092aa.h

··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef _INCLUDE_GUARD_i82092aa_H_ 3 - #define _INCLUDE_GUARD_i82092aa_H_ 4 - 5 - #include <linux/interrupt.h> 6 - 7 - /* prototypes */ 8 - 9 - static int i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id); 10 - static void i82092aa_pci_remove(struct pci_dev *dev); 11 - static int card_present(int socketno); 12 - static irqreturn_t i82092aa_interrupt(int irq, void *dev); 13 - 14 - 15 - 16 - 17 - static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value); 18 - static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state); 19 - static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io); 20 - static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem); 21 - static int i82092aa_init(struct pcmcia_socket *socket); 22 - 23 - #endif 24 -

-1347

drivers/pcmcia/i82365.c

··· 1 - /*====================================================================== 2 - 3 - Device driver for Intel 82365 and compatible PC Card controllers. 4 - 5 - i82365.c 1.265 1999/11/10 18:36:21 6 - 7 - The contents of this file are subject to the Mozilla Public 8 - License Version 1.1 (the "License"); you may not use this file 9 - except in compliance with the License. You may obtain a copy of 10 - the License at http://www.mozilla.org/MPL/ 11 - 12 - Software distributed under the License is distributed on an "AS 13 - IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or 14 - implied. See the License for the specific language governing 15 - rights and limitations under the License. 16 - 17 - The initial developer of the original code is David A. Hinds 18 - <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 19 - are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 20 - 21 - Alternatively, the contents of this file may be used under the 22 - terms of the GNU General Public License version 2 (the "GPL"), in which 23 - case the provisions of the GPL are applicable instead of the 24 - above. If you wish to allow the use of your version of this file 25 - only under the terms of the GPL and not to allow others to use 26 - your version of this file under the MPL, indicate your decision 27 - by deleting the provisions above and replace them with the notice 28 - and other provisions required by the GPL. If you do not delete 29 - the provisions above, a recipient may use your version of this 30 - file under either the MPL or the GPL. 31 - 32 - ======================================================================*/ 33 - 34 - #include <linux/module.h> 35 - #include <linux/moduleparam.h> 36 - #include <linux/init.h> 37 - #include <linux/types.h> 38 - #include <linux/fcntl.h> 39 - #include <linux/string.h> 40 - #include <linux/kernel.h> 41 - #include <linux/errno.h> 42 - #include <linux/timer.h> 43 - #include <linux/ioport.h> 44 - #include <linux/delay.h> 45 - #include <linux/workqueue.h> 46 - #include <linux/interrupt.h> 47 - #include <linux/platform_device.h> 48 - #include <linux/bitops.h> 49 - #include <asm/irq.h> 50 - #include <asm/io.h> 51 - 52 - #include <pcmcia/ss.h> 53 - 54 - #include <linux/isapnp.h> 55 - 56 - /* ISA-bus controllers */ 57 - #include "i82365.h" 58 - #include "cirrus.h" 59 - #include "vg468.h" 60 - #include "ricoh.h" 61 - 62 - 63 - static irqreturn_t i365_count_irq(int, void *); 64 - static inline int _check_irq(int irq, int flags) 65 - { 66 - if (request_irq(irq, i365_count_irq, flags, "x", i365_count_irq) != 0) 67 - return -1; 68 - free_irq(irq, i365_count_irq); 69 - return 0; 70 - } 71 - 72 - /*====================================================================*/ 73 - 74 - /* Parameters that can be set with 'insmod' */ 75 - 76 - /* Default base address for i82365sl and other ISA chips */ 77 - static unsigned long i365_base = 0x3e0; 78 - /* Should we probe at 0x3e2 for an extra ISA controller? */ 79 - static int extra_sockets = 0; 80 - /* Specify a socket number to ignore */ 81 - static int ignore = -1; 82 - /* Bit map or list of interrupts to choose from */ 83 - static u_int irq_mask = 0xffff; 84 - static int irq_list[16]; 85 - static unsigned int irq_list_count; 86 - /* The card status change interrupt -- 0 means autoselect */ 87 - static int cs_irq = 0; 88 - 89 - /* Probe for safe interrupts? */ 90 - static int do_scan = 1; 91 - /* Poll status interval -- 0 means default to interrupt */ 92 - static int poll_interval = 0; 93 - /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 94 - static int cycle_time = 120; 95 - 96 - /* Cirrus options */ 97 - static int has_dma = -1; 98 - static int has_led = -1; 99 - static int has_ring = -1; 100 - static int dynamic_mode = 0; 101 - static int freq_bypass = -1; 102 - static int setup_time = -1; 103 - static int cmd_time = -1; 104 - static int recov_time = -1; 105 - 106 - /* Vadem options */ 107 - static int async_clock = -1; 108 - static int cable_mode = -1; 109 - static int wakeup = 0; 110 - 111 - module_param_hw(i365_base, ulong, ioport, 0444); 112 - module_param(ignore, int, 0444); 113 - module_param(extra_sockets, int, 0444); 114 - module_param_hw(irq_mask, int, other, 0444); 115 - module_param_hw_array(irq_list, int, irq, &irq_list_count, 0444); 116 - module_param_hw(cs_irq, int, irq, 0444); 117 - module_param(async_clock, int, 0444); 118 - module_param(cable_mode, int, 0444); 119 - module_param(wakeup, int, 0444); 120 - 121 - module_param(do_scan, int, 0444); 122 - module_param(poll_interval, int, 0444); 123 - module_param(cycle_time, int, 0444); 124 - module_param(has_dma, int, 0444); 125 - module_param(has_led, int, 0444); 126 - module_param(has_ring, int, 0444); 127 - module_param(dynamic_mode, int, 0444); 128 - module_param(freq_bypass, int, 0444); 129 - module_param(setup_time, int, 0444); 130 - module_param(cmd_time, int, 0444); 131 - module_param(recov_time, int, 0444); 132 - 133 - /*====================================================================*/ 134 - 135 - struct cirrus_state { 136 - u_char misc1, misc2; 137 - u_char timer[6]; 138 - }; 139 - 140 - struct vg46x_state { 141 - u_char ctl, ema; 142 - }; 143 - 144 - struct i82365_socket { 145 - u_short type, flags; 146 - struct pcmcia_socket socket; 147 - unsigned int number; 148 - unsigned int ioaddr; 149 - u_short psock; 150 - u_char cs_irq, intr; 151 - union { 152 - struct cirrus_state cirrus; 153 - struct vg46x_state vg46x; 154 - } state; 155 - }; 156 - 157 - /* Where we keep track of our sockets... */ 158 - static int sockets = 0; 159 - static struct i82365_socket socket[8] = { 160 - { 0, }, /* ... */ 161 - }; 162 - 163 - /* Default ISA interrupt mask */ 164 - #define I365_MASK 0xdeb8 /* irq 15,14,12,11,10,9,7,5,4,3 */ 165 - 166 - static int grab_irq; 167 - static DEFINE_SPINLOCK(isa_lock); 168 - #define ISA_LOCK(n, f) spin_lock_irqsave(&isa_lock, f) 169 - #define ISA_UNLOCK(n, f) spin_unlock_irqrestore(&isa_lock, f) 170 - 171 - static struct timer_list poll_timer; 172 - 173 - /*====================================================================*/ 174 - 175 - /* These definitions must match the pcic table! */ 176 - enum pcic_id { 177 - IS_I82365A, IS_I82365B, IS_I82365DF, 178 - IS_IBM, IS_RF5Cx96, IS_VLSI, IS_VG468, IS_VG469, 179 - IS_PD6710, IS_PD672X, IS_VT83C469, 180 - }; 181 - 182 - /* Flags for classifying groups of controllers */ 183 - #define IS_VADEM 0x0001 184 - #define IS_CIRRUS 0x0002 185 - #define IS_VIA 0x0010 186 - #define IS_UNKNOWN 0x0400 187 - #define IS_VG_PWR 0x0800 188 - #define IS_DF_PWR 0x1000 189 - #define IS_REGISTERED 0x2000 190 - #define IS_ALIVE 0x8000 191 - 192 - struct pcic { 193 - char *name; 194 - u_short flags; 195 - }; 196 - 197 - static struct pcic pcic[] = { 198 - { "Intel i82365sl A step", 0 }, 199 - { "Intel i82365sl B step", 0 }, 200 - { "Intel i82365sl DF", IS_DF_PWR }, 201 - { "IBM Clone", 0 }, 202 - { "Ricoh RF5C296/396", 0 }, 203 - { "VLSI 82C146", 0 }, 204 - { "Vadem VG-468", IS_VADEM }, 205 - { "Vadem VG-469", IS_VADEM|IS_VG_PWR }, 206 - { "Cirrus PD6710", IS_CIRRUS }, 207 - { "Cirrus PD672x", IS_CIRRUS }, 208 - { "VIA VT83C469", IS_CIRRUS|IS_VIA }, 209 - }; 210 - 211 - #define PCIC_COUNT ARRAY_SIZE(pcic) 212 - 213 - /*====================================================================*/ 214 - 215 - static DEFINE_SPINLOCK(bus_lock); 216 - 217 - static u_char i365_get(u_short sock, u_short reg) 218 - { 219 - unsigned long flags; 220 - spin_lock_irqsave(&bus_lock,flags); 221 - { 222 - unsigned int port = socket[sock].ioaddr; 223 - u_char val; 224 - reg = I365_REG(socket[sock].psock, reg); 225 - outb(reg, port); val = inb(port+1); 226 - spin_unlock_irqrestore(&bus_lock,flags); 227 - return val; 228 - } 229 - } 230 - 231 - static void i365_set(u_short sock, u_short reg, u_char data) 232 - { 233 - unsigned long flags; 234 - spin_lock_irqsave(&bus_lock,flags); 235 - { 236 - unsigned int port = socket[sock].ioaddr; 237 - u_char val = I365_REG(socket[sock].psock, reg); 238 - outb(val, port); outb(data, port+1); 239 - spin_unlock_irqrestore(&bus_lock,flags); 240 - } 241 - } 242 - 243 - static void i365_bset(u_short sock, u_short reg, u_char mask) 244 - { 245 - u_char d = i365_get(sock, reg); 246 - d |= mask; 247 - i365_set(sock, reg, d); 248 - } 249 - 250 - static void i365_bclr(u_short sock, u_short reg, u_char mask) 251 - { 252 - u_char d = i365_get(sock, reg); 253 - d &= ~mask; 254 - i365_set(sock, reg, d); 255 - } 256 - 257 - static void i365_bflip(u_short sock, u_short reg, u_char mask, int b) 258 - { 259 - u_char d = i365_get(sock, reg); 260 - if (b) 261 - d |= mask; 262 - else 263 - d &= ~mask; 264 - i365_set(sock, reg, d); 265 - } 266 - 267 - static u_short i365_get_pair(u_short sock, u_short reg) 268 - { 269 - u_short a, b; 270 - a = i365_get(sock, reg); 271 - b = i365_get(sock, reg+1); 272 - return (a + (b<<8)); 273 - } 274 - 275 - static void i365_set_pair(u_short sock, u_short reg, u_short data) 276 - { 277 - i365_set(sock, reg, data & 0xff); 278 - i365_set(sock, reg+1, data >> 8); 279 - } 280 - 281 - /*====================================================================== 282 - 283 - Code to save and restore global state information for Cirrus 284 - PD67xx controllers, and to set and report global configuration 285 - options. 286 - 287 - The VIA controllers also use these routines, as they are mostly 288 - Cirrus lookalikes, without the timing registers. 289 - 290 - ======================================================================*/ 291 - 292 - #define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b)))) 293 - 294 - static void cirrus_get_state(u_short s) 295 - { 296 - int i; 297 - struct cirrus_state *p = &socket[s].state.cirrus; 298 - p->misc1 = i365_get(s, PD67_MISC_CTL_1); 299 - p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); 300 - p->misc2 = i365_get(s, PD67_MISC_CTL_2); 301 - for (i = 0; i < 6; i++) 302 - p->timer[i] = i365_get(s, PD67_TIME_SETUP(0)+i); 303 - } 304 - 305 - static void cirrus_set_state(u_short s) 306 - { 307 - int i; 308 - u_char misc; 309 - struct cirrus_state *p = &socket[s].state.cirrus; 310 - 311 - misc = i365_get(s, PD67_MISC_CTL_2); 312 - i365_set(s, PD67_MISC_CTL_2, p->misc2); 313 - if (misc & PD67_MC2_SUSPEND) mdelay(50); 314 - misc = i365_get(s, PD67_MISC_CTL_1); 315 - misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); 316 - i365_set(s, PD67_MISC_CTL_1, misc | p->misc1); 317 - for (i = 0; i < 6; i++) 318 - i365_set(s, PD67_TIME_SETUP(0)+i, p->timer[i]); 319 - } 320 - 321 - static u_int __init cirrus_set_opts(u_short s, char *buf) 322 - { 323 - struct i82365_socket *t = &socket[s]; 324 - struct cirrus_state *p = &socket[s].state.cirrus; 325 - u_int mask = 0xffff; 326 - 327 - if (has_ring == -1) has_ring = 1; 328 - flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring); 329 - flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode); 330 - flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass); 331 - if (p->misc2 & PD67_MC2_IRQ15_RI) 332 - strcat(buf, " [ring]"); 333 - if (p->misc2 & PD67_MC2_DYNAMIC_MODE) 334 - strcat(buf, " [dyn mode]"); 335 - if (p->misc2 & PD67_MC2_FREQ_BYPASS) 336 - strcat(buf, " [freq bypass]"); 337 - if (p->misc1 & PD67_MC1_INPACK_ENA) 338 - strcat(buf, " [inpack]"); 339 - if (p->misc2 & PD67_MC2_IRQ15_RI) 340 - mask &= ~0x8000; 341 - if (has_led > 0) { 342 - strcat(buf, " [led]"); 343 - mask &= ~0x1000; 344 - } 345 - if (has_dma > 0) { 346 - strcat(buf, " [dma]"); 347 - mask &= ~0x0600; 348 - } 349 - if (!(t->flags & IS_VIA)) { 350 - if (setup_time >= 0) 351 - p->timer[0] = p->timer[3] = setup_time; 352 - if (cmd_time > 0) { 353 - p->timer[1] = cmd_time; 354 - p->timer[4] = cmd_time*2+4; 355 - } 356 - if (p->timer[1] == 0) { 357 - p->timer[1] = 6; p->timer[4] = 16; 358 - if (p->timer[0] == 0) 359 - p->timer[0] = p->timer[3] = 1; 360 - } 361 - if (recov_time >= 0) 362 - p->timer[2] = p->timer[5] = recov_time; 363 - buf += strlen(buf); 364 - sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1], 365 - p->timer[2], p->timer[3], p->timer[4], p->timer[5]); 366 - } 367 - return mask; 368 - } 369 - 370 - /*====================================================================== 371 - 372 - Code to save and restore global state information for Vadem VG468 373 - and VG469 controllers, and to set and report global configuration 374 - options. 375 - 376 - ======================================================================*/ 377 - 378 - static void vg46x_get_state(u_short s) 379 - { 380 - struct vg46x_state *p = &socket[s].state.vg46x; 381 - p->ctl = i365_get(s, VG468_CTL); 382 - if (socket[s].type == IS_VG469) 383 - p->ema = i365_get(s, VG469_EXT_MODE); 384 - } 385 - 386 - static void vg46x_set_state(u_short s) 387 - { 388 - struct vg46x_state *p = &socket[s].state.vg46x; 389 - i365_set(s, VG468_CTL, p->ctl); 390 - if (socket[s].type == IS_VG469) 391 - i365_set(s, VG469_EXT_MODE, p->ema); 392 - } 393 - 394 - static u_int __init vg46x_set_opts(u_short s, char *buf) 395 - { 396 - struct vg46x_state *p = &socket[s].state.vg46x; 397 - 398 - flip(p->ctl, VG468_CTL_ASYNC, async_clock); 399 - flip(p->ema, VG469_MODE_CABLE, cable_mode); 400 - if (p->ctl & VG468_CTL_ASYNC) 401 - strcat(buf, " [async]"); 402 - if (p->ctl & VG468_CTL_INPACK) 403 - strcat(buf, " [inpack]"); 404 - if (socket[s].type == IS_VG469) { 405 - u_char vsel = i365_get(s, VG469_VSELECT); 406 - if (vsel & VG469_VSEL_EXT_STAT) { 407 - strcat(buf, " [ext mode]"); 408 - if (vsel & VG469_VSEL_EXT_BUS) 409 - strcat(buf, " [isa buf]"); 410 - } 411 - if (p->ema & VG469_MODE_CABLE) 412 - strcat(buf, " [cable]"); 413 - if (p->ema & VG469_MODE_COMPAT) 414 - strcat(buf, " [c step]"); 415 - } 416 - return 0xffff; 417 - } 418 - 419 - /*====================================================================== 420 - 421 - Generic routines to get and set controller options 422 - 423 - ======================================================================*/ 424 - 425 - static void get_bridge_state(u_short s) 426 - { 427 - struct i82365_socket *t = &socket[s]; 428 - if (t->flags & IS_CIRRUS) 429 - cirrus_get_state(s); 430 - else if (t->flags & IS_VADEM) 431 - vg46x_get_state(s); 432 - } 433 - 434 - static void set_bridge_state(u_short s) 435 - { 436 - struct i82365_socket *t = &socket[s]; 437 - if (t->flags & IS_CIRRUS) 438 - cirrus_set_state(s); 439 - else { 440 - i365_set(s, I365_GBLCTL, 0x00); 441 - i365_set(s, I365_GENCTL, 0x00); 442 - } 443 - i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr); 444 - if (t->flags & IS_VADEM) 445 - vg46x_set_state(s); 446 - } 447 - 448 - static u_int __init set_bridge_opts(u_short s, u_short ns) 449 - { 450 - u_short i; 451 - u_int m = 0xffff; 452 - char buf[128]; 453 - 454 - for (i = s; i < s+ns; i++) { 455 - if (socket[i].flags & IS_ALIVE) { 456 - printk(KERN_INFO " host opts [%d]: already alive!\n", i); 457 - continue; 458 - } 459 - buf[0] = '\0'; 460 - get_bridge_state(i); 461 - if (socket[i].flags & IS_CIRRUS) 462 - m = cirrus_set_opts(i, buf); 463 - else if (socket[i].flags & IS_VADEM) 464 - m = vg46x_set_opts(i, buf); 465 - set_bridge_state(i); 466 - printk(KERN_INFO " host opts [%d]:%s\n", i, 467 - (*buf) ? buf : " none"); 468 - } 469 - return m; 470 - } 471 - 472 - /*====================================================================== 473 - 474 - Interrupt testing code, for ISA and PCI interrupts 475 - 476 - ======================================================================*/ 477 - 478 - static volatile u_int irq_hits; 479 - static u_short irq_sock; 480 - 481 - static irqreturn_t i365_count_irq(int irq, void *dev) 482 - { 483 - i365_get(irq_sock, I365_CSC); 484 - irq_hits++; 485 - pr_debug("i82365: -> hit on irq %d\n", irq); 486 - return IRQ_HANDLED; 487 - } 488 - 489 - static u_int __init test_irq(u_short sock, int irq) 490 - { 491 - pr_debug("i82365: testing ISA irq %d\n", irq); 492 - if (request_irq(irq, i365_count_irq, IRQF_PROBE_SHARED, "scan", 493 - i365_count_irq) != 0) 494 - return 1; 495 - irq_hits = 0; irq_sock = sock; 496 - msleep(10); 497 - if (irq_hits) { 498 - free_irq(irq, i365_count_irq); 499 - pr_debug("i82365: spurious hit!\n"); 500 - return 1; 501 - } 502 - 503 - /* Generate one interrupt */ 504 - i365_set(sock, I365_CSCINT, I365_CSC_DETECT | (irq << 4)); 505 - i365_bset(sock, I365_GENCTL, I365_CTL_SW_IRQ); 506 - udelay(1000); 507 - 508 - free_irq(irq, i365_count_irq); 509 - 510 - /* mask all interrupts */ 511 - i365_set(sock, I365_CSCINT, 0); 512 - pr_debug("i82365: hits = %d\n", irq_hits); 513 - 514 - return (irq_hits != 1); 515 - } 516 - 517 - static u_int __init isa_scan(u_short sock, u_int mask0) 518 - { 519 - u_int mask1 = 0; 520 - int i; 521 - 522 - #ifdef __alpha__ 523 - #define PIC 0x4d0 524 - /* Don't probe level-triggered interrupts -- reserved for PCI */ 525 - mask0 &= ~(inb(PIC) | (inb(PIC+1) << 8)); 526 - #endif 527 - 528 - if (do_scan) { 529 - set_bridge_state(sock); 530 - i365_set(sock, I365_CSCINT, 0); 531 - for (i = 0; i < 16; i++) 532 - if ((mask0 & (1 << i)) && (test_irq(sock, i) == 0)) 533 - mask1 |= (1 << i); 534 - for (i = 0; i < 16; i++) 535 - if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0)) 536 - mask1 ^= (1 << i); 537 - } 538 - 539 - printk(KERN_INFO " ISA irqs ("); 540 - if (mask1) { 541 - printk("scanned"); 542 - } else { 543 - /* Fallback: just find interrupts that aren't in use */ 544 - for (i = 0; i < 16; i++) 545 - if ((mask0 & (1 << i)) && (_check_irq(i, IRQF_PROBE_SHARED) == 0)) 546 - mask1 |= (1 << i); 547 - printk("default"); 548 - /* If scan failed, default to polled status */ 549 - if (!cs_irq && (poll_interval == 0)) poll_interval = HZ; 550 - } 551 - printk(") = "); 552 - 553 - for (i = 0; i < 16; i++) 554 - if (mask1 & (1<<i)) 555 - printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i); 556 - if (mask1 == 0) printk("none!"); 557 - 558 - return mask1; 559 - } 560 - 561 - /*====================================================================*/ 562 - 563 - /* Time conversion functions */ 564 - 565 - static int to_cycles(int ns) 566 - { 567 - return ns/cycle_time; 568 - } 569 - 570 - /*====================================================================*/ 571 - 572 - static int __init identify(unsigned int port, u_short sock) 573 - { 574 - u_char val; 575 - int type = -1; 576 - 577 - /* Use the next free entry in the socket table */ 578 - socket[sockets].ioaddr = port; 579 - socket[sockets].psock = sock; 580 - 581 - /* Wake up a sleepy Cirrus controller */ 582 - if (wakeup) { 583 - i365_bclr(sockets, PD67_MISC_CTL_2, PD67_MC2_SUSPEND); 584 - /* Pause at least 50 ms */ 585 - mdelay(50); 586 - } 587 - 588 - if ((val = i365_get(sockets, I365_IDENT)) & 0x70) 589 - return -1; 590 - switch (val) { 591 - case 0x82: 592 - type = IS_I82365A; break; 593 - case 0x83: 594 - type = IS_I82365B; break; 595 - case 0x84: 596 - type = IS_I82365DF; break; 597 - case 0x88: case 0x89: case 0x8a: 598 - type = IS_IBM; break; 599 - } 600 - 601 - /* Check for Vadem VG-468 chips */ 602 - outb(0x0e, port); 603 - outb(0x37, port); 604 - i365_bset(sockets, VG468_MISC, VG468_MISC_VADEMREV); 605 - val = i365_get(sockets, I365_IDENT); 606 - if (val & I365_IDENT_VADEM) { 607 - i365_bclr(sockets, VG468_MISC, VG468_MISC_VADEMREV); 608 - type = ((val & 7) >= 4) ? IS_VG469 : IS_VG468; 609 - } 610 - 611 - /* Check for Ricoh chips */ 612 - val = i365_get(sockets, RF5C_CHIP_ID); 613 - if ((val == RF5C_CHIP_RF5C296) || (val == RF5C_CHIP_RF5C396)) 614 - type = IS_RF5Cx96; 615 - 616 - /* Check for Cirrus CL-PD67xx chips */ 617 - i365_set(sockets, PD67_CHIP_INFO, 0); 618 - val = i365_get(sockets, PD67_CHIP_INFO); 619 - if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) { 620 - val = i365_get(sockets, PD67_CHIP_INFO); 621 - if ((val & PD67_INFO_CHIP_ID) == 0) { 622 - type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710; 623 - i365_set(sockets, PD67_EXT_INDEX, 0xe5); 624 - if (i365_get(sockets, PD67_EXT_INDEX) != 0xe5) 625 - type = IS_VT83C469; 626 - } 627 - } 628 - return type; 629 - } /* identify */ 630 - 631 - /*====================================================================== 632 - 633 - See if a card is present, powered up, in IO mode, and already 634 - bound to a (non PC Card) Linux driver. We leave these alone. 635 - 636 - We make an exception for cards that seem to be serial devices. 637 - 638 - ======================================================================*/ 639 - 640 - static int __init is_alive(u_short sock) 641 - { 642 - u_char stat; 643 - unsigned int start, stop; 644 - 645 - stat = i365_get(sock, I365_STATUS); 646 - start = i365_get_pair(sock, I365_IO(0)+I365_W_START); 647 - stop = i365_get_pair(sock, I365_IO(0)+I365_W_STOP); 648 - if ((stat & I365_CS_DETECT) && (stat & I365_CS_POWERON) && 649 - (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) && 650 - (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(0)) && 651 - ((start & 0xfeef) != 0x02e8)) { 652 - if (!request_region(start, stop-start+1, "i82365")) 653 - return 1; 654 - release_region(start, stop-start+1); 655 - } 656 - 657 - return 0; 658 - } 659 - 660 - /*====================================================================*/ 661 - 662 - static void __init add_socket(unsigned int port, int psock, int type) 663 - { 664 - socket[sockets].ioaddr = port; 665 - socket[sockets].psock = psock; 666 - socket[sockets].type = type; 667 - socket[sockets].flags = pcic[type].flags; 668 - if (is_alive(sockets)) 669 - socket[sockets].flags |= IS_ALIVE; 670 - sockets++; 671 - } 672 - 673 - static void __init add_pcic(int ns, int type) 674 - { 675 - u_int mask = 0, i, base; 676 - int isa_irq = 0; 677 - struct i82365_socket *t = &socket[sockets-ns]; 678 - 679 - base = sockets-ns; 680 - if (base == 0) printk("\n"); 681 - printk(KERN_INFO " %s", pcic[type].name); 682 - printk(" ISA-to-PCMCIA at port %#x ofs 0x%02x", 683 - t->ioaddr, t->psock*0x40); 684 - printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : "")); 685 - 686 - /* Set host options, build basic interrupt mask */ 687 - if (irq_list_count == 0) 688 - mask = irq_mask; 689 - else 690 - for (i = mask = 0; i < irq_list_count; i++) 691 - mask |= (1<<irq_list[i]); 692 - mask &= I365_MASK & set_bridge_opts(base, ns); 693 - /* Scan for ISA interrupts */ 694 - mask = isa_scan(base, mask); 695 - 696 - /* Poll if only two interrupts available */ 697 - if (!poll_interval) { 698 - u_int tmp = (mask & 0xff20); 699 - tmp = tmp & (tmp-1); 700 - if ((tmp & (tmp-1)) == 0) 701 - poll_interval = HZ; 702 - } 703 - /* Only try an ISA cs_irq if this is the first controller */ 704 - if (!grab_irq && (cs_irq || !poll_interval)) { 705 - /* Avoid irq 12 unless it is explicitly requested */ 706 - u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12)); 707 - for (cs_irq = 15; cs_irq > 0; cs_irq--) 708 - if ((cs_mask & (1 << cs_irq)) && 709 - (_check_irq(cs_irq, IRQF_PROBE_SHARED) == 0)) 710 - break; 711 - if (cs_irq) { 712 - grab_irq = 1; 713 - isa_irq = cs_irq; 714 - printk(" status change on irq %d\n", cs_irq); 715 - } 716 - } 717 - 718 - if (!isa_irq) { 719 - if (poll_interval == 0) 720 - poll_interval = HZ; 721 - printk(" polling interval = %d ms\n", 722 - poll_interval * 1000 / HZ); 723 - 724 - } 725 - 726 - /* Update socket interrupt information, capabilities */ 727 - for (i = 0; i < ns; i++) { 728 - t[i].socket.features |= SS_CAP_PCCARD; 729 - t[i].socket.map_size = 0x1000; 730 - t[i].socket.irq_mask = mask; 731 - t[i].cs_irq = isa_irq; 732 - } 733 - 734 - } /* add_pcic */ 735 - 736 - /*====================================================================*/ 737 - 738 - #ifdef CONFIG_PNP 739 - static struct isapnp_device_id id_table[] __initdata = { 740 - { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), 741 - ISAPNP_FUNCTION(0x0e00), (unsigned long) "Intel 82365-Compatible" }, 742 - { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), 743 - ISAPNP_FUNCTION(0x0e01), (unsigned long) "Cirrus Logic CL-PD6720" }, 744 - { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), 745 - ISAPNP_FUNCTION(0x0e02), (unsigned long) "VLSI VL82C146" }, 746 - { 0 } 747 - }; 748 - MODULE_DEVICE_TABLE(isapnp, id_table); 749 - 750 - static struct pnp_dev *i82365_pnpdev; 751 - #endif 752 - 753 - static void __init isa_probe(void) 754 - { 755 - int i, j, sock, k, ns, id; 756 - unsigned int port; 757 - #ifdef CONFIG_PNP 758 - struct isapnp_device_id *devid; 759 - struct pnp_dev *dev; 760 - 761 - for (devid = id_table; devid->vendor; devid++) { 762 - if ((dev = pnp_find_dev(NULL, devid->vendor, devid->function, NULL))) { 763 - 764 - if (pnp_device_attach(dev) < 0) 765 - continue; 766 - 767 - if (pnp_activate_dev(dev) < 0) { 768 - printk("activate failed\n"); 769 - pnp_device_detach(dev); 770 - break; 771 - } 772 - 773 - if (!pnp_port_valid(dev, 0)) { 774 - printk("invalid resources ?\n"); 775 - pnp_device_detach(dev); 776 - break; 777 - } 778 - i365_base = pnp_port_start(dev, 0); 779 - i82365_pnpdev = dev; 780 - break; 781 - } 782 - } 783 - #endif 784 - 785 - if (!request_region(i365_base, 2, "i82365")) { 786 - if (sockets == 0) 787 - printk("port conflict at %#lx\n", i365_base); 788 - return; 789 - } 790 - 791 - id = identify(i365_base, 0); 792 - if ((id == IS_I82365DF) && (identify(i365_base, 1) != id)) { 793 - for (i = 0; i < 4; i++) { 794 - if (i == ignore) continue; 795 - port = i365_base + ((i & 1) << 2) + ((i & 2) << 1); 796 - sock = (i & 1) << 1; 797 - if (identify(port, sock) == IS_I82365DF) { 798 - add_socket(port, sock, IS_VLSI); 799 - add_pcic(1, IS_VLSI); 800 - } 801 - } 802 - } else { 803 - for (i = 0; i < 8; i += 2) { 804 - if (sockets && !extra_sockets && (i == 4)) 805 - break; 806 - port = i365_base + 2*(i>>2); 807 - sock = (i & 3); 808 - id = identify(port, sock); 809 - if (id < 0) continue; 810 - 811 - for (j = ns = 0; j < 2; j++) { 812 - /* Does the socket exist? */ 813 - if ((ignore == i+j) || (identify(port, sock+j) < 0)) 814 - continue; 815 - /* Check for bad socket decode */ 816 - for (k = 0; k <= sockets; k++) 817 - i365_set(k, I365_MEM(0)+I365_W_OFF, k); 818 - for (k = 0; k <= sockets; k++) 819 - if (i365_get(k, I365_MEM(0)+I365_W_OFF) != k) 820 - break; 821 - if (k <= sockets) break; 822 - add_socket(port, sock+j, id); ns++; 823 - } 824 - if (ns != 0) add_pcic(ns, id); 825 - } 826 - } 827 - } 828 - 829 - /*====================================================================*/ 830 - 831 - static irqreturn_t pcic_interrupt(int irq, void *dev) 832 - { 833 - int i, j, csc; 834 - u_int events, active; 835 - u_long flags = 0; 836 - int handled = 0; 837 - 838 - pr_debug("pcic_interrupt(%d)\n", irq); 839 - 840 - for (j = 0; j < 20; j++) { 841 - active = 0; 842 - for (i = 0; i < sockets; i++) { 843 - if (socket[i].cs_irq != irq) 844 - continue; 845 - handled = 1; 846 - ISA_LOCK(i, flags); 847 - csc = i365_get(i, I365_CSC); 848 - if ((csc == 0) || (i365_get(i, I365_IDENT) & 0x70)) { 849 - ISA_UNLOCK(i, flags); 850 - continue; 851 - } 852 - events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0; 853 - 854 - if (i365_get(i, I365_INTCTL) & I365_PC_IOCARD) 855 - events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 856 - else { 857 - events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 858 - events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 859 - events |= (csc & I365_CSC_READY) ? SS_READY : 0; 860 - } 861 - ISA_UNLOCK(i, flags); 862 - pr_debug("socket %d event 0x%02x\n", i, events); 863 - 864 - if (events) 865 - pcmcia_parse_events(&socket[i].socket, events); 866 - 867 - active |= events; 868 - } 869 - if (!active) break; 870 - } 871 - if (j == 20) 872 - printk(KERN_NOTICE "i82365: infinite loop in interrupt handler\n"); 873 - 874 - pr_debug("pcic_interrupt done\n"); 875 - return IRQ_RETVAL(handled); 876 - } /* pcic_interrupt */ 877 - 878 - static void pcic_interrupt_wrapper(struct timer_list *unused) 879 - { 880 - pcic_interrupt(0, NULL); 881 - poll_timer.expires = jiffies + poll_interval; 882 - add_timer(&poll_timer); 883 - } 884 - 885 - /*====================================================================*/ 886 - 887 - static int i365_get_status(u_short sock, u_int *value) 888 - { 889 - u_int status; 890 - 891 - status = i365_get(sock, I365_STATUS); 892 - *value = ((status & I365_CS_DETECT) == I365_CS_DETECT) 893 - ? SS_DETECT : 0; 894 - 895 - if (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) 896 - *value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; 897 - else { 898 - *value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; 899 - *value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; 900 - } 901 - *value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; 902 - *value |= (status & I365_CS_READY) ? SS_READY : 0; 903 - *value |= (status & I365_CS_POWERON) ? SS_POWERON : 0; 904 - 905 - if (socket[sock].type == IS_VG469) { 906 - status = i365_get(sock, VG469_VSENSE); 907 - if (socket[sock].psock & 1) { 908 - *value |= (status & VG469_VSENSE_B_VS1) ? 0 : SS_3VCARD; 909 - *value |= (status & VG469_VSENSE_B_VS2) ? 0 : SS_XVCARD; 910 - } else { 911 - *value |= (status & VG469_VSENSE_A_VS1) ? 0 : SS_3VCARD; 912 - *value |= (status & VG469_VSENSE_A_VS2) ? 0 : SS_XVCARD; 913 - } 914 - } 915 - 916 - pr_debug("GetStatus(%d) = %#4.4x\n", sock, *value); 917 - return 0; 918 - } /* i365_get_status */ 919 - 920 - /*====================================================================*/ 921 - 922 - static int i365_set_socket(u_short sock, socket_state_t *state) 923 - { 924 - struct i82365_socket *t = &socket[sock]; 925 - u_char reg; 926 - 927 - pr_debug("SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " 928 - "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags, 929 - state->Vcc, state->Vpp, state->io_irq, state->csc_mask); 930 - 931 - /* First set global controller options */ 932 - set_bridge_state(sock); 933 - 934 - /* IO card, RESET flag, IO interrupt */ 935 - reg = t->intr; 936 - reg |= state->io_irq; 937 - reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; 938 - reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; 939 - i365_set(sock, I365_INTCTL, reg); 940 - 941 - reg = I365_PWR_NORESET; 942 - if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO; 943 - if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT; 944 - 945 - if (t->flags & IS_CIRRUS) { 946 - if (state->Vpp != 0) { 947 - if (state->Vpp == 120) 948 - reg |= I365_VPP1_12V; 949 - else if (state->Vpp == state->Vcc) 950 - reg |= I365_VPP1_5V; 951 - else return -EINVAL; 952 - } 953 - if (state->Vcc != 0) { 954 - reg |= I365_VCC_5V; 955 - if (state->Vcc == 33) 956 - i365_bset(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); 957 - else if (state->Vcc == 50) 958 - i365_bclr(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); 959 - else return -EINVAL; 960 - } 961 - } else if (t->flags & IS_VG_PWR) { 962 - if (state->Vpp != 0) { 963 - if (state->Vpp == 120) 964 - reg |= I365_VPP1_12V; 965 - else if (state->Vpp == state->Vcc) 966 - reg |= I365_VPP1_5V; 967 - else return -EINVAL; 968 - } 969 - if (state->Vcc != 0) { 970 - reg |= I365_VCC_5V; 971 - if (state->Vcc == 33) 972 - i365_bset(sock, VG469_VSELECT, VG469_VSEL_VCC); 973 - else if (state->Vcc == 50) 974 - i365_bclr(sock, VG469_VSELECT, VG469_VSEL_VCC); 975 - else return -EINVAL; 976 - } 977 - } else if (t->flags & IS_DF_PWR) { 978 - switch (state->Vcc) { 979 - case 0: break; 980 - case 33: reg |= I365_VCC_3V; break; 981 - case 50: reg |= I365_VCC_5V; break; 982 - default: return -EINVAL; 983 - } 984 - switch (state->Vpp) { 985 - case 0: break; 986 - case 50: reg |= I365_VPP1_5V; break; 987 - case 120: reg |= I365_VPP1_12V; break; 988 - default: return -EINVAL; 989 - } 990 - } else { 991 - switch (state->Vcc) { 992 - case 0: break; 993 - case 50: reg |= I365_VCC_5V; break; 994 - default: return -EINVAL; 995 - } 996 - switch (state->Vpp) { 997 - case 0: break; 998 - case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break; 999 - case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break; 1000 - default: return -EINVAL; 1001 - } 1002 - } 1003 - 1004 - if (reg != i365_get(sock, I365_POWER)) 1005 - i365_set(sock, I365_POWER, reg); 1006 - 1007 - /* Chipset-specific functions */ 1008 - if (t->flags & IS_CIRRUS) { 1009 - /* Speaker control */ 1010 - i365_bflip(sock, PD67_MISC_CTL_1, PD67_MC1_SPKR_ENA, 1011 - state->flags & SS_SPKR_ENA); 1012 - } 1013 - 1014 - /* Card status change interrupt mask */ 1015 - reg = t->cs_irq << 4; 1016 - if (state->csc_mask & SS_DETECT) reg |= I365_CSC_DETECT; 1017 - if (state->flags & SS_IOCARD) { 1018 - if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG; 1019 - } else { 1020 - if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1; 1021 - if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2; 1022 - if (state->csc_mask & SS_READY) reg |= I365_CSC_READY; 1023 - } 1024 - i365_set(sock, I365_CSCINT, reg); 1025 - i365_get(sock, I365_CSC); 1026 - 1027 - return 0; 1028 - } /* i365_set_socket */ 1029 - 1030 - /*====================================================================*/ 1031 - 1032 - static int i365_set_io_map(u_short sock, struct pccard_io_map *io) 1033 - { 1034 - u_char map, ioctl; 1035 - 1036 - pr_debug("SetIOMap(%d, %d, %#2.2x, %d ns, " 1037 - "%#llx-%#llx)\n", sock, io->map, io->flags, io->speed, 1038 - (unsigned long long)io->start, (unsigned long long)io->stop); 1039 - map = io->map; 1040 - if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || 1041 - (io->stop < io->start)) return -EINVAL; 1042 - /* Turn off the window before changing anything */ 1043 - if (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 1044 - i365_bclr(sock, I365_ADDRWIN, I365_ENA_IO(map)); 1045 - i365_set_pair(sock, I365_IO(map)+I365_W_START, io->start); 1046 - i365_set_pair(sock, I365_IO(map)+I365_W_STOP, io->stop); 1047 - ioctl = i365_get(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map); 1048 - if (io->speed) ioctl |= I365_IOCTL_WAIT(map); 1049 - if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); 1050 - if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); 1051 - if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); 1052 - i365_set(sock, I365_IOCTL, ioctl); 1053 - /* Turn on the window if necessary */ 1054 - if (io->flags & MAP_ACTIVE) 1055 - i365_bset(sock, I365_ADDRWIN, I365_ENA_IO(map)); 1056 - return 0; 1057 - } /* i365_set_io_map */ 1058 - 1059 - /*====================================================================*/ 1060 - 1061 - static int i365_set_mem_map(u_short sock, struct pccard_mem_map *mem) 1062 - { 1063 - u_short base, i; 1064 - u_char map; 1065 - 1066 - pr_debug("SetMemMap(%d, %d, %#2.2x, %d ns, %#llx-%#llx, " 1067 - "%#x)\n", sock, mem->map, mem->flags, mem->speed, 1068 - (unsigned long long)mem->res->start, 1069 - (unsigned long long)mem->res->end, mem->card_start); 1070 - 1071 - map = mem->map; 1072 - if ((map > 4) || (mem->card_start > 0x3ffffff) || 1073 - (mem->res->start > mem->res->end) || (mem->speed > 1000)) 1074 - return -EINVAL; 1075 - if ((mem->res->start > 0xffffff) || (mem->res->end > 0xffffff)) 1076 - return -EINVAL; 1077 - 1078 - /* Turn off the window before changing anything */ 1079 - if (i365_get(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 1080 - i365_bclr(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 1081 - 1082 - base = I365_MEM(map); 1083 - i = (mem->res->start >> 12) & 0x0fff; 1084 - if (mem->flags & MAP_16BIT) i |= I365_MEM_16BIT; 1085 - if (mem->flags & MAP_0WS) i |= I365_MEM_0WS; 1086 - i365_set_pair(sock, base+I365_W_START, i); 1087 - 1088 - i = (mem->res->end >> 12) & 0x0fff; 1089 - switch (to_cycles(mem->speed)) { 1090 - case 0: break; 1091 - case 1: i |= I365_MEM_WS0; break; 1092 - case 2: i |= I365_MEM_WS1; break; 1093 - default: i |= I365_MEM_WS1 | I365_MEM_WS0; break; 1094 - } 1095 - i365_set_pair(sock, base+I365_W_STOP, i); 1096 - 1097 - i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; 1098 - if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT; 1099 - if (mem->flags & MAP_ATTRIB) i |= I365_MEM_REG; 1100 - i365_set_pair(sock, base+I365_W_OFF, i); 1101 - 1102 - /* Turn on the window if necessary */ 1103 - if (mem->flags & MAP_ACTIVE) 1104 - i365_bset(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 1105 - return 0; 1106 - } /* i365_set_mem_map */ 1107 - 1108 - #if 0 /* driver model ordering issue */ 1109 - /*====================================================================== 1110 - 1111 - Routines for accessing socket information and register dumps via 1112 - /sys/class/pcmcia_socket/... 1113 - 1114 - ======================================================================*/ 1115 - 1116 - static ssize_t show_info(struct class_device *class_dev, char *buf) 1117 - { 1118 - struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev); 1119 - return sprintf(buf, "type: %s\npsock: %d\n", 1120 - pcic[s->type].name, s->psock); 1121 - } 1122 - 1123 - static ssize_t show_exca(struct class_device *class_dev, char *buf) 1124 - { 1125 - struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev); 1126 - unsigned short sock; 1127 - int i; 1128 - ssize_t ret = 0; 1129 - unsigned long flags = 0; 1130 - 1131 - sock = s->number; 1132 - 1133 - ISA_LOCK(sock, flags); 1134 - for (i = 0; i < 0x40; i += 4) { 1135 - ret += sprintf(buf, "%02x %02x %02x %02x%s", 1136 - i365_get(sock,i), i365_get(sock,i+1), 1137 - i365_get(sock,i+2), i365_get(sock,i+3), 1138 - ((i % 16) == 12) ? "\n" : " "); 1139 - buf += ret; 1140 - } 1141 - ISA_UNLOCK(sock, flags); 1142 - 1143 - return ret; 1144 - } 1145 - 1146 - static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL); 1147 - static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL); 1148 - #endif 1149 - 1150 - /*====================================================================*/ 1151 - 1152 - /* this is horribly ugly... proper locking needs to be done here at 1153 - * some time... */ 1154 - #define LOCKED(x) do { \ 1155 - int retval; \ 1156 - unsigned long flags; \ 1157 - spin_lock_irqsave(&isa_lock, flags); \ 1158 - retval = x; \ 1159 - spin_unlock_irqrestore(&isa_lock, flags); \ 1160 - return retval; \ 1161 - } while (0) 1162 - 1163 - 1164 - static int pcic_get_status(struct pcmcia_socket *s, u_int *value) 1165 - { 1166 - unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1167 - 1168 - if (socket[sock].flags & IS_ALIVE) { 1169 - *value = 0; 1170 - return -EINVAL; 1171 - } 1172 - 1173 - LOCKED(i365_get_status(sock, value)); 1174 - } 1175 - 1176 - static int pcic_set_socket(struct pcmcia_socket *s, socket_state_t *state) 1177 - { 1178 - unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1179 - 1180 - if (socket[sock].flags & IS_ALIVE) 1181 - return -EINVAL; 1182 - 1183 - LOCKED(i365_set_socket(sock, state)); 1184 - } 1185 - 1186 - static int pcic_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) 1187 - { 1188 - unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1189 - if (socket[sock].flags & IS_ALIVE) 1190 - return -EINVAL; 1191 - 1192 - LOCKED(i365_set_io_map(sock, io)); 1193 - } 1194 - 1195 - static int pcic_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem) 1196 - { 1197 - unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1198 - if (socket[sock].flags & IS_ALIVE) 1199 - return -EINVAL; 1200 - 1201 - LOCKED(i365_set_mem_map(sock, mem)); 1202 - } 1203 - 1204 - static int pcic_init(struct pcmcia_socket *s) 1205 - { 1206 - int i; 1207 - struct resource res = { .start = 0, .end = 0x1000 }; 1208 - pccard_io_map io = { 0, 0, 0, 0, 1 }; 1209 - pccard_mem_map mem = { .res = &res, }; 1210 - 1211 - for (i = 0; i < 2; i++) { 1212 - io.map = i; 1213 - pcic_set_io_map(s, &io); 1214 - } 1215 - for (i = 0; i < 5; i++) { 1216 - mem.map = i; 1217 - pcic_set_mem_map(s, &mem); 1218 - } 1219 - return 0; 1220 - } 1221 - 1222 - 1223 - static struct pccard_operations pcic_operations = { 1224 - .init = pcic_init, 1225 - .get_status = pcic_get_status, 1226 - .set_socket = pcic_set_socket, 1227 - .set_io_map = pcic_set_io_map, 1228 - .set_mem_map = pcic_set_mem_map, 1229 - }; 1230 - 1231 - /*====================================================================*/ 1232 - 1233 - static struct platform_driver i82365_driver = { 1234 - .driver = { 1235 - .name = "i82365", 1236 - }, 1237 - }; 1238 - 1239 - static struct platform_device *i82365_device; 1240 - 1241 - static int __init init_i82365(void) 1242 - { 1243 - int i, ret; 1244 - 1245 - ret = platform_driver_register(&i82365_driver); 1246 - if (ret) 1247 - goto err_out; 1248 - 1249 - i82365_device = platform_device_alloc("i82365", 0); 1250 - if (i82365_device) { 1251 - ret = platform_device_add(i82365_device); 1252 - if (ret) 1253 - platform_device_put(i82365_device); 1254 - } else 1255 - ret = -ENOMEM; 1256 - 1257 - if (ret) 1258 - goto err_driver_unregister; 1259 - 1260 - printk(KERN_INFO "Intel ISA PCIC probe: "); 1261 - sockets = 0; 1262 - 1263 - isa_probe(); 1264 - 1265 - if (sockets == 0) { 1266 - printk("not found.\n"); 1267 - ret = -ENODEV; 1268 - goto err_dev_unregister; 1269 - } 1270 - 1271 - /* Set up interrupt handler(s) */ 1272 - if (grab_irq != 0) 1273 - ret = request_irq(cs_irq, pcic_interrupt, 0, "i82365", pcic_interrupt); 1274 - 1275 - if (ret) 1276 - goto err_socket_release; 1277 - 1278 - /* register sockets with the pcmcia core */ 1279 - for (i = 0; i < sockets; i++) { 1280 - socket[i].socket.dev.parent = &i82365_device->dev; 1281 - socket[i].socket.ops = &pcic_operations; 1282 - socket[i].socket.resource_ops = &pccard_nonstatic_ops; 1283 - socket[i].socket.owner = THIS_MODULE; 1284 - socket[i].number = i; 1285 - ret = pcmcia_register_socket(&socket[i].socket); 1286 - if (!ret) 1287 - socket[i].flags |= IS_REGISTERED; 1288 - } 1289 - 1290 - /* Finally, schedule a polling interrupt */ 1291 - if (poll_interval != 0) { 1292 - timer_setup(&poll_timer, pcic_interrupt_wrapper, 0); 1293 - poll_timer.expires = jiffies + poll_interval; 1294 - add_timer(&poll_timer); 1295 - } 1296 - 1297 - return 0; 1298 - err_socket_release: 1299 - for (i = 0; i < sockets; i++) { 1300 - /* Turn off all interrupt sources! */ 1301 - i365_set(i, I365_CSCINT, 0); 1302 - release_region(socket[i].ioaddr, 2); 1303 - } 1304 - err_dev_unregister: 1305 - platform_device_unregister(i82365_device); 1306 - release_region(i365_base, 2); 1307 - #ifdef CONFIG_PNP 1308 - if (i82365_pnpdev) 1309 - pnp_disable_dev(i82365_pnpdev); 1310 - #endif 1311 - err_driver_unregister: 1312 - platform_driver_unregister(&i82365_driver); 1313 - err_out: 1314 - return ret; 1315 - } /* init_i82365 */ 1316 - 1317 - static void __exit exit_i82365(void) 1318 - { 1319 - int i; 1320 - 1321 - for (i = 0; i < sockets; i++) { 1322 - if (socket[i].flags & IS_REGISTERED) 1323 - pcmcia_unregister_socket(&socket[i].socket); 1324 - } 1325 - platform_device_unregister(i82365_device); 1326 - if (poll_interval != 0) 1327 - timer_delete_sync(&poll_timer); 1328 - if (grab_irq != 0) 1329 - free_irq(cs_irq, pcic_interrupt); 1330 - for (i = 0; i < sockets; i++) { 1331 - /* Turn off all interrupt sources! */ 1332 - i365_set(i, I365_CSCINT, 0); 1333 - release_region(socket[i].ioaddr, 2); 1334 - } 1335 - release_region(i365_base, 2); 1336 - #ifdef CONFIG_PNP 1337 - if (i82365_pnpdev) 1338 - pnp_disable_dev(i82365_pnpdev); 1339 - #endif 1340 - platform_driver_unregister(&i82365_driver); 1341 - } /* exit_i82365 */ 1342 - 1343 - module_init(init_i82365); 1344 - module_exit(exit_i82365); 1345 - MODULE_DESCRIPTION("Driver for Intel 82365 and compatible PC Card controllers"); 1346 - MODULE_LICENSE("Dual MPL/GPL"); 1347 - /*====================================================================*/

+6 -6

drivers/pcmcia/rsrc_nonstatic.c

··· 187 187 int any; 188 188 u_char *b, hole, most; 189 189 190 - dev_info(&s->dev, "cs: IO port probe %#x-%#x:", base, base+num-1); 190 + pr_info("%s: cs: IO port probe %#x-%#x:", dev_name(&s->dev), base, base+num-1); 191 191 192 192 /* First, what does a floating port look like? */ 193 193 b = kzalloc(256, GFP_KERNEL); ··· 409 409 struct socket_data *s_data = s->resource_data; 410 410 u_long i, j, bad, fail, step; 411 411 412 - dev_info(&s->dev, "cs: memory probe 0x%06lx-0x%06lx:", 413 - base, base+num-1); 412 + pr_info("%s: cs: memory probe 0x%06lx-0x%06lx:", 413 + dev_name(&s->dev), base, base+num-1); 414 414 bad = fail = 0; 415 415 step = (num < 0x20000) ? 0x2000 : ((num>>4) & ~0x1fff); 416 416 /* don't allow too large steps */ ··· 936 936 static int nonstatic_autoadd_resources(struct pcmcia_socket *s) 937 937 { 938 938 struct resource *res; 939 - int i, done = 0; 939 + int done = 0; 940 940 941 941 if (!s->cb_dev || !s->cb_dev->bus) 942 942 return -ENODEV; ··· 963 963 if (s->cb_dev->bus->number == 0) 964 964 return -EINVAL; 965 965 966 - for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) { 966 + for (unsigned int i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) { 967 967 res = s->cb_dev->bus->resource[i]; 968 968 #else 969 - pci_bus_for_each_resource(s->cb_dev->bus, res, i) { 969 + pci_bus_for_each_resource(s->cb_dev->bus, res) { 970 970 #endif 971 971 if (!res) 972 972 continue;

-805

drivers/pcmcia/tcic.c

··· 1 - /*====================================================================== 2 - 3 - Device driver for Databook TCIC-2 PCMCIA controller 4 - 5 - tcic.c 1.111 2000/02/15 04:13:12 6 - 7 - The contents of this file are subject to the Mozilla Public 8 - License Version 1.1 (the "License"); you may not use this file 9 - except in compliance with the License. You may obtain a copy of 10 - the License at http://www.mozilla.org/MPL/ 11 - 12 - Software distributed under the License is distributed on an "AS 13 - IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or 14 - implied. See the License for the specific language governing 15 - rights and limitations under the License. 16 - 17 - The initial developer of the original code is David A. Hinds 18 - <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 19 - are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 20 - 21 - Alternatively, the contents of this file may be used under the 22 - terms of the GNU General Public License version 2 (the "GPL"), in which 23 - case the provisions of the GPL are applicable instead of the 24 - above. If you wish to allow the use of your version of this file 25 - only under the terms of the GPL and not to allow others to use 26 - your version of this file under the MPL, indicate your decision 27 - by deleting the provisions above and replace them with the notice 28 - and other provisions required by the GPL. If you do not delete 29 - the provisions above, a recipient may use your version of this 30 - file under either the MPL or the GPL. 31 - 32 - ======================================================================*/ 33 - 34 - #include <linux/module.h> 35 - #include <linux/moduleparam.h> 36 - #include <linux/init.h> 37 - #include <linux/types.h> 38 - #include <linux/fcntl.h> 39 - #include <linux/string.h> 40 - #include <linux/errno.h> 41 - #include <linux/interrupt.h> 42 - #include <linux/timer.h> 43 - #include <linux/ioport.h> 44 - #include <linux/delay.h> 45 - #include <linux/workqueue.h> 46 - #include <linux/platform_device.h> 47 - #include <linux/bitops.h> 48 - 49 - #include <asm/io.h> 50 - 51 - #include <pcmcia/ss.h> 52 - #include "tcic.h" 53 - 54 - MODULE_AUTHOR("David Hinds <dahinds@users.sourceforge.net>"); 55 - MODULE_DESCRIPTION("Databook TCIC-2 PCMCIA socket driver"); 56 - MODULE_LICENSE("Dual MPL/GPL"); 57 - 58 - /*====================================================================*/ 59 - 60 - /* Parameters that can be set with 'insmod' */ 61 - 62 - /* The base port address of the TCIC-2 chip */ 63 - static unsigned long tcic_base = TCIC_BASE; 64 - 65 - /* Specify a socket number to ignore */ 66 - static int ignore = -1; 67 - 68 - /* Probe for safe interrupts? */ 69 - static int do_scan = 1; 70 - 71 - /* Bit map of interrupts to choose from */ 72 - static u_int irq_mask = 0xffff; 73 - static int irq_list[16]; 74 - static unsigned int irq_list_count; 75 - 76 - /* The card status change interrupt -- 0 means autoselect */ 77 - static int cs_irq; 78 - 79 - /* Poll status interval -- 0 means default to interrupt */ 80 - static int poll_interval; 81 - 82 - /* Delay for card status double-checking */ 83 - static int poll_quick = HZ/20; 84 - 85 - /* CCLK external clock time, in nanoseconds. 70 ns = 14.31818 MHz */ 86 - static int cycle_time = 70; 87 - 88 - module_param_hw(tcic_base, ulong, ioport, 0444); 89 - module_param(ignore, int, 0444); 90 - module_param(do_scan, int, 0444); 91 - module_param_hw(irq_mask, int, other, 0444); 92 - module_param_hw_array(irq_list, int, irq, &irq_list_count, 0444); 93 - module_param_hw(cs_irq, int, irq, 0444); 94 - module_param(poll_interval, int, 0444); 95 - module_param(poll_quick, int, 0444); 96 - module_param(cycle_time, int, 0444); 97 - 98 - /*====================================================================*/ 99 - 100 - static irqreturn_t tcic_interrupt(int irq, void *dev); 101 - static void tcic_timer(struct timer_list *unused); 102 - static struct pccard_operations tcic_operations; 103 - 104 - struct tcic_socket { 105 - u_short psock; 106 - u_char last_sstat; 107 - u_char id; 108 - struct pcmcia_socket socket; 109 - }; 110 - 111 - static struct timer_list poll_timer; 112 - static int tcic_timer_pending; 113 - 114 - static int sockets; 115 - static struct tcic_socket socket_table[2]; 116 - 117 - /*====================================================================*/ 118 - 119 - /* Trick when selecting interrupts: the TCIC sktirq pin is supposed 120 - to map to irq 11, but is coded as 0 or 1 in the irq registers. */ 121 - #define TCIC_IRQ(x) ((x) ? (((x) == 11) ? 1 : (x)) : 15) 122 - 123 - #ifdef DEBUG_X 124 - static u_char tcic_getb(u_char reg) 125 - { 126 - u_char val = inb(tcic_base+reg); 127 - printk(KERN_DEBUG "tcic_getb(%#lx) = %#x\n", tcic_base+reg, val); 128 - return val; 129 - } 130 - 131 - static u_short tcic_getw(u_char reg) 132 - { 133 - u_short val = inw(tcic_base+reg); 134 - printk(KERN_DEBUG "tcic_getw(%#lx) = %#x\n", tcic_base+reg, val); 135 - return val; 136 - } 137 - 138 - static void tcic_setb(u_char reg, u_char data) 139 - { 140 - printk(KERN_DEBUG "tcic_setb(%#lx, %#x)\n", tcic_base+reg, data); 141 - outb(data, tcic_base+reg); 142 - } 143 - 144 - static void tcic_setw(u_char reg, u_short data) 145 - { 146 - printk(KERN_DEBUG "tcic_setw(%#lx, %#x)\n", tcic_base+reg, data); 147 - outw(data, tcic_base+reg); 148 - } 149 - #else 150 - #define tcic_getb(reg) inb(tcic_base+reg) 151 - #define tcic_getw(reg) inw(tcic_base+reg) 152 - #define tcic_setb(reg, data) outb(data, tcic_base+reg) 153 - #define tcic_setw(reg, data) outw(data, tcic_base+reg) 154 - #endif 155 - 156 - static void tcic_setl(u_char reg, u_int data) 157 - { 158 - #ifdef DEBUG_X 159 - printk(KERN_DEBUG "tcic_setl(%#x, %#lx)\n", tcic_base+reg, data); 160 - #endif 161 - outw(data & 0xffff, tcic_base+reg); 162 - outw(data >> 16, tcic_base+reg+2); 163 - } 164 - 165 - static void tcic_aux_setb(u_short reg, u_char data) 166 - { 167 - u_char mode = (tcic_getb(TCIC_MODE) & TCIC_MODE_PGMMASK) | reg; 168 - tcic_setb(TCIC_MODE, mode); 169 - tcic_setb(TCIC_AUX, data); 170 - } 171 - 172 - static u_short tcic_aux_getw(u_short reg) 173 - { 174 - u_char mode = (tcic_getb(TCIC_MODE) & TCIC_MODE_PGMMASK) | reg; 175 - tcic_setb(TCIC_MODE, mode); 176 - return tcic_getw(TCIC_AUX); 177 - } 178 - 179 - static void tcic_aux_setw(u_short reg, u_short data) 180 - { 181 - u_char mode = (tcic_getb(TCIC_MODE) & TCIC_MODE_PGMMASK) | reg; 182 - tcic_setb(TCIC_MODE, mode); 183 - tcic_setw(TCIC_AUX, data); 184 - } 185 - 186 - /*====================================================================*/ 187 - 188 - /* Time conversion functions */ 189 - 190 - static int to_cycles(int ns) 191 - { 192 - if (ns < 14) 193 - return 0; 194 - else 195 - return 2*(ns-14)/cycle_time; 196 - } 197 - 198 - /*====================================================================*/ 199 - 200 - static volatile u_int irq_hits; 201 - 202 - static irqreturn_t __init tcic_irq_count(int irq, void *dev) 203 - { 204 - irq_hits++; 205 - return IRQ_HANDLED; 206 - } 207 - 208 - static u_int __init try_irq(int irq) 209 - { 210 - u_short cfg; 211 - 212 - irq_hits = 0; 213 - if (request_irq(irq, tcic_irq_count, 0, "irq scan", tcic_irq_count) != 0) 214 - return -1; 215 - mdelay(10); 216 - if (irq_hits) { 217 - free_irq(irq, tcic_irq_count); 218 - return -1; 219 - } 220 - 221 - /* Generate one interrupt */ 222 - cfg = TCIC_SYSCFG_AUTOBUSY | 0x0a00; 223 - tcic_aux_setw(TCIC_AUX_SYSCFG, cfg | TCIC_IRQ(irq)); 224 - tcic_setb(TCIC_IENA, TCIC_IENA_ERR | TCIC_IENA_CFG_HIGH); 225 - tcic_setb(TCIC_ICSR, TCIC_ICSR_ERR | TCIC_ICSR_JAM); 226 - 227 - udelay(1000); 228 - free_irq(irq, tcic_irq_count); 229 - 230 - /* Turn off interrupts */ 231 - tcic_setb(TCIC_IENA, TCIC_IENA_CFG_OFF); 232 - while (tcic_getb(TCIC_ICSR)) 233 - tcic_setb(TCIC_ICSR, TCIC_ICSR_JAM); 234 - tcic_aux_setw(TCIC_AUX_SYSCFG, cfg); 235 - 236 - return (irq_hits != 1); 237 - } 238 - 239 - static u_int __init irq_scan(u_int mask0) 240 - { 241 - u_int mask1; 242 - int i; 243 - 244 - #ifdef __alpha__ 245 - #define PIC 0x4d0 246 - /* Don't probe level-triggered interrupts -- reserved for PCI */ 247 - int level_mask = inb_p(PIC) | (inb_p(PIC+1) << 8); 248 - if (level_mask) 249 - mask0 &= ~level_mask; 250 - #endif 251 - 252 - mask1 = 0; 253 - if (do_scan) { 254 - for (i = 0; i < 16; i++) 255 - if ((mask0 & (1 << i)) && (try_irq(i) == 0)) 256 - mask1 |= (1 << i); 257 - for (i = 0; i < 16; i++) 258 - if ((mask1 & (1 << i)) && (try_irq(i) != 0)) { 259 - mask1 ^= (1 << i); 260 - } 261 - } 262 - 263 - if (mask1) { 264 - printk("scanned"); 265 - } else { 266 - /* Fallback: just find interrupts that aren't in use */ 267 - for (i = 0; i < 16; i++) 268 - if ((mask0 & (1 << i)) && 269 - (request_irq(i, tcic_irq_count, 0, "x", tcic_irq_count) == 0)) { 270 - mask1 |= (1 << i); 271 - free_irq(i, tcic_irq_count); 272 - } 273 - printk("default"); 274 - } 275 - 276 - printk(") = "); 277 - for (i = 0; i < 16; i++) 278 - if (mask1 & (1<<i)) 279 - printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i); 280 - printk(" "); 281 - 282 - return mask1; 283 - } 284 - 285 - /*====================================================================== 286 - 287 - See if a card is present, powered up, in IO mode, and already 288 - bound to a (non-PCMCIA) Linux driver. 289 - 290 - We make an exception for cards that look like serial devices. 291 - 292 - ======================================================================*/ 293 - 294 - static int __init is_active(int s) 295 - { 296 - u_short scf1, ioctl, base, num; 297 - u_char pwr, sstat; 298 - u_int addr; 299 - 300 - tcic_setl(TCIC_ADDR, (s << TCIC_ADDR_SS_SHFT) 301 - | TCIC_ADDR_INDREG | TCIC_SCF1(s)); 302 - scf1 = tcic_getw(TCIC_DATA); 303 - pwr = tcic_getb(TCIC_PWR); 304 - sstat = tcic_getb(TCIC_SSTAT); 305 - addr = TCIC_IWIN(s, 0); 306 - tcic_setw(TCIC_ADDR, addr + TCIC_IBASE_X); 307 - base = tcic_getw(TCIC_DATA); 308 - tcic_setw(TCIC_ADDR, addr + TCIC_ICTL_X); 309 - ioctl = tcic_getw(TCIC_DATA); 310 - 311 - if (ioctl & TCIC_ICTL_TINY) 312 - num = 1; 313 - else { 314 - num = (base ^ (base-1)); 315 - base = base & (base-1); 316 - } 317 - 318 - if ((sstat & TCIC_SSTAT_CD) && (pwr & TCIC_PWR_VCC(s)) && 319 - (scf1 & TCIC_SCF1_IOSTS) && (ioctl & TCIC_ICTL_ENA) && 320 - ((base & 0xfeef) != 0x02e8)) { 321 - struct resource *res = request_region(base, num, "tcic-2"); 322 - if (!res) /* region is busy */ 323 - return 1; 324 - release_region(base, num); 325 - } 326 - 327 - return 0; 328 - } 329 - 330 - /*====================================================================== 331 - 332 - This returns the revision code for the specified socket. 333 - 334 - ======================================================================*/ 335 - 336 - static int __init get_tcic_id(void) 337 - { 338 - u_short id; 339 - 340 - tcic_aux_setw(TCIC_AUX_TEST, TCIC_TEST_DIAG); 341 - id = tcic_aux_getw(TCIC_AUX_ILOCK); 342 - id = (id & TCIC_ILOCKTEST_ID_MASK) >> TCIC_ILOCKTEST_ID_SH; 343 - tcic_aux_setw(TCIC_AUX_TEST, 0); 344 - return id; 345 - } 346 - 347 - /*====================================================================*/ 348 - 349 - static struct platform_driver tcic_driver = { 350 - .driver = { 351 - .name = "tcic-pcmcia", 352 - }, 353 - }; 354 - 355 - static struct platform_device tcic_device = { 356 - .name = "tcic-pcmcia", 357 - .id = 0, 358 - }; 359 - 360 - 361 - static int __init init_tcic(void) 362 - { 363 - int i, sock, ret = 0; 364 - u_int mask, scan; 365 - 366 - if (platform_driver_register(&tcic_driver)) 367 - return -1; 368 - 369 - printk(KERN_INFO "Databook TCIC-2 PCMCIA probe: "); 370 - sock = 0; 371 - 372 - if (!request_region(tcic_base, 16, "tcic-2")) { 373 - printk("could not allocate ports,\n "); 374 - platform_driver_unregister(&tcic_driver); 375 - return -ENODEV; 376 - } 377 - else { 378 - tcic_setw(TCIC_ADDR, 0); 379 - if (tcic_getw(TCIC_ADDR) == 0) { 380 - tcic_setw(TCIC_ADDR, 0xc3a5); 381 - if (tcic_getw(TCIC_ADDR) == 0xc3a5) sock = 2; 382 - } 383 - if (sock == 0) { 384 - /* See if resetting the controller does any good */ 385 - tcic_setb(TCIC_SCTRL, TCIC_SCTRL_RESET); 386 - tcic_setb(TCIC_SCTRL, 0); 387 - tcic_setw(TCIC_ADDR, 0); 388 - if (tcic_getw(TCIC_ADDR) == 0) { 389 - tcic_setw(TCIC_ADDR, 0xc3a5); 390 - if (tcic_getw(TCIC_ADDR) == 0xc3a5) sock = 2; 391 - } 392 - } 393 - } 394 - if (sock == 0) { 395 - printk("not found.\n"); 396 - release_region(tcic_base, 16); 397 - platform_driver_unregister(&tcic_driver); 398 - return -ENODEV; 399 - } 400 - 401 - sockets = 0; 402 - for (i = 0; i < sock; i++) { 403 - if ((i == ignore) || is_active(i)) continue; 404 - socket_table[sockets].psock = i; 405 - socket_table[sockets].id = get_tcic_id(); 406 - 407 - socket_table[sockets].socket.owner = THIS_MODULE; 408 - /* only 16-bit cards, memory windows must be size-aligned */ 409 - /* No PCI or CardBus support */ 410 - socket_table[sockets].socket.features = SS_CAP_PCCARD | SS_CAP_MEM_ALIGN; 411 - /* irq 14, 11, 10, 7, 6, 5, 4, 3 */ 412 - socket_table[sockets].socket.irq_mask = 0x4cf8; 413 - /* 4K minimum window size */ 414 - socket_table[sockets].socket.map_size = 0x1000; 415 - sockets++; 416 - } 417 - 418 - switch (socket_table[0].id) { 419 - case TCIC_ID_DB86082: 420 - printk("DB86082"); break; 421 - case TCIC_ID_DB86082A: 422 - printk("DB86082A"); break; 423 - case TCIC_ID_DB86084: 424 - printk("DB86084"); break; 425 - case TCIC_ID_DB86084A: 426 - printk("DB86084A"); break; 427 - case TCIC_ID_DB86072: 428 - printk("DB86072"); break; 429 - case TCIC_ID_DB86184: 430 - printk("DB86184"); break; 431 - case TCIC_ID_DB86082B: 432 - printk("DB86082B"); break; 433 - default: 434 - printk("Unknown ID 0x%02x", socket_table[0].id); 435 - } 436 - 437 - /* Set up polling */ 438 - timer_setup(&poll_timer, tcic_timer, 0); 439 - 440 - /* Build interrupt mask */ 441 - printk(KERN_CONT ", %d sockets\n", sockets); 442 - printk(KERN_INFO " irq list ("); 443 - if (irq_list_count == 0) 444 - mask = irq_mask; 445 - else 446 - for (i = mask = 0; i < irq_list_count; i++) 447 - mask |= (1<<irq_list[i]); 448 - 449 - /* irq 14, 11, 10, 7, 6, 5, 4, 3 */ 450 - mask &= 0x4cf8; 451 - /* Scan interrupts */ 452 - mask = irq_scan(mask); 453 - for (i=0;i<sockets;i++) 454 - socket_table[i].socket.irq_mask = mask; 455 - 456 - /* Check for only two interrupts available */ 457 - scan = (mask & (mask-1)); 458 - if (((scan & (scan-1)) == 0) && (poll_interval == 0)) 459 - poll_interval = HZ; 460 - 461 - if (poll_interval == 0) { 462 - /* Avoid irq 12 unless it is explicitly requested */ 463 - u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12)); 464 - for (i = 15; i > 0; i--) 465 - if ((cs_mask & (1 << i)) && 466 - (request_irq(i, tcic_interrupt, 0, "tcic", 467 - tcic_interrupt) == 0)) 468 - break; 469 - cs_irq = i; 470 - if (cs_irq == 0) poll_interval = HZ; 471 - } 472 - 473 - if (socket_table[0].socket.irq_mask & (1 << 11)) 474 - printk("sktirq is irq 11, "); 475 - if (cs_irq != 0) 476 - printk("status change on irq %d\n", cs_irq); 477 - else 478 - printk("polled status, interval = %d ms\n", 479 - poll_interval * 1000 / HZ); 480 - 481 - for (i = 0; i < sockets; i++) { 482 - tcic_setw(TCIC_ADDR+2, socket_table[i].psock << TCIC_SS_SHFT); 483 - socket_table[i].last_sstat = tcic_getb(TCIC_SSTAT); 484 - } 485 - 486 - /* jump start interrupt handler, if needed */ 487 - tcic_interrupt(0, NULL); 488 - 489 - platform_device_register(&tcic_device); 490 - 491 - for (i = 0; i < sockets; i++) { 492 - socket_table[i].socket.ops = &tcic_operations; 493 - socket_table[i].socket.resource_ops = &pccard_nonstatic_ops; 494 - socket_table[i].socket.dev.parent = &tcic_device.dev; 495 - ret = pcmcia_register_socket(&socket_table[i].socket); 496 - if (ret && i) 497 - pcmcia_unregister_socket(&socket_table[0].socket); 498 - } 499 - 500 - return ret; 501 - 502 - return 0; 503 - 504 - } /* init_tcic */ 505 - 506 - /*====================================================================*/ 507 - 508 - static void __exit exit_tcic(void) 509 - { 510 - int i; 511 - 512 - timer_delete_sync(&poll_timer); 513 - if (cs_irq != 0) { 514 - tcic_aux_setw(TCIC_AUX_SYSCFG, TCIC_SYSCFG_AUTOBUSY|0x0a00); 515 - free_irq(cs_irq, tcic_interrupt); 516 - } 517 - release_region(tcic_base, 16); 518 - 519 - for (i = 0; i < sockets; i++) { 520 - pcmcia_unregister_socket(&socket_table[i].socket); 521 - } 522 - 523 - platform_device_unregister(&tcic_device); 524 - platform_driver_unregister(&tcic_driver); 525 - } /* exit_tcic */ 526 - 527 - /*====================================================================*/ 528 - 529 - static irqreturn_t tcic_interrupt(int irq, void *dev) 530 - { 531 - int i, quick = 0; 532 - u_char latch, sstat; 533 - u_short psock; 534 - u_int events; 535 - static volatile int active = 0; 536 - 537 - if (active) { 538 - printk(KERN_NOTICE "tcic: reentered interrupt handler!\n"); 539 - return IRQ_NONE; 540 - } else 541 - active = 1; 542 - 543 - pr_debug("tcic_interrupt()\n"); 544 - 545 - for (i = 0; i < sockets; i++) { 546 - psock = socket_table[i].psock; 547 - tcic_setl(TCIC_ADDR, (psock << TCIC_ADDR_SS_SHFT) 548 - | TCIC_ADDR_INDREG | TCIC_SCF1(psock)); 549 - sstat = tcic_getb(TCIC_SSTAT); 550 - latch = sstat ^ socket_table[psock].last_sstat; 551 - socket_table[i].last_sstat = sstat; 552 - if (tcic_getb(TCIC_ICSR) & TCIC_ICSR_CDCHG) { 553 - tcic_setb(TCIC_ICSR, TCIC_ICSR_CLEAR); 554 - quick = 1; 555 - } 556 - if (latch == 0) 557 - continue; 558 - events = (latch & TCIC_SSTAT_CD) ? SS_DETECT : 0; 559 - events |= (latch & TCIC_SSTAT_WP) ? SS_WRPROT : 0; 560 - if (tcic_getw(TCIC_DATA) & TCIC_SCF1_IOSTS) { 561 - events |= (latch & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0; 562 - } else { 563 - events |= (latch & TCIC_SSTAT_RDY) ? SS_READY : 0; 564 - events |= (latch & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0; 565 - events |= (latch & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0; 566 - } 567 - if (events) { 568 - pcmcia_parse_events(&socket_table[i].socket, events); 569 - } 570 - } 571 - 572 - /* Schedule next poll, if needed */ 573 - if (((cs_irq == 0) || quick) && (!tcic_timer_pending)) { 574 - poll_timer.expires = jiffies + (quick ? poll_quick : poll_interval); 575 - add_timer(&poll_timer); 576 - tcic_timer_pending = 1; 577 - } 578 - active = 0; 579 - 580 - pr_debug("interrupt done\n"); 581 - return IRQ_HANDLED; 582 - } /* tcic_interrupt */ 583 - 584 - static void tcic_timer(struct timer_list *unused) 585 - { 586 - pr_debug("tcic_timer()\n"); 587 - tcic_timer_pending = 0; 588 - tcic_interrupt(0, NULL); 589 - } /* tcic_timer */ 590 - 591 - /*====================================================================*/ 592 - 593 - static int tcic_get_status(struct pcmcia_socket *sock, u_int *value) 594 - { 595 - u_short psock = container_of(sock, struct tcic_socket, socket)->psock; 596 - u_char reg; 597 - 598 - tcic_setl(TCIC_ADDR, (psock << TCIC_ADDR_SS_SHFT) 599 - | TCIC_ADDR_INDREG | TCIC_SCF1(psock)); 600 - reg = tcic_getb(TCIC_SSTAT); 601 - *value = (reg & TCIC_SSTAT_CD) ? SS_DETECT : 0; 602 - *value |= (reg & TCIC_SSTAT_WP) ? SS_WRPROT : 0; 603 - if (tcic_getw(TCIC_DATA) & TCIC_SCF1_IOSTS) { 604 - *value |= (reg & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0; 605 - } else { 606 - *value |= (reg & TCIC_SSTAT_RDY) ? SS_READY : 0; 607 - *value |= (reg & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0; 608 - *value |= (reg & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0; 609 - } 610 - reg = tcic_getb(TCIC_PWR); 611 - if (reg & (TCIC_PWR_VCC(psock)|TCIC_PWR_VPP(psock))) 612 - *value |= SS_POWERON; 613 - dev_dbg(&sock->dev, "GetStatus(%d) = %#2.2x\n", psock, *value); 614 - return 0; 615 - } /* tcic_get_status */ 616 - 617 - /*====================================================================*/ 618 - 619 - static int tcic_set_socket(struct pcmcia_socket *sock, socket_state_t *state) 620 - { 621 - u_short psock = container_of(sock, struct tcic_socket, socket)->psock; 622 - u_char reg; 623 - u_short scf1, scf2; 624 - 625 - dev_dbg(&sock->dev, "SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " 626 - "io_irq %d, csc_mask %#2.2x)\n", psock, state->flags, 627 - state->Vcc, state->Vpp, state->io_irq, state->csc_mask); 628 - tcic_setw(TCIC_ADDR+2, (psock << TCIC_SS_SHFT) | TCIC_ADR2_INDREG); 629 - 630 - reg = tcic_getb(TCIC_PWR); 631 - reg &= ~(TCIC_PWR_VCC(psock) | TCIC_PWR_VPP(psock)); 632 - 633 - if (state->Vcc == 50) { 634 - switch (state->Vpp) { 635 - case 0: reg |= TCIC_PWR_VCC(psock) | TCIC_PWR_VPP(psock); break; 636 - case 50: reg |= TCIC_PWR_VCC(psock); break; 637 - case 120: reg |= TCIC_PWR_VPP(psock); break; 638 - default: return -EINVAL; 639 - } 640 - } else if (state->Vcc != 0) 641 - return -EINVAL; 642 - 643 - if (reg != tcic_getb(TCIC_PWR)) 644 - tcic_setb(TCIC_PWR, reg); 645 - 646 - reg = TCIC_ILOCK_HOLD_CCLK | TCIC_ILOCK_CWAIT; 647 - if (state->flags & SS_OUTPUT_ENA) { 648 - tcic_setb(TCIC_SCTRL, TCIC_SCTRL_ENA); 649 - reg |= TCIC_ILOCK_CRESENA; 650 - } else 651 - tcic_setb(TCIC_SCTRL, 0); 652 - if (state->flags & SS_RESET) 653 - reg |= TCIC_ILOCK_CRESET; 654 - tcic_aux_setb(TCIC_AUX_ILOCK, reg); 655 - 656 - tcic_setw(TCIC_ADDR, TCIC_SCF1(psock)); 657 - scf1 = TCIC_SCF1_FINPACK; 658 - scf1 |= TCIC_IRQ(state->io_irq); 659 - if (state->flags & SS_IOCARD) { 660 - scf1 |= TCIC_SCF1_IOSTS; 661 - if (state->flags & SS_SPKR_ENA) 662 - scf1 |= TCIC_SCF1_SPKR; 663 - if (state->flags & SS_DMA_MODE) 664 - scf1 |= TCIC_SCF1_DREQ2 << TCIC_SCF1_DMA_SHIFT; 665 - } 666 - tcic_setw(TCIC_DATA, scf1); 667 - 668 - /* Some general setup stuff, and configure status interrupt */ 669 - reg = TCIC_WAIT_ASYNC | TCIC_WAIT_SENSE | to_cycles(250); 670 - tcic_aux_setb(TCIC_AUX_WCTL, reg); 671 - tcic_aux_setw(TCIC_AUX_SYSCFG, TCIC_SYSCFG_AUTOBUSY|0x0a00| 672 - TCIC_IRQ(cs_irq)); 673 - 674 - /* Card status change interrupt mask */ 675 - tcic_setw(TCIC_ADDR, TCIC_SCF2(psock)); 676 - scf2 = TCIC_SCF2_MALL; 677 - if (state->csc_mask & SS_DETECT) scf2 &= ~TCIC_SCF2_MCD; 678 - if (state->flags & SS_IOCARD) { 679 - if (state->csc_mask & SS_STSCHG) reg &= ~TCIC_SCF2_MLBAT1; 680 - } else { 681 - if (state->csc_mask & SS_BATDEAD) reg &= ~TCIC_SCF2_MLBAT1; 682 - if (state->csc_mask & SS_BATWARN) reg &= ~TCIC_SCF2_MLBAT2; 683 - if (state->csc_mask & SS_READY) reg &= ~TCIC_SCF2_MRDY; 684 - } 685 - tcic_setw(TCIC_DATA, scf2); 686 - /* For the ISA bus, the irq should be active-high totem-pole */ 687 - tcic_setb(TCIC_IENA, TCIC_IENA_CDCHG | TCIC_IENA_CFG_HIGH); 688 - 689 - return 0; 690 - } /* tcic_set_socket */ 691 - 692 - /*====================================================================*/ 693 - 694 - static int tcic_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) 695 - { 696 - u_short psock = container_of(sock, struct tcic_socket, socket)->psock; 697 - u_int addr; 698 - u_short base, len, ioctl; 699 - 700 - dev_dbg(&sock->dev, "SetIOMap(%d, %d, %#2.2x, %d ns, " 701 - "%#llx-%#llx)\n", psock, io->map, io->flags, io->speed, 702 - (unsigned long long)io->start, (unsigned long long)io->stop); 703 - if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || 704 - (io->stop < io->start)) return -EINVAL; 705 - tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT)); 706 - addr = TCIC_IWIN(psock, io->map); 707 - 708 - base = io->start; len = io->stop - io->start; 709 - /* Check to see that len+1 is power of two, etc */ 710 - if ((len & (len+1)) || (base & len)) return -EINVAL; 711 - base |= (len+1)>>1; 712 - tcic_setw(TCIC_ADDR, addr + TCIC_IBASE_X); 713 - tcic_setw(TCIC_DATA, base); 714 - 715 - ioctl = (psock << TCIC_ICTL_SS_SHFT); 716 - ioctl |= (len == 0) ? TCIC_ICTL_TINY : 0; 717 - ioctl |= (io->flags & MAP_ACTIVE) ? TCIC_ICTL_ENA : 0; 718 - ioctl |= to_cycles(io->speed) & TCIC_ICTL_WSCNT_MASK; 719 - if (!(io->flags & MAP_AUTOSZ)) { 720 - ioctl |= TCIC_ICTL_QUIET; 721 - ioctl |= (io->flags & MAP_16BIT) ? TCIC_ICTL_BW_16 : TCIC_ICTL_BW_8; 722 - } 723 - tcic_setw(TCIC_ADDR, addr + TCIC_ICTL_X); 724 - tcic_setw(TCIC_DATA, ioctl); 725 - 726 - return 0; 727 - } /* tcic_set_io_map */ 728 - 729 - /*====================================================================*/ 730 - 731 - static int tcic_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) 732 - { 733 - u_short psock = container_of(sock, struct tcic_socket, socket)->psock; 734 - u_short addr, ctl; 735 - u_long base, len, mmap; 736 - 737 - dev_dbg(&sock->dev, "SetMemMap(%d, %d, %#2.2x, %d ns, " 738 - "%#llx-%#llx, %#x)\n", psock, mem->map, mem->flags, 739 - mem->speed, (unsigned long long)mem->res->start, 740 - (unsigned long long)mem->res->end, mem->card_start); 741 - if ((mem->map > 3) || (mem->card_start > 0x3ffffff) || 742 - (mem->res->start > 0xffffff) || (mem->res->end > 0xffffff) || 743 - (mem->res->start > mem->res->end) || (mem->speed > 1000)) 744 - return -EINVAL; 745 - tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT)); 746 - addr = TCIC_MWIN(psock, mem->map); 747 - 748 - base = mem->res->start; len = mem->res->end - mem->res->start; 749 - if ((len & (len+1)) || (base & len)) return -EINVAL; 750 - if (len == 0x0fff) 751 - base = (base >> TCIC_MBASE_HA_SHFT) | TCIC_MBASE_4K_BIT; 752 - else 753 - base = (base | (len+1)>>1) >> TCIC_MBASE_HA_SHFT; 754 - tcic_setw(TCIC_ADDR, addr + TCIC_MBASE_X); 755 - tcic_setw(TCIC_DATA, base); 756 - 757 - mmap = mem->card_start - mem->res->start; 758 - mmap = (mmap >> TCIC_MMAP_CA_SHFT) & TCIC_MMAP_CA_MASK; 759 - if (mem->flags & MAP_ATTRIB) mmap |= TCIC_MMAP_REG; 760 - tcic_setw(TCIC_ADDR, addr + TCIC_MMAP_X); 761 - tcic_setw(TCIC_DATA, mmap); 762 - 763 - ctl = TCIC_MCTL_QUIET | (psock << TCIC_MCTL_SS_SHFT); 764 - ctl |= to_cycles(mem->speed) & TCIC_MCTL_WSCNT_MASK; 765 - ctl |= (mem->flags & MAP_16BIT) ? 0 : TCIC_MCTL_B8; 766 - ctl |= (mem->flags & MAP_WRPROT) ? TCIC_MCTL_WP : 0; 767 - ctl |= (mem->flags & MAP_ACTIVE) ? TCIC_MCTL_ENA : 0; 768 - tcic_setw(TCIC_ADDR, addr + TCIC_MCTL_X); 769 - tcic_setw(TCIC_DATA, ctl); 770 - 771 - return 0; 772 - } /* tcic_set_mem_map */ 773 - 774 - /*====================================================================*/ 775 - 776 - static int tcic_init(struct pcmcia_socket *s) 777 - { 778 - int i; 779 - struct resource res = { .start = 0, .end = 0x1000 }; 780 - pccard_io_map io = { 0, 0, 0, 0, 1 }; 781 - pccard_mem_map mem = { .res = &res, }; 782 - 783 - for (i = 0; i < 2; i++) { 784 - io.map = i; 785 - tcic_set_io_map(s, &io); 786 - } 787 - for (i = 0; i < 5; i++) { 788 - mem.map = i; 789 - tcic_set_mem_map(s, &mem); 790 - } 791 - return 0; 792 - } 793 - 794 - static struct pccard_operations tcic_operations = { 795 - .init = tcic_init, 796 - .get_status = tcic_get_status, 797 - .set_socket = tcic_set_socket, 798 - .set_io_map = tcic_set_io_map, 799 - .set_mem_map = tcic_set_mem_map, 800 - }; 801 - 802 - /*====================================================================*/ 803 - 804 - module_init(init_tcic); 805 - module_exit(exit_tcic);

-266

drivers/pcmcia/tcic.h

··· 1 - /* 2 - * tcic.h 1.13 1999/10/25 20:03:34 3 - * 4 - * The contents of this file are subject to the Mozilla Public License 5 - * Version 1.1 (the "License"); you may not use this file except in 6 - * compliance with the License. You may obtain a copy of the License 7 - * at http://www.mozilla.org/MPL/ 8 - * 9 - * Software distributed under the License is distributed on an "AS IS" 10 - * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11 - * the License for the specific language governing rights and 12 - * limitations under the License. 13 - * 14 - * The initial developer of the original code is David A. Hinds 15 - * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16 - * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17 - * 18 - * Alternatively, the contents of this file may be used under the 19 - * terms of the GNU General Public License version 2 (the "GPL"), in which 20 - * case the provisions of the GPL are applicable instead of the 21 - * above. If you wish to allow the use of your version of this file 22 - * only under the terms of the GPL and not to allow others to use 23 - * your version of this file under the MPL, indicate your decision by 24 - * deleting the provisions above and replace them with the notice and 25 - * other provisions required by the GPL. If you do not delete the 26 - * provisions above, a recipient may use your version of this file 27 - * under either the MPL or the GPL. 28 - */ 29 - 30 - #ifndef _LINUX_TCIC_H 31 - #define _LINUX_TCIC_H 32 - 33 - #define TCIC_BASE 0x240 34 - 35 - /* offsets of registers from TCIC_BASE */ 36 - #define TCIC_DATA 0x00 37 - #define TCIC_ADDR 0x02 38 - #define TCIC_SCTRL 0x06 39 - #define TCIC_SSTAT 0x07 40 - #define TCIC_MODE 0x08 41 - #define TCIC_PWR 0x09 42 - #define TCIC_EDC 0x0A 43 - #define TCIC_ICSR 0x0C 44 - #define TCIC_IENA 0x0D 45 - #define TCIC_AUX 0x0E 46 - 47 - #define TCIC_SS_SHFT 12 48 - #define TCIC_SS_MASK 0x7000 49 - 50 - /* Flags for TCIC_ADDR */ 51 - #define TCIC_ADR2_REG 0x8000 52 - #define TCIC_ADR2_INDREG 0x0800 53 - 54 - #define TCIC_ADDR_REG 0x80000000 55 - #define TCIC_ADDR_SS_SHFT (TCIC_SS_SHFT+16) 56 - #define TCIC_ADDR_SS_MASK (TCIC_SS_MASK<<16) 57 - #define TCIC_ADDR_INDREG 0x08000000 58 - #define TCIC_ADDR_IO 0x04000000 59 - #define TCIC_ADDR_MASK 0x03ffffff 60 - 61 - /* Flags for TCIC_SCTRL */ 62 - #define TCIC_SCTRL_ENA 0x01 63 - #define TCIC_SCTRL_INCMODE 0x18 64 - #define TCIC_SCTRL_INCMODE_HOLD 0x00 65 - #define TCIC_SCTRL_INCMODE_WORD 0x08 66 - #define TCIC_SCTRL_INCMODE_REG 0x10 67 - #define TCIC_SCTRL_INCMODE_AUTO 0x18 68 - #define TCIC_SCTRL_EDCSUM 0x20 69 - #define TCIC_SCTRL_RESET 0x80 70 - 71 - /* Flags for TCIC_SSTAT */ 72 - #define TCIC_SSTAT_6US 0x01 73 - #define TCIC_SSTAT_10US 0x02 74 - #define TCIC_SSTAT_PROGTIME 0x04 75 - #define TCIC_SSTAT_LBAT1 0x08 76 - #define TCIC_SSTAT_LBAT2 0x10 77 - #define TCIC_SSTAT_RDY 0x20 /* Inverted */ 78 - #define TCIC_SSTAT_WP 0x40 79 - #define TCIC_SSTAT_CD 0x80 /* Card detect */ 80 - 81 - /* Flags for TCIC_MODE */ 82 - #define TCIC_MODE_PGMMASK 0x1f 83 - #define TCIC_MODE_NORMAL 0x00 84 - #define TCIC_MODE_PGMWR 0x01 85 - #define TCIC_MODE_PGMRD 0x02 86 - #define TCIC_MODE_PGMCE 0x04 87 - #define TCIC_MODE_PGMDBW 0x08 88 - #define TCIC_MODE_PGMWORD 0x10 89 - #define TCIC_MODE_AUXSEL_MASK 0xe0 90 - 91 - /* Registers accessed through TCIC_AUX, by setting TCIC_MODE */ 92 - #define TCIC_AUX_TCTL (0<<5) 93 - #define TCIC_AUX_PCTL (1<<5) 94 - #define TCIC_AUX_WCTL (2<<5) 95 - #define TCIC_AUX_EXTERN (3<<5) 96 - #define TCIC_AUX_PDATA (4<<5) 97 - #define TCIC_AUX_SYSCFG (5<<5) 98 - #define TCIC_AUX_ILOCK (6<<5) 99 - #define TCIC_AUX_TEST (7<<5) 100 - 101 - /* Flags for TCIC_PWR */ 102 - #define TCIC_PWR_VCC(sock) (0x01<<(sock)) 103 - #define TCIC_PWR_VCC_MASK 0x03 104 - #define TCIC_PWR_VPP(sock) (0x08<<(sock)) 105 - #define TCIC_PWR_VPP_MASK 0x18 106 - #define TCIC_PWR_CLIMENA 0x40 107 - #define TCIC_PWR_CLIMSTAT 0x80 108 - 109 - /* Flags for TCIC_ICSR */ 110 - #define TCIC_ICSR_CLEAR 0x01 111 - #define TCIC_ICSR_SET 0x02 112 - #define TCIC_ICSR_JAM (TCIC_ICSR_CLEAR|TCIC_ICSR_SET) 113 - #define TCIC_ICSR_STOPCPU 0x04 114 - #define TCIC_ICSR_ILOCK 0x08 115 - #define TCIC_ICSR_PROGTIME 0x10 116 - #define TCIC_ICSR_ERR 0x20 117 - #define TCIC_ICSR_CDCHG 0x40 118 - #define TCIC_ICSR_IOCHK 0x80 119 - 120 - /* Flags for TCIC_IENA */ 121 - #define TCIC_IENA_CFG_MASK 0x03 122 - #define TCIC_IENA_CFG_OFF 0x00 /* disabled */ 123 - #define TCIC_IENA_CFG_OD 0x01 /* active low, open drain */ 124 - #define TCIC_IENA_CFG_LOW 0x02 /* active low, totem pole */ 125 - #define TCIC_IENA_CFG_HIGH 0x03 /* active high, totem pole */ 126 - #define TCIC_IENA_ILOCK 0x08 127 - #define TCIC_IENA_PROGTIME 0x10 128 - #define TCIC_IENA_ERR 0x20 /* overcurrent or iochk */ 129 - #define TCIC_IENA_CDCHG 0x40 130 - 131 - /* Flags for TCIC_AUX_WCTL */ 132 - #define TCIC_WAIT_COUNT_MASK 0x001f 133 - #define TCIC_WAIT_ASYNC 0x0020 134 - #define TCIC_WAIT_SENSE 0x0040 135 - #define TCIC_WAIT_SRC 0x0080 136 - #define TCIC_WCTL_WR 0x0100 137 - #define TCIC_WCTL_RD 0x0200 138 - #define TCIC_WCTL_CE 0x0400 139 - #define TCIC_WCTL_LLBAT1 0x0800 140 - #define TCIC_WCTL_LLBAT2 0x1000 141 - #define TCIC_WCTL_LRDY 0x2000 142 - #define TCIC_WCTL_LWP 0x4000 143 - #define TCIC_WCTL_LCD 0x8000 144 - 145 - /* Flags for TCIC_AUX_SYSCFG */ 146 - #define TCIC_SYSCFG_IRQ_MASK 0x000f 147 - #define TCIC_SYSCFG_MCSFULL 0x0010 148 - #define TCIC_SYSCFG_IO1723 0x0020 149 - #define TCIC_SYSCFG_MCSXB 0x0040 150 - #define TCIC_SYSCFG_ICSXB 0x0080 151 - #define TCIC_SYSCFG_NOPDN 0x0100 152 - #define TCIC_SYSCFG_MPSEL_SHFT 9 153 - #define TCIC_SYSCFG_MPSEL_MASK 0x0e00 154 - #define TCIC_SYSCFG_MPSENSE 0x2000 155 - #define TCIC_SYSCFG_AUTOBUSY 0x4000 156 - #define TCIC_SYSCFG_ACC 0x8000 157 - 158 - #define TCIC_ILOCK_OUT 0x01 159 - #define TCIC_ILOCK_SENSE 0x02 160 - #define TCIC_ILOCK_CRESET 0x04 161 - #define TCIC_ILOCK_CRESENA 0x08 162 - #define TCIC_ILOCK_CWAIT 0x10 163 - #define TCIC_ILOCK_CWAITSNS 0x20 164 - #define TCIC_ILOCK_HOLD_MASK 0xc0 165 - #define TCIC_ILOCK_HOLD_CCLK 0xc0 166 - 167 - #define TCIC_ILOCKTEST_ID_SH 8 168 - #define TCIC_ILOCKTEST_ID_MASK 0x7f00 169 - #define TCIC_ILOCKTEST_MCIC_1 0x8000 170 - 171 - #define TCIC_ID_DB86082 0x02 172 - #define TCIC_ID_DB86082A 0x03 173 - #define TCIC_ID_DB86084 0x04 174 - #define TCIC_ID_DB86084A 0x08 175 - #define TCIC_ID_DB86072 0x15 176 - #define TCIC_ID_DB86184 0x14 177 - #define TCIC_ID_DB86082B 0x17 178 - 179 - #define TCIC_TEST_DIAG 0x8000 180 - 181 - /* 182 - * Indirectly addressed registers 183 - */ 184 - 185 - #define TCIC_SCF1(sock) ((sock)<<3) 186 - #define TCIC_SCF2(sock) (((sock)<<3)+2) 187 - 188 - /* Flags for SCF1 */ 189 - #define TCIC_SCF1_IRQ_MASK 0x000f 190 - #define TCIC_SCF1_IRQ_OFF 0x0000 191 - #define TCIC_SCF1_IRQOC 0x0010 192 - #define TCIC_SCF1_PCVT 0x0020 193 - #define TCIC_SCF1_IRDY 0x0040 194 - #define TCIC_SCF1_ATA 0x0080 195 - #define TCIC_SCF1_DMA_SHIFT 8 196 - #define TCIC_SCF1_DMA_MASK 0x0700 197 - #define TCIC_SCF1_DMA_OFF 0 198 - #define TCIC_SCF1_DREQ2 2 199 - #define TCIC_SCF1_IOSTS 0x0800 200 - #define TCIC_SCF1_SPKR 0x1000 201 - #define TCIC_SCF1_FINPACK 0x2000 202 - #define TCIC_SCF1_DELWR 0x4000 203 - #define TCIC_SCF1_HD7IDE 0x8000 204 - 205 - /* Flags for SCF2 */ 206 - #define TCIC_SCF2_RI 0x0001 207 - #define TCIC_SCF2_IDBR 0x0002 208 - #define TCIC_SCF2_MDBR 0x0004 209 - #define TCIC_SCF2_MLBAT1 0x0008 210 - #define TCIC_SCF2_MLBAT2 0x0010 211 - #define TCIC_SCF2_MRDY 0x0020 212 - #define TCIC_SCF2_MWP 0x0040 213 - #define TCIC_SCF2_MCD 0x0080 214 - #define TCIC_SCF2_MALL 0x00f8 215 - 216 - /* Indirect addresses for memory window registers */ 217 - #define TCIC_MWIN(sock,map) (0x100+(((map)+((sock)<<2))<<3)) 218 - #define TCIC_MBASE_X 2 219 - #define TCIC_MMAP_X 4 220 - #define TCIC_MCTL_X 6 221 - 222 - #define TCIC_MBASE_4K_BIT 0x4000 223 - #define TCIC_MBASE_HA_SHFT 12 224 - #define TCIC_MBASE_HA_MASK 0x0fff 225 - 226 - #define TCIC_MMAP_REG 0x8000 227 - #define TCIC_MMAP_CA_SHFT 12 228 - #define TCIC_MMAP_CA_MASK 0x3fff 229 - 230 - #define TCIC_MCTL_WSCNT_MASK 0x001f 231 - #define TCIC_MCTL_WCLK 0x0020 232 - #define TCIC_MCTL_WCLK_CCLK 0x0000 233 - #define TCIC_MCTL_WCLK_BCLK 0x0020 234 - #define TCIC_MCTL_QUIET 0x0040 235 - #define TCIC_MCTL_WP 0x0080 236 - #define TCIC_MCTL_ACC 0x0100 237 - #define TCIC_MCTL_KE 0x0200 238 - #define TCIC_MCTL_EDC 0x0400 239 - #define TCIC_MCTL_B8 0x0800 240 - #define TCIC_MCTL_SS_SHFT TCIC_SS_SHFT 241 - #define TCIC_MCTL_SS_MASK TCIC_SS_MASK 242 - #define TCIC_MCTL_ENA 0x8000 243 - 244 - /* Indirect addresses for I/O window registers */ 245 - #define TCIC_IWIN(sock,map) (0x200+(((map)+((sock)<<1))<<2)) 246 - #define TCIC_IBASE_X 0 247 - #define TCIC_ICTL_X 2 248 - 249 - #define TCIC_ICTL_WSCNT_MASK TCIC_MCTL_WSCNT_MASK 250 - #define TCIC_ICTL_QUIET TCIC_MCTL_QUIET 251 - #define TCIC_ICTL_1K 0x0080 252 - #define TCIC_ICTL_PASS16 0x0100 253 - #define TCIC_ICTL_ACC TCIC_MCTL_ACC 254 - #define TCIC_ICTL_TINY 0x0200 255 - #define TCIC_ICTL_B16 0x0400 256 - #define TCIC_ICTL_B8 TCIC_MCTL_B8 257 - #define TCIC_ICTL_BW_MASK (TCIC_ICTL_B16|TCIC_ICTL_B8) 258 - #define TCIC_ICTL_BW_DYN 0 259 - #define TCIC_ICTL_BW_8 TCIC_ICTL_B8 260 - #define TCIC_ICTL_BW_16 TCIC_ICTL_B16 261 - #define TCIC_ICTL_BW_ATA (TCIC_ICTL_B16|TCIC_ICTL_B8) 262 - #define TCIC_ICTL_SS_SHFT TCIC_SS_SHFT 263 - #define TCIC_ICTL_SS_MASK TCIC_SS_MASK 264 - #define TCIC_ICTL_ENA TCIC_MCTL_ENA 265 - 266 - #endif /* _LINUX_TCIC_H */

+1 -2

drivers/pcmcia/yenta_socket.c

··· 674 674 u32 min) 675 675 { 676 676 struct resource *root; 677 - int i; 678 677 679 - pci_bus_for_each_resource(socket->dev->bus, root, i) { 678 + pci_bus_for_each_resource(socket->dev->bus, root) { 680 679 if (!root) 681 680 continue; 682 681

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