Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mfd-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Support & Features:
- Add comprehensive support for the ROHM BD72720 PMIC, including core
MFD, regulator, GPIO, clock gate, RTC, and power-supply drivers
- Add support for the Rockchip RK801 PMIC, including core MFD and
regulator drivers
- Add support for the ROHM BD73900 PMIC by leveraging existing common
drivers
- Wire up RTC, hwmon, and input sub-devices for the Apple SMC
(macsmc) driver
- Add support for the Delta Networks TN48M switch CPLD via the
simple-mfd-i2c driver
- Add support for the TS133 variant to the QNAP MCU driver
- Provide support for the sama7d65 XLCD controller in the Atmel HLCDC
driver
- Add backlight sub-device support to the Congatec Board Controller
(cgbc)
- Add Intel Nova Lake-S (NVL-S) PCI IDs to the Intel LPSS driver
Improvements & Fixes:
- Implement a "wrapper regmap" for the ROHM BD72720 to handle dual
I2C slave addresses (0x4b and 0x4c) transparently for child devices
- Introduce mutex locking around 'mfd_of_node_list' in the MFD core
to ensure safe concurrent access
- Fix a potential regulator resource leak in the Arizona core driver
during boot sequence failures
- Resolve child device duplication issues on driver rebind for
Qualcomm PM8xxx and OMAP USB host drivers by using
of_platform_depopulate()
- Fix IRQ domain name duplication for the Samsung S2MPG10 by adding a
unique domain suffix
- Implement LOCK register handling for the TI TPS65214 variant to
unlock registers at probe time
- Fully convert the Loongson-2K BMC driver to use managed resources
(pcim) and the standard PCI resource API
- Ensure the Apple SMC mutex is correctly initialized during probe to
prevent NULL pointer dereferences
- Expand the ROHM BD71828 power-supply driver to support 9-bit
register addresses
- Simplify the Samsung S5M RTC driver by querying platform device IRQ
resources directly
- Revert an incorrect read-to-write mask change in the DA9052 SPI
driver to restore default OTP behavior
- Fix kernel-doc warnings in the TI TPS6105x driver
- Cleanups & Refactoring
- Simplify the MFD core by utilizing the scoped
for_each_child_of_node_scoped() macro and streamlining device_node
storage
- Rename ROHM BD71828 IC-specific entities to use consistent prefixes
for better extensibility
- Refactor ROHM BD71828 regmap definitions using the
regmap_reg_range() macro
- Update the ROHM BD71828 driver to use standard C-style comment
headers
- Remove the now unused 'irq_data' field from the Samsung SEC core
structure
- Drop unnecessary use of irqd_get_trigger_type() in the Maxim
MAX77759 driver
- Default MFD_SPACEMIT_P1 to 'm' if ARCH_SPACEMIT is selected
- Add missing charger-related registers to the ROHM BD71828 core
header and Type-C CC registers to the AXP717
Device Tree Binding Updates:
- Add new bindings for the ROHM BD72720 PMIC, Rockchip RK801 PMIC,
Bitmain BM1880 System Controller, and NXP LPC32xx System Control
Block
- Clarify trickle-charge terminology and add properties for voltage
drop (VDR) correction and upper charge limits to the generic
battery binding
- Document GPR syscon for NXP S32 SoCs and the smp-memram subnode for
Aspeed SCU
- Document numerous new Qualcomm SPMI PMIC compatibles (pmcx0102,
pmh0101, pmk8850, etc)
- Add compatibles for the sama7d65 XLCD (Atmel), LAN9691 Flexcom
(Microchip), and various MediaTek SCPSYS and regulator components
- Fix a dead link to the audio codec binding in the DA9055
documentation"
* tag 'mfd-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (41 commits)
dt-bindings: mfd: da9055: Fix dead link to codec binding
mfd: cgbc: Add support for backlight
dt-bindings: mfd: qcom,spmi-pmic: Document PMICs present on Glymur and Kaanapali
dt-bindings: mfd: Document smp-memram subnode for aspeed,ast2x00-scu
mfd: intel-lpss: Add Intel Nova Lake-S PCI IDs
mfd: ls2kbmc: Use PCI API instead of direct accesses
mfd: ls2kbmc: Fully convert to use managed resources
dt-bindings: mfd: mediatek: mt6397: Add missing MT6331 regulator compat
dt-bindings: mfd: mediatek,mt8195-scpsys: Add mediatek,mt6795-scpsys
dt-bindings: mfd: atmel,sama5d2-flexcom: Add microchip,lan9691-flexcom
mfd: omap-usb-host: Fix OF populate on driver rebind
mfd: qcom-pm8xxx: Fix OF populate on driver rebind
dt-bindings: mfd: syscon: Allow syscon compatible for mediatek,mt7981-topmisc
mfd: qnap-mcu: Add driver data for TS133 variant
dt-bindings: mfd: qnap,ts433-mcu: Add qnap,ts133-mcu compatible
mfd: sec: Fix IRQ domain names duplication
mfd: simple-mfd-i2c: Add Delta TN48M CPLD support
mfd: macsmc: Initialize mutex
dt-bindings: mfd: nxp: Add NXP LPC32xx System Control Block
mfd: Kconfig: Default MFD_SPACEMIT_P1 to 'm' if ARCH_SPACEMIT
...
+955
-79
+17
Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
+17
Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
···
130
130
- description: silicon id information registers
131
131
- description: unique chip id registers
132
132
133
+
'^smp-memram@[0-9a-f]+$':
134
+
description: Memory region used for the AST2600's custom SMP bringup protocol
135
+
type: object
136
+
additionalProperties: false
137
+
138
+
properties:
139
+
compatible:
140
+
const: aspeed,ast2600-smpmem
141
+
142
+
reg:
143
+
description: The SMP memory region
144
+
maxItems: 1
145
+
146
+
required:
147
+
- compatible
148
+
- reg
149
+
133
150
required:
134
151
- compatible
135
152
- reg
+1
Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml
+1
Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml
+1
Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+1
Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+66
Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml
+66
Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/bitmain,bm1880-sctrl.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Bitmain BM1880 System Controller
8
+
9
+
maintainers:
10
+
- Manivannan Sadhasivam <mani@kernel.org>
11
+
12
+
properties:
13
+
compatible:
14
+
items:
15
+
- const: bitmain,bm1880-sctrl
16
+
- const: syscon
17
+
- const: simple-mfd
18
+
19
+
reg:
20
+
maxItems: 1
21
+
22
+
ranges: true
23
+
24
+
'#address-cells':
25
+
const: 1
26
+
27
+
'#size-cells':
28
+
const: 1
29
+
30
+
patternProperties:
31
+
'^pinctrl@[0-9a-f]+$':
32
+
type: object
33
+
additionalProperties: true
34
+
35
+
properties:
36
+
compatible:
37
+
contains:
38
+
const: bitmain,bm1880-pinctrl
39
+
40
+
'^clock-controller@[0-9a-f]+$':
41
+
type: object
42
+
additionalProperties: true
43
+
44
+
properties:
45
+
compatible:
46
+
contains:
47
+
const: bitmain,bm1880-clk
48
+
49
+
'^reset-controller@[0-9a-f]+$':
50
+
type: object
51
+
additionalProperties: true
52
+
53
+
properties:
54
+
compatible:
55
+
contains:
56
+
const: bitmain,bm1880-reset
57
+
58
+
required:
59
+
- compatible
60
+
- reg
61
+
- ranges
62
+
- '#address-cells'
63
+
- '#size-cells'
64
+
65
+
additionalProperties: false
66
+
...
+1
-1
Documentation/devicetree/bindings/mfd/da9055.txt
+1
-1
Documentation/devicetree/bindings/mfd/da9055.txt
+1
Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml
+1
Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml
+1
Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml
+1
Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml
+74
Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml
+74
Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: NXP LPC32xx System Control Block
8
+
9
+
maintainers:
10
+
- Vladimir Zapolskiy <vz@mleia.com>
11
+
12
+
description:
13
+
NXP LPC32xx SoC series have a System Control Block, which serves for
14
+
a multitude of purposes including clock management, DMA muxes, storing
15
+
SoC unique ID etc.
16
+
17
+
properties:
18
+
compatible:
19
+
items:
20
+
- enum:
21
+
- nxp,lpc3220-scb
22
+
- const: syscon
23
+
- const: simple-mfd
24
+
25
+
reg:
26
+
maxItems: 1
27
+
28
+
ranges: true
29
+
30
+
"#address-cells":
31
+
const: 1
32
+
33
+
"#size-cells":
34
+
const: 1
35
+
36
+
patternProperties:
37
+
"^clock-controller@[0-9a-f]+$":
38
+
$ref: /schemas/clock/nxp,lpc3220-clk.yaml#
39
+
40
+
"^dma-router@[0-9a-f]+$":
41
+
$ref: /schemas/dma/nxp,lpc3220-dmamux.yaml#
42
+
43
+
required:
44
+
- compatible
45
+
- reg
46
+
- "#address-cells"
47
+
- "#size-cells"
48
+
49
+
additionalProperties: false
50
+
51
+
examples:
52
+
- |
53
+
syscon@400040000 {
54
+
compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd";
55
+
reg = <0x40004000 0x1000>;
56
+
#address-cells = <1>;
57
+
#size-cells = <1>;
58
+
ranges = <0 0x40004000 0x1000>;
59
+
60
+
clock-controller@0 {
61
+
compatible = "nxp,lpc3220-clk";
62
+
reg = <0x0 0x114>;
63
+
clocks = <&xtal_32k>, <&xtal>;
64
+
clock-names = "xtal_32k", "xtal";
65
+
#clock-cells = <1>;
66
+
};
67
+
68
+
dma-router@78 {
69
+
compatible = "nxp,lpc3220-dmamux";
70
+
reg = <0x78 0x8>;
71
+
dma-masters = <&dma>;
72
+
#dma-cells = <3>;
73
+
};
74
+
};
+6
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+6
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
···
77
77
- qcom,pmc8180
78
78
- qcom,pmc8180c
79
79
- qcom,pmc8380
80
+
- qcom,pmcx0102
80
81
- qcom,pmd8028
81
82
- qcom,pmd9635
83
+
- qcom,pmh0101
84
+
- qcom,pmh0104
85
+
- qcom,pmh0110
82
86
- qcom,pmi632
83
87
- qcom,pmi8950
84
88
- qcom,pmi8962
···
93
89
- qcom,pmk8002
94
90
- qcom,pmk8350
95
91
- qcom,pmk8550
92
+
- qcom,pmk8850
96
93
- qcom,pmm8155au
97
94
- qcom,pmm8654au
98
95
- qcom,pmp8074
···
106
101
- qcom,pmx75
107
102
- qcom,smb2351
108
103
- qcom,smb2360
104
+
- qcom,smb2370
109
105
- const: qcom,spmi-pmic
110
106
111
107
reg:
+1
Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml
+1
Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml
+197
Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml
+197
Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/rockchip,rk801.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: RK801 Power Management Integrated Circuit
8
+
9
+
maintainers:
10
+
- Joseph Chen <chenjh@rock-chips.com>
11
+
12
+
description: |
13
+
Rockchip RK801 series PMIC. This device consists of an i2c controlled MFD
14
+
that includes multiple switchable regulators.
15
+
16
+
properties:
17
+
compatible:
18
+
enum:
19
+
- rockchip,rk801
20
+
21
+
reg:
22
+
maxItems: 1
23
+
24
+
interrupts:
25
+
maxItems: 1
26
+
27
+
system-power-controller:
28
+
type: boolean
29
+
description:
30
+
Telling whether or not this PMIC is controlling the system power.
31
+
32
+
wakeup-source:
33
+
type: boolean
34
+
description:
35
+
Device can be used as a wakeup source.
36
+
37
+
vcc1-supply:
38
+
description:
39
+
The input supply for dcdc1.
40
+
41
+
vcc2-supply:
42
+
description:
43
+
The input supply for dcdc2.
44
+
45
+
vcc3-supply:
46
+
description:
47
+
The input supply for dcdc3.
48
+
49
+
vcc4-supply:
50
+
description:
51
+
The input supply for dcdc4.
52
+
53
+
vcc5-supply:
54
+
description:
55
+
The input supply for ldo1.
56
+
57
+
vcc6-supply:
58
+
description:
59
+
The input supply for ldo2.
60
+
61
+
vcc7-supply:
62
+
description:
63
+
The input supply for switch.
64
+
65
+
regulators:
66
+
type: object
67
+
patternProperties:
68
+
"^(dcdc[1-4]|ldo[1-2]|switch)$":
69
+
type: object
70
+
$ref: /schemas/regulator/regulator.yaml#
71
+
unevaluatedProperties: false
72
+
additionalProperties: false
73
+
74
+
required:
75
+
- compatible
76
+
- reg
77
+
- interrupts
78
+
79
+
additionalProperties: false
80
+
81
+
examples:
82
+
- |
83
+
#include <dt-bindings/pinctrl/rockchip.h>
84
+
#include <dt-bindings/interrupt-controller/irq.h>
85
+
#include <dt-bindings/gpio/gpio.h>
86
+
87
+
i2c {
88
+
#address-cells = <1>;
89
+
#size-cells = <0>;
90
+
91
+
rk801: pmic@27 {
92
+
compatible = "rockchip,rk801";
93
+
reg = <0x27>;
94
+
interrupt-parent = <&gpio0>;
95
+
interrupts = <RK_PC0 IRQ_TYPE_LEVEL_LOW>;
96
+
pinctrl-names = "default";
97
+
pinctrl-0 = <&pmic_int_l>;
98
+
system-power-controller;
99
+
wakeup-source;
100
+
101
+
vcc1-supply = <&vcc_sys>;
102
+
vcc2-supply = <&vcc_sys>;
103
+
vcc3-supply = <&vcc_sys>;
104
+
vcc4-supply = <&vcc_sys>;
105
+
vcc5-supply = <&vcc3v3_sys>;
106
+
vcc6-supply = <&vcc3v3_sys>;
107
+
vcc7-supply = <&vcc3v3_sys>;
108
+
109
+
regulators {
110
+
vdd_cpu: dcdc1 {
111
+
regulator-name = "vdd_cpu";
112
+
regulator-min-microvolt = <500000>;
113
+
regulator-max-microvolt = <1500000>;
114
+
regulator-initial-mode = <0x1>;
115
+
regulator-boot-on;
116
+
regulator-always-on;
117
+
regulator-state-mem {
118
+
regulator-mode = <0x2>;
119
+
regulator-off-in-suspend;
120
+
regulator-suspend-microvolt = <950000>;
121
+
};
122
+
};
123
+
124
+
vcc3v3_sys: dcdc2 {
125
+
regulator-name = "vcc3v3_sys";
126
+
regulator-min-microvolt = <3300000>;
127
+
regulator-max-microvolt = <3300000>;
128
+
regulator-initial-mode = <0x1>;
129
+
regulator-boot-on;
130
+
regulator-always-on;
131
+
regulator-state-mem {
132
+
regulator-mode = <0x2>;
133
+
regulator-on-in-suspend;
134
+
regulator-suspend-microvolt = <3300000>;
135
+
};
136
+
};
137
+
138
+
vcc_ddr: dcdc3 {
139
+
regulator-name = "vcc_ddr";
140
+
regulator-boot-on;
141
+
regulator-always-on;
142
+
regulator-state-mem {
143
+
regulator-mode = <0x2>;
144
+
regulator-on-in-suspend;
145
+
};
146
+
};
147
+
148
+
vdd_logic: dcdc4 {
149
+
regulator-name = "vdd_logic";
150
+
regulator-min-microvolt = <500000>;
151
+
regulator-max-microvolt = <1500000>;
152
+
regulator-initial-mode = <0x1>;
153
+
regulator-boot-on;
154
+
regulator-always-on;
155
+
regulator-state-mem {
156
+
regulator-mode = <0x2>;
157
+
regulator-off-in-suspend;
158
+
regulator-suspend-microvolt = <900000>;
159
+
};
160
+
};
161
+
162
+
vdd0v9_sys: ldo1 {
163
+
regulator-name = "vdd0v9_sys";
164
+
regulator-min-microvolt = <900000>;
165
+
regulator-max-microvolt = <900000>;
166
+
regulator-boot-on;
167
+
regulator-always-on;
168
+
regulator-state-mem {
169
+
regulator-off-in-suspend;
170
+
regulator-suspend-microvolt = <900000>;
171
+
};
172
+
};
173
+
174
+
vcc_1v8: ldo2 {
175
+
regulator-name = "vcc_1v8";
176
+
regulator-min-microvolt = <1800000>;
177
+
regulator-max-microvolt = <1800000>;
178
+
regulator-boot-on;
179
+
regulator-always-on;
180
+
regulator-state-mem {
181
+
regulator-off-in-suspend;
182
+
regulator-suspend-microvolt = <1800000>;
183
+
};
184
+
};
185
+
186
+
vcc_3v3: switch {
187
+
regulator-name = "vcc_3v3";
188
+
regulator-boot-on;
189
+
regulator-always-on;
190
+
regulator-state-mem {
191
+
regulator-off-in-suspend;
192
+
regulator-suspend-microvolt = <3300000>;
193
+
};
194
+
};
195
+
};
196
+
};
197
+
};
+5
Documentation/devicetree/bindings/mfd/syscon.yaml
+5
Documentation/devicetree/bindings/mfd/syscon.yaml
···
102
102
- mstar,msc313-pmsleep
103
103
- nuvoton,ma35d1-sys
104
104
- nuvoton,wpcm450-shm
105
+
- nxp,s32g2-gpr
106
+
- nxp,s32g3-gpr
105
107
- qcom,apq8064-mmss-sfpb
106
108
- qcom,apq8064-sps-sic
107
109
- rockchip,px30-qos
···
197
195
- mediatek,mt2701-pctl-a-syscfg
198
196
- mediatek,mt2712-pctl-a-syscfg
199
197
- mediatek,mt6397-pctl-pmic-syscfg
198
+
- mediatek,mt7981-topmisc
200
199
- mediatek,mt7988-topmisc
201
200
- mediatek,mt8135-pctl-a-syscfg
202
201
- mediatek,mt8135-pctl-b-syscfg
···
215
212
- mstar,msc313-pmsleep
216
213
- nuvoton,ma35d1-sys
217
214
- nuvoton,wpcm450-shm
215
+
- nxp,s32g2-gpr
216
+
- nxp,s32g3-gpr
218
217
- qcom,apq8064-mmss-sfpb
219
218
- qcom,apq8064-sps-sic
220
219
- rockchip,px30-qos
+15
-3
drivers/mfd/Kconfig
+15
-3
drivers/mfd/Kconfig
···
407
407
help
408
408
Support for Cirrus Logic CS42L92, CS47L92 and CS47L93 Smart Codecs
409
409
410
+
config MFD_TN48M_CPLD
411
+
tristate "Delta Networks TN48M switch CPLD driver"
412
+
depends on I2C
413
+
depends on ARCH_MVEBU || COMPILE_TEST
414
+
select MFD_SIMPLE_MFD_I2C
415
+
help
416
+
Select this option to enable support for Delta Networks TN48M switch
417
+
CPLD. It consists of reset and GPIO drivers. CPLD provides GPIOS-s
418
+
for the SFP slots as well as power supply related information.
419
+
SFP support depends on the GPIO driver being selected.
420
+
410
421
config PMIC_DA903X
411
422
bool "Dialog Semiconductor DA9030/DA9034 PMIC Support"
412
423
depends on I2C=y
···
1287
1276
depends on ARCH_SPACEMIT || COMPILE_TEST
1288
1277
depends on I2C
1289
1278
select MFD_SIMPLE_MFD_I2C
1279
+
default m if ARCH_SPACEMIT
1290
1280
help
1291
1281
This option supports the I2C-based SpacemiT P1 PMIC, which
1292
1282
contains regulators, a power switch, GPIOs, an RTC, and more.
···
1383
1371
select MFD_CORE
1384
1372
1385
1373
config MFD_RK8XX_I2C
1386
-
tristate "Rockchip RK805/RK808/RK809/RK816/RK817/RK818 Power Management Chip"
1374
+
tristate "Rockchip RK8xx Power Management Chips"
1387
1375
depends on I2C && OF
1388
1376
select MFD_CORE
1389
1377
select REGMAP_I2C
1390
1378
select REGMAP_IRQ
1391
1379
select MFD_RK8XX
1392
1380
help
1393
-
If you say yes here you get support for the RK805, RK808, RK809,
1394
-
RK816, RK817 and RK818 Power Management chips.
1381
+
If you say yes here you get support for the RK801, RK805, RK808,
1382
+
RK809, RK816, RK817 and RK818 Power Management chips.
1395
1383
This driver provides common support for accessing the device
1396
1384
through I2C interface. The device supports multiple sub-devices
1397
1385
including interrupts, RTC, LDO & DCDC regulators, and onkey.
+1
-1
drivers/mfd/arizona-core.c
+1
-1
drivers/mfd/arizona-core.c
+1
drivers/mfd/atmel-hlcdc.c
+1
drivers/mfd/atmel-hlcdc.c
···
140
140
{ .compatible = "atmel,sama5d4-hlcdc" },
141
141
{ .compatible = "microchip,sam9x60-hlcdc" },
142
142
{ .compatible = "microchip,sam9x75-xlcdc" },
143
+
{ .compatible = "microchip,sama7d65-xlcdc" },
143
144
{ /* sentinel */ },
144
145
};
145
146
MODULE_DEVICE_TABLE(of, atmel_hlcdc_match);
+4
-1
drivers/mfd/axp20x.c
+4
-1
drivers/mfd/axp20x.c
···
229
229
regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL),
230
230
regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL),
231
231
regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL),
232
+
regmap_reg_range(AXP717_TYPEC_CC_AA_EN, AXP717_TYPEC_CC_AA_EN),
233
+
regmap_reg_range(AXP717_TYPEC_CC_MODE_CONTROL, AXP717_TYPEC_CC_MODE_CONTROL),
232
234
};
233
235
234
236
static const struct regmap_range axp717_volatile_ranges[] = {
···
239
237
regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA),
240
238
regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L),
241
239
regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L),
240
+
regmap_reg_range(AXP717_TYPEC_CC_STATUS, AXP717_TYPEC_CC_STATUS),
242
241
};
243
242
244
243
static const struct regmap_access_table axp717_writeable_table = {
···
461
458
.val_bits = 8,
462
459
.wr_table = &axp717_writeable_table,
463
460
.volatile_table = &axp717_volatile_table,
464
-
.max_register = AXP717_ADC_DATA_L,
461
+
.max_register = AXP717_TYPEC_CC_STATUS,
465
462
.cache_type = REGCACHE_MAPLE,
466
463
};
467
464
+1
drivers/mfd/cgbc-core.c
+1
drivers/mfd/cgbc-core.c
+1
-1
drivers/mfd/da9052-spi.c
+1
-1
drivers/mfd/da9052-spi.c
+13
drivers/mfd/intel-lpss-pci.c
+13
drivers/mfd/intel-lpss-pci.c
···
437
437
{ PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_spi_info },
438
438
{ PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_spi_info },
439
439
{ PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
440
+
/* NVL-S */
441
+
{ PCI_VDEVICE(INTEL, 0x6e28), (kernel_ulong_t)&bxt_uart_info },
442
+
{ PCI_VDEVICE(INTEL, 0x6e29), (kernel_ulong_t)&bxt_uart_info },
443
+
{ PCI_VDEVICE(INTEL, 0x6e2a), (kernel_ulong_t)&tgl_spi_info },
444
+
{ PCI_VDEVICE(INTEL, 0x6e2b), (kernel_ulong_t)&tgl_spi_info },
445
+
{ PCI_VDEVICE(INTEL, 0x6e4c), (kernel_ulong_t)&ehl_i2c_info },
446
+
{ PCI_VDEVICE(INTEL, 0x6e4d), (kernel_ulong_t)&ehl_i2c_info },
447
+
{ PCI_VDEVICE(INTEL, 0x6e4e), (kernel_ulong_t)&ehl_i2c_info },
448
+
{ PCI_VDEVICE(INTEL, 0x6e4f), (kernel_ulong_t)&ehl_i2c_info },
449
+
{ PCI_VDEVICE(INTEL, 0x6e5c), (kernel_ulong_t)&bxt_uart_info },
450
+
{ PCI_VDEVICE(INTEL, 0x6e5e), (kernel_ulong_t)&tgl_spi_info },
451
+
{ PCI_VDEVICE(INTEL, 0x6e7a), (kernel_ulong_t)&ehl_i2c_info },
452
+
{ PCI_VDEVICE(INTEL, 0x6e7b), (kernel_ulong_t)&ehl_i2c_info },
440
453
/* ARL-H */
441
454
{ PCI_VDEVICE(INTEL, 0x7725), (kernel_ulong_t)&bxt_uart_info },
442
455
{ PCI_VDEVICE(INTEL, 0x7726), (kernel_ulong_t)&bxt_uart_info },
+10
-28
drivers/mfd/ls2k-bmc-core.c
+10
-28
drivers/mfd/ls2k-bmc-core.c
···
464
464
resource_size_t base;
465
465
int ret;
466
466
467
-
ret = pci_enable_device(dev);
467
+
ret = pcim_enable_device(dev);
468
468
if (ret)
469
469
return ret;
470
470
471
471
ddata = devm_kzalloc(&dev->dev, sizeof(*ddata), GFP_KERNEL);
472
-
if (!ddata) {
473
-
ret = -ENOMEM;
474
-
goto disable_pci;
475
-
}
472
+
if (!ddata)
473
+
return -ENOMEM;
476
474
477
475
ddata->dev = &dev->dev;
478
476
479
477
ret = ls2k_bmc_init(ddata);
480
478
if (ret)
481
-
goto disable_pci;
479
+
return ret;
482
480
483
481
ret = ls2k_bmc_parse_mode(dev, &pd);
484
482
if (ret)
485
-
goto disable_pci;
483
+
return ret;
486
484
487
485
ls2k_bmc_cells[LS2K_BMC_DISPLAY].platform_data = &pd;
488
486
ls2k_bmc_cells[LS2K_BMC_DISPLAY].pdata_size = sizeof(pd);
489
-
base = dev->resource[0].start + LS2K_DISPLAY_RES_START;
487
+
base = pci_resource_start(dev, 0) + LS2K_DISPLAY_RES_START;
490
488
491
489
/* Remove conflicting efifb device */
492
490
ret = aperture_remove_conflicting_devices(base, SZ_4M, "simple-framebuffer");
493
-
if (ret) {
494
-
dev_err(&dev->dev, "Failed to removed firmware framebuffers: %d\n", ret);
495
-
goto disable_pci;
496
-
}
497
-
498
-
ret = devm_mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO,
499
-
ls2k_bmc_cells, ARRAY_SIZE(ls2k_bmc_cells),
500
-
&dev->resource[0], 0, NULL);
501
491
if (ret)
502
-
goto disable_pci;
492
+
return dev_err_probe(&dev->dev, ret, "Failed to removed firmware framebuffers\n");
503
493
504
-
return 0;
505
-
506
-
disable_pci:
507
-
pci_disable_device(dev);
508
-
return ret;
509
-
}
510
-
511
-
static void ls2k_bmc_remove(struct pci_dev *dev)
512
-
{
513
-
pci_disable_device(dev);
494
+
return devm_mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO,
495
+
ls2k_bmc_cells, ARRAY_SIZE(ls2k_bmc_cells),
496
+
pci_resource_n(dev, 0), 0, NULL);
514
497
}
515
498
516
499
static struct pci_device_id ls2k_bmc_devices[] = {
···
506
523
.name = "ls2k-bmc",
507
524
.id_table = ls2k_bmc_devices,
508
525
.probe = ls2k_bmc_probe,
509
-
.remove = ls2k_bmc_remove,
510
526
};
511
527
module_pci_driver(ls2k_bmc_driver);
512
528
+4
drivers/mfd/macsmc.c
+4
drivers/mfd/macsmc.c
···
45
45
#define SMC_TIMEOUT_MS 500
46
46
47
47
static const struct mfd_cell apple_smc_devs[] = {
48
+
MFD_CELL_NAME("macsmc-input"),
48
49
MFD_CELL_OF("macsmc-gpio", NULL, NULL, 0, 0, "apple,smc-gpio"),
50
+
MFD_CELL_OF("macsmc-hwmon", NULL, NULL, 0, 0, "apple,smc-hwmon"),
49
51
MFD_CELL_OF("macsmc-reboot", NULL, NULL, 0, 0, "apple,smc-reboot"),
52
+
MFD_CELL_OF("macsmc-rtc", NULL, NULL, 0, 0, "apple,smc-rtc"),
50
53
};
51
54
52
55
static int apple_smc_cmd_locked(struct apple_smc *smc, u64 cmd, u64 arg,
···
416
413
if (!smc)
417
414
return -ENOMEM;
418
415
416
+
mutex_init(&smc->mutex);
419
417
smc->dev = &pdev->dev;
420
418
smc->sram_base = devm_platform_get_and_ioremap_resource(pdev, 1, &smc->sram);
421
419
if (IS_ERR(smc->sram_base))
+1
-11
drivers/mfd/max77759.c
+1
-11
drivers/mfd/max77759.c
···
587
587
static int max77759_probe(struct i2c_client *client)
588
588
{
589
589
struct regmap_irq_chip_data *irq_chip_data_pmic;
590
-
struct irq_data *irq_data;
591
590
struct max77759 *max77759;
592
-
unsigned long irq_flags;
593
591
unsigned int pmic_id;
594
592
int ret;
595
593
···
626
628
return ret;
627
629
}
628
630
629
-
irq_data = irq_get_irq_data(client->irq);
630
-
if (!irq_data)
631
-
return dev_err_probe(&client->dev, -EINVAL,
632
-
"invalid IRQ: %d\n", client->irq);
633
-
634
-
irq_flags = IRQF_ONESHOT | IRQF_SHARED;
635
-
irq_flags |= irqd_get_trigger_type(irq_data);
636
-
637
631
ret = devm_regmap_add_irq_chip(&client->dev, max77759->regmap_top,
638
-
client->irq, irq_flags, 0,
632
+
client->irq, IRQF_ONESHOT | IRQF_SHARED, 0,
639
633
&max77759_pmic_irq_chip,
640
634
&irq_chip_data_pmic);
641
635
if (ret)
+24
-21
drivers/mfd/mfd-core.c
+24
-21
drivers/mfd/mfd-core.c
···
22
22
#include <linux/regulator/consumer.h>
23
23
24
24
static LIST_HEAD(mfd_of_node_list);
25
+
static DEFINE_MUTEX(mfd_of_node_mutex);
25
26
26
27
struct mfd_of_node_entry {
27
28
struct list_head list;
···
101
100
struct device_node *np,
102
101
const struct mfd_cell *cell)
103
102
{
104
-
#if IS_ENABLED(CONFIG_OF)
105
103
struct mfd_of_node_entry *of_entry;
106
104
u64 of_node_addr;
107
105
108
106
/* Skip if OF node has previously been allocated to a device */
109
-
list_for_each_entry(of_entry, &mfd_of_node_list, list)
110
-
if (of_entry->np == np)
111
-
return -EAGAIN;
107
+
scoped_guard(mutex, &mfd_of_node_mutex) {
108
+
list_for_each_entry(of_entry, &mfd_of_node_list, list)
109
+
if (of_entry->np == np)
110
+
return -EAGAIN;
111
+
}
112
112
113
113
if (!cell->use_of_reg)
114
114
/* No of_reg defined - allocate first free compatible match */
···
130
128
return -ENOMEM;
131
129
132
130
of_entry->dev = &pdev->dev;
133
-
of_entry->np = np;
134
-
list_add_tail(&of_entry->list, &mfd_of_node_list);
131
+
of_entry->np = of_node_get(np);
132
+
scoped_guard(mutex, &mfd_of_node_mutex)
133
+
list_add_tail(&of_entry->list, &mfd_of_node_list);
135
134
136
-
of_node_get(np);
137
135
device_set_node(&pdev->dev, of_fwnode_handle(np));
138
-
#endif
139
136
return 0;
140
137
}
141
138
···
145
144
{
146
145
struct resource *res;
147
146
struct platform_device *pdev;
148
-
struct device_node *np = NULL;
149
147
struct mfd_of_node_entry *of_entry, *tmp;
150
148
bool disabled = false;
151
149
int ret = -ENOMEM;
···
182
182
goto fail_res;
183
183
184
184
if (IS_ENABLED(CONFIG_OF) && parent->of_node && cell->of_compatible) {
185
-
for_each_child_of_node(parent->of_node, np) {
185
+
for_each_child_of_node_scoped(parent->of_node, np) {
186
186
if (of_device_is_compatible(np, cell->of_compatible)) {
187
187
/* Skip 'disabled' devices */
188
188
if (!of_device_is_available(np)) {
···
193
193
ret = mfd_match_of_node_to_dev(pdev, np, cell);
194
194
if (ret == -EAGAIN)
195
195
continue;
196
-
of_node_put(np);
197
196
if (ret)
198
197
goto fail_alias;
199
198
···
285
286
if (cell->swnode)
286
287
device_remove_software_node(&pdev->dev);
287
288
fail_of_entry:
288
-
list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list)
289
-
if (of_entry->dev == &pdev->dev) {
290
-
list_del(&of_entry->list);
291
-
kfree(of_entry);
292
-
}
289
+
scoped_guard(mutex, &mfd_of_node_mutex) {
290
+
list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list)
291
+
if (of_entry->dev == &pdev->dev) {
292
+
list_del(&of_entry->list);
293
+
kfree(of_entry);
294
+
}
295
+
}
293
296
fail_alias:
294
297
regulator_bulk_unregister_supply_alias(&pdev->dev,
295
298
cell->parent_supplies,
···
361
360
if (cell->swnode)
362
361
device_remove_software_node(&pdev->dev);
363
362
364
-
list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list)
365
-
if (of_entry->dev == &pdev->dev) {
366
-
list_del(&of_entry->list);
367
-
kfree(of_entry);
368
-
}
363
+
scoped_guard(mutex, &mfd_of_node_mutex) {
364
+
list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list)
365
+
if (of_entry->dev == &pdev->dev) {
366
+
list_del(&of_entry->list);
367
+
kfree(of_entry);
368
+
}
369
+
}
369
370
370
371
regulator_bulk_unregister_supply_alias(dev, cell->parent_supplies,
371
372
cell->num_parent_supplies);
+4
-2
drivers/mfd/omap-usb-host.c
+4
-2
drivers/mfd/omap-usb-host.c
···
819
819
{
820
820
pm_runtime_disable(&pdev->dev);
821
821
822
-
/* remove children */
823
-
device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child);
822
+
if (pdev->dev.of_node)
823
+
of_platform_depopulate(&pdev->dev);
824
+
else
825
+
device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child);
824
826
}
825
827
826
828
static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
+1
-7
drivers/mfd/qcom-pm8xxx.c
+1
-7
drivers/mfd/qcom-pm8xxx.c
···
577
577
return rc;
578
578
}
579
579
580
-
static int pm8xxx_remove_child(struct device *dev, void *unused)
581
-
{
582
-
platform_device_unregister(to_platform_device(dev));
583
-
return 0;
584
-
}
585
-
586
580
static void pm8xxx_remove(struct platform_device *pdev)
587
581
{
588
582
struct pm_irq_chip *chip = platform_get_drvdata(pdev);
589
583
590
-
device_for_each_child(&pdev->dev, NULL, pm8xxx_remove_child);
584
+
of_platform_depopulate(&pdev->dev);
591
585
irq_domain_remove(chip->irqdomain);
592
586
}
593
587
+9
drivers/mfd/qnap-mcu.c
+9
drivers/mfd/qnap-mcu.c
···
316
316
return NOTIFY_DONE;
317
317
}
318
318
319
+
static const struct qnap_mcu_variant qnap_ts133_mcu = {
320
+
.baud_rate = 115200,
321
+
.num_drives = 1,
322
+
.fan_pwm_min = 51, /* Specified in original model.conf */
323
+
.fan_pwm_max = 255,
324
+
.usb_led = false,
325
+
};
326
+
319
327
static const struct qnap_mcu_variant qnap_ts233_mcu = {
320
328
.baud_rate = 115200,
321
329
.num_drives = 2,
···
405
397
}
406
398
407
399
static const struct of_device_id qnap_mcu_dt_ids[] = {
400
+
{ .compatible = "qnap,ts133-mcu", .data = &qnap_ts133_mcu },
408
401
{ .compatible = "qnap,ts233-mcu", .data = &qnap_ts233_mcu },
409
402
{ .compatible = "qnap,ts433-mcu", .data = &qnap_ts433_mcu },
410
403
{ /* sentinel */ }
+81
drivers/mfd/rk8xx-core.c
+81
drivers/mfd/rk8xx-core.c
···
37
37
DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
38
38
};
39
39
40
+
static const struct resource rk801_key_resources[] = {
41
+
DEFINE_RES_IRQ(RK801_IRQ_PWRON_FALL),
42
+
DEFINE_RES_IRQ(RK801_IRQ_PWRON_RISE),
43
+
};
44
+
40
45
static const struct resource rk805_key_resources[] = {
41
46
DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
42
47
DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
···
60
55
static const struct resource rk817_charger_resources[] = {
61
56
DEFINE_RES_IRQ(RK817_IRQ_PLUG_IN),
62
57
DEFINE_RES_IRQ(RK817_IRQ_PLUG_OUT),
58
+
};
59
+
60
+
static const struct mfd_cell rk801s[] = {
61
+
{ .name = "rk808-regulator", },
62
+
{ .name = "rk805-pwrkey",
63
+
.num_resources = ARRAY_SIZE(rk801_key_resources),
64
+
.resources = &rk801_key_resources[0],
65
+
},
63
66
};
64
67
65
68
static const struct mfd_cell rk805s[] = {
···
150
137
.num_resources = ARRAY_SIZE(rtc_resources),
151
138
.resources = rtc_resources,
152
139
},
140
+
};
141
+
142
+
static const struct rk808_reg_data rk801_pre_init_reg[] = {
143
+
{ RK801_SLEEP_CFG_REG, RK801_SLEEP_FUN_MSK, RK801_NONE_FUN },
144
+
{ RK801_SYS_CFG2_REG, RK801_RST_MSK, RK801_RST_RESTART_REG_RESETB },
145
+
{ RK801_INT_CONFIG_REG, RK801_INT_POL_MSK, RK801_INT_ACT_L },
146
+
{ RK801_POWER_FPWM_EN_REG, RK801_PLDO_HRDEC_EN, RK801_PLDO_HRDEC_EN },
147
+
{ RK801_BUCK_DEBUG5_REG, MASK_ALL, 0x54 },
148
+
{ RK801_CON_BACK1_REG, MASK_ALL, 0x18 },
153
149
};
154
150
155
151
static const struct rk808_reg_data rk805_pre_init_reg[] = {
···
304
282
{ RK818_H5V_EN_REG, BIT(0), RK818_H5V_EN },
305
283
{ RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
306
284
VB_LO_SEL_3500MV },
285
+
};
286
+
287
+
static const struct regmap_irq rk801_irqs[] = {
288
+
[RK801_IRQ_PWRON_FALL] = {
289
+
.mask = RK801_IRQ_PWRON_FALL_MSK,
290
+
.reg_offset = 0,
291
+
},
292
+
[RK801_IRQ_PWRON_RISE] = {
293
+
.mask = RK801_IRQ_PWRON_RISE_MSK,
294
+
.reg_offset = 0,
295
+
},
296
+
[RK801_IRQ_PWRON] = {
297
+
.mask = RK801_IRQ_PWRON_MSK,
298
+
.reg_offset = 0,
299
+
},
300
+
[RK801_IRQ_PWRON_LP] = {
301
+
.mask = RK801_IRQ_PWRON_LP_MSK,
302
+
.reg_offset = 0,
303
+
},
304
+
[RK801_IRQ_HOTDIE] = {
305
+
.mask = RK801_IRQ_HOTDIE_MSK,
306
+
.reg_offset = 0,
307
+
},
308
+
[RK801_IRQ_VDC_RISE] = {
309
+
.mask = RK801_IRQ_VDC_RISE_MSK,
310
+
.reg_offset = 0,
311
+
},
312
+
[RK801_IRQ_VDC_FALL] = {
313
+
.mask = RK801_IRQ_VDC_FALL_MSK,
314
+
.reg_offset = 0,
315
+
},
307
316
};
308
317
309
318
static const struct regmap_irq rk805_irqs[] = {
···
585
532
REGMAP_IRQ_REG_LINE(23, 8)
586
533
};
587
534
535
+
static const struct regmap_irq_chip rk801_irq_chip = {
536
+
.name = "rk801",
537
+
.irqs = rk801_irqs,
538
+
.num_irqs = ARRAY_SIZE(rk801_irqs),
539
+
.num_regs = 1,
540
+
.status_base = RK801_INT_STS0_REG,
541
+
.mask_base = RK801_INT_MASK0_REG,
542
+
.ack_base = RK801_INT_STS0_REG,
543
+
.init_ack_masked = true,
544
+
};
545
+
588
546
static const struct regmap_irq_chip rk805_irq_chip = {
589
547
.name = "rk805",
590
548
.irqs = rk805_irqs,
···
674
610
unsigned int reg, bit;
675
611
676
612
switch (rk808->variant) {
613
+
case RK801_ID:
614
+
reg = RK801_SYS_CFG2_REG;
615
+
bit = DEV_OFF;
616
+
break;
677
617
case RK805_ID:
678
618
reg = RK805_DEV_CTRL_REG;
679
619
bit = DEV_OFF;
···
782
714
dev_set_drvdata(dev, rk808);
783
715
784
716
switch (rk808->variant) {
717
+
case RK801_ID:
718
+
rk808->regmap_irq_chip = &rk801_irq_chip;
719
+
pre_init_reg = rk801_pre_init_reg;
720
+
nr_pre_init_regs = ARRAY_SIZE(rk801_pre_init_reg);
721
+
cells = rk801s;
722
+
nr_cells = ARRAY_SIZE(rk801s);
723
+
break;
785
724
case RK805_ID:
786
725
rk808->regmap_irq_chip = &rk805_irq_chip;
787
726
pre_init_reg = rk805_pre_init_reg;
···
906
831
int ret = 0;
907
832
908
833
switch (rk808->variant) {
834
+
case RK801_ID:
835
+
ret = regmap_update_bits(rk808->regmap,
836
+
RK801_SLEEP_CFG_REG,
837
+
RK801_SLEEP_FUN_MSK,
838
+
RK801_SLEEP_FUN);
839
+
break;
909
840
case RK805_ID:
910
841
ret = regmap_update_bits(rk808->regmap,
911
842
RK805_GPIO_IO_POL_REG,
+32
-1
drivers/mfd/rk8xx-i2c.c
+32
-1
drivers/mfd/rk8xx-i2c.c
···
1
1
// SPDX-License-Identifier: GPL-2.0-only
2
2
/*
3
-
* Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
3
+
* Rockchip RK801/RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
4
4
*
5
5
* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6
6
* Copyright (C) 2016 PHYTEC Messtechnik GmbH
···
20
20
const struct regmap_config *regmap_cfg;
21
21
int variant;
22
22
};
23
+
24
+
static bool rk801_is_volatile_reg(struct device *dev, unsigned int reg)
25
+
{
26
+
switch (reg) {
27
+
case RK801_SYS_STS_REG:
28
+
case RK801_INT_STS0_REG:
29
+
case RK801_SYS_CFG0_REG:
30
+
case RK801_SYS_CFG1_REG:
31
+
case RK801_SYS_CFG2_REG:
32
+
case RK801_SYS_CFG3_REG:
33
+
case RK801_SYS_CFG4_REG:
34
+
case RK801_SLEEP_CFG_REG:
35
+
return true;
36
+
}
37
+
38
+
return false;
39
+
}
23
40
24
41
static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg)
25
42
{
···
141
124
.volatile_reg = rk808_is_volatile_reg,
142
125
};
143
126
127
+
static const struct regmap_config rk801_regmap_config = {
128
+
.reg_bits = 8,
129
+
.val_bits = 8,
130
+
.max_register = RK801_SYS_CFG3_OTP_REG,
131
+
.cache_type = REGCACHE_RBTREE,
132
+
.volatile_reg = rk801_is_volatile_reg,
133
+
};
134
+
144
135
static const struct regmap_config rk805_regmap_config = {
145
136
.reg_bits = 8,
146
137
.val_bits = 8,
···
187
162
.max_register = RK817_GPIO_INT_CFG,
188
163
.cache_type = REGCACHE_NONE,
189
164
.volatile_reg = rk817_is_volatile_reg,
165
+
};
166
+
167
+
static const struct rk8xx_i2c_platform_data rk801_data = {
168
+
.regmap_cfg = &rk801_regmap_config,
169
+
.variant = RK801_ID,
190
170
};
191
171
192
172
static const struct rk8xx_i2c_platform_data rk805_data = {
···
254
224
static SIMPLE_DEV_PM_OPS(rk8xx_i2c_pm_ops, rk8xx_suspend, rk8xx_resume);
255
225
256
226
static const struct of_device_id rk8xx_i2c_of_match[] = {
227
+
{ .compatible = "rockchip,rk801", .data = &rk801_data },
257
228
{ .compatible = "rockchip,rk805", .data = &rk805_data },
258
229
{ .compatible = "rockchip,rk806", .data = &rk806_data },
259
230
{ .compatible = "rockchip,rk808", .data = &rk808_data },
+1
drivers/mfd/sec-irq.c
+1
drivers/mfd/sec-irq.c
+1
drivers/mfd/simple-mfd-i2c.c
+1
drivers/mfd/simple-mfd-i2c.c
+9
drivers/mfd/tps65219.c
+9
drivers/mfd/tps65219.c
···
498
498
return ret;
499
499
}
500
500
501
+
if (chip_id == TPS65214) {
502
+
ret = i2c_smbus_write_byte_data(client, TPS65214_REG_LOCK,
503
+
TPS65214_LOCK_ACCESS_CMD);
504
+
if (ret) {
505
+
dev_err(tps->dev, "Failed to unlock registers %d\n", ret);
506
+
return ret;
507
+
}
508
+
}
509
+
501
510
ret = devm_regmap_add_irq_chip(tps->dev, tps->regmap, client->irq,
502
511
IRQF_ONESHOT, 0, pmic->irq_chip,
503
512
&tps->irq_data);
+243
drivers/regulator/rk808-regulator.c
+243
drivers/regulator/rk808-regulator.c
···
24
24
#include <linux/gpio/consumer.h>
25
25
26
26
/* Field definitions */
27
+
#define RK801_BUCK_VSEL_MASK 0x7f
28
+
#define RK801_LDO_VSEL_MASK 0x3f
29
+
27
30
#define RK808_BUCK_VSEL_MASK 0x3f
28
31
#define RK808_BUCK4_VSEL_MASK 0xf
29
32
#define RK808_LDO_VSEL_MASK 0x1f
···
161
158
RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
162
159
_vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops)
163
160
161
+
#define RK801_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \
162
+
_vmask, _ereg, _emask, _disval, _etime) \
163
+
RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
164
+
_vmask, _ereg, _emask, _emask, _disval, _etime, &rk801_reg_ops)
165
+
164
166
#define RK816_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \
165
167
_vmask, _ereg, _emask, _disval, _etime) \
166
168
RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
···
192
184
.owner = THIS_MODULE, \
193
185
.ops = _ops \
194
186
}
187
+
188
+
#define RK801_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \
189
+
_disval) \
190
+
RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \
191
+
_emask, _disval, &rk801_switch_ops)
195
192
196
193
#define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \
197
194
_disval) \
···
815
802
}
816
803
}
817
804
805
+
static unsigned int rk801_get_mode(struct regulator_dev *rdev)
806
+
{
807
+
unsigned int val;
808
+
int err;
809
+
810
+
err = regmap_read(rdev->regmap, RK801_POWER_FPWM_EN_REG, &val);
811
+
if (err)
812
+
return err;
813
+
814
+
if (val & BIT(rdev->desc->id))
815
+
return REGULATOR_MODE_FAST;
816
+
else
817
+
return REGULATOR_MODE_NORMAL;
818
+
}
819
+
820
+
static int rk801_set_mode(struct regulator_dev *rdev, unsigned int mode)
821
+
{
822
+
unsigned int offset = rdev->desc->id;
823
+
824
+
switch (mode) {
825
+
case REGULATOR_MODE_FAST:
826
+
return regmap_update_bits(rdev->regmap, RK801_POWER_FPWM_EN_REG,
827
+
BIT(offset), RK801_FPWM_MODE << offset);
828
+
case REGULATOR_MODE_NORMAL:
829
+
return regmap_update_bits(rdev->regmap, RK801_POWER_FPWM_EN_REG,
830
+
BIT(offset), RK801_AUTO_PWM_MODE << offset);
831
+
default:
832
+
dev_err(&rdev->dev, "do not support this mode\n");
833
+
return -EINVAL;
834
+
}
835
+
836
+
return 0;
837
+
}
838
+
839
+
static int rk801_set_suspend_voltage(struct regulator_dev *rdev, int uv)
840
+
{
841
+
unsigned int reg;
842
+
int sel;
843
+
844
+
if (rdev->desc->id < RK801_ID_LDO1)
845
+
sel = regulator_map_voltage_linear_range(rdev, uv, uv);
846
+
else
847
+
sel = regulator_map_voltage_linear(rdev, uv, uv);
848
+
if (sel < 0)
849
+
return -EINVAL;
850
+
851
+
reg = rdev->desc->vsel_reg + RK801_SLP_REG_OFFSET;
852
+
853
+
return regmap_update_bits(rdev->regmap, reg,
854
+
rdev->desc->vsel_mask, sel);
855
+
}
856
+
857
+
static int rk801_set_suspend_enable(struct regulator_dev *rdev)
858
+
{
859
+
return regmap_update_bits(rdev->regmap, RK801_POWER_SLP_EN_REG,
860
+
BIT(rdev->desc->id), BIT(rdev->desc->id));
861
+
}
862
+
863
+
static int rk801_set_suspend_disable(struct regulator_dev *rdev)
864
+
{
865
+
return regmap_update_bits(rdev->regmap, RK801_POWER_SLP_EN_REG,
866
+
BIT(rdev->desc->id), 0);
867
+
}
868
+
869
+
static int rk801_set_voltage_time_sel(struct regulator_dev *rdev,
870
+
unsigned int old_selector,
871
+
unsigned int new_selector)
872
+
{
873
+
return regulator_set_voltage_time_sel(rdev, old_selector,
874
+
new_selector) + RK801_HW_SYNC_US;
875
+
}
876
+
877
+
static const struct regulator_ops rk801_buck_ops = {
878
+
.list_voltage = regulator_list_voltage_linear_range,
879
+
.map_voltage = regulator_map_voltage_linear_range,
880
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
881
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
882
+
.set_voltage_time_sel = rk801_set_voltage_time_sel,
883
+
.enable = regulator_enable_regmap,
884
+
.disable = regulator_disable_regmap,
885
+
.is_enabled = regulator_is_enabled_regmap,
886
+
.set_mode = rk801_set_mode,
887
+
.get_mode = rk801_get_mode,
888
+
.set_suspend_voltage = rk801_set_suspend_voltage,
889
+
.set_suspend_enable = rk801_set_suspend_enable,
890
+
.set_suspend_disable = rk801_set_suspend_disable,
891
+
};
892
+
893
+
static const struct regulator_ops rk801_reg_ops = {
894
+
.list_voltage = regulator_list_voltage_linear,
895
+
.map_voltage = regulator_map_voltage_linear,
896
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
897
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
898
+
.enable = regulator_enable_regmap,
899
+
.disable = regulator_disable_regmap,
900
+
.is_enabled = regulator_is_enabled_regmap,
901
+
.set_suspend_voltage = rk801_set_suspend_voltage,
902
+
.set_suspend_enable = rk801_set_suspend_enable,
903
+
.set_suspend_disable = rk801_set_suspend_disable,
904
+
};
905
+
906
+
static const struct regulator_ops rk801_switch_ops = {
907
+
.enable = regulator_enable_regmap,
908
+
.disable = regulator_disable_regmap,
909
+
.is_enabled = regulator_is_enabled_regmap,
910
+
.set_suspend_enable = rk801_set_suspend_enable,
911
+
.set_suspend_disable = rk801_set_suspend_disable,
912
+
};
913
+
818
914
static const struct regulator_ops rk805_reg_ops = {
819
915
.list_voltage = regulator_list_voltage_linear,
820
916
.map_voltage = regulator_map_voltage_linear,
···
1169
1047
.is_enabled = rk8xx_is_enabled_wmsk_regmap,
1170
1048
.set_suspend_enable = rk817_set_suspend_enable,
1171
1049
.set_suspend_disable = rk817_set_suspend_disable,
1050
+
};
1051
+
1052
+
static const struct linear_range rk801_buck1_voltage_ranges[] = {
1053
+
REGULATOR_LINEAR_RANGE(500000, 0, 80, 12500), /* 0.5v - 1.5v */
1054
+
REGULATOR_LINEAR_RANGE(1800000, 81, 82, 400000),/* 1.8v - 2.2v */
1055
+
REGULATOR_LINEAR_RANGE(3300000, 83, 83, 0), /* 3.3v */
1056
+
REGULATOR_LINEAR_RANGE(5000000, 84, 84, 0), /* 5.0v */
1057
+
REGULATOR_LINEAR_RANGE(5250000, 85, 85, 0), /* 5.25v */
1058
+
};
1059
+
1060
+
static const struct linear_range rk801_buck2_voltage_ranges[] = {
1061
+
REGULATOR_LINEAR_RANGE(800000, 0, 2, 50000), /* 0.8v - 0.9v */
1062
+
REGULATOR_LINEAR_RANGE(1800000, 3, 4, 400000), /* 1.8v - 2.2v */
1063
+
REGULATOR_LINEAR_RANGE(3300000, 5, 5, 0), /* 3.3v */
1064
+
REGULATOR_LINEAR_RANGE(5000000, 6, 6, 0), /* 5.0v */
1065
+
REGULATOR_LINEAR_RANGE(5250000, 7, 7, 0), /* 5.25v */
1066
+
};
1067
+
1068
+
static const struct linear_range rk801_buck4_voltage_ranges[] = {
1069
+
REGULATOR_LINEAR_RANGE(500000, 0, 80, 12500), /* 0.5v - 1.5v */
1070
+
REGULATOR_LINEAR_RANGE(1800000, 81, 82, 400000),/* 1.8v - 2.2v */
1071
+
REGULATOR_LINEAR_RANGE(2500000, 83, 83, 0), /* 2.5v */
1072
+
REGULATOR_LINEAR_RANGE(2800000, 84, 84, 0), /* 2.8v */
1073
+
REGULATOR_LINEAR_RANGE(3000000, 85, 85, 0), /* 3.0v */
1074
+
REGULATOR_LINEAR_RANGE(3300000, 86, 86, 0), /* 3.3v */
1075
+
};
1076
+
1077
+
static const struct regulator_desc rk801_reg[] = {
1078
+
{
1079
+
.name = "dcdc1",
1080
+
.supply_name = "vcc1",
1081
+
.of_match = of_match_ptr("dcdc1"),
1082
+
.regulators_node = of_match_ptr("regulators"),
1083
+
.id = RK801_ID_DCDC1,
1084
+
.ops = &rk801_buck_ops,
1085
+
.type = REGULATOR_VOLTAGE,
1086
+
.n_voltages = 86,
1087
+
.linear_ranges = rk801_buck1_voltage_ranges,
1088
+
.n_linear_ranges = ARRAY_SIZE(rk801_buck1_voltage_ranges),
1089
+
.vsel_reg = RK801_BUCK1_ON_VSEL_REG,
1090
+
.vsel_mask = RK801_BUCK_VSEL_MASK,
1091
+
.enable_reg = RK801_POWER_EN0_REG,
1092
+
.enable_mask = ENABLE_MASK(RK801_ID_DCDC1),
1093
+
.enable_val = ENABLE_MASK(RK801_ID_DCDC1),
1094
+
.disable_val = DISABLE_VAL(RK801_ID_DCDC1),
1095
+
.ramp_delay = 1000,
1096
+
.of_map_mode = rk8xx_regulator_of_map_mode,
1097
+
.enable_time = 400,
1098
+
.owner = THIS_MODULE,
1099
+
}, {
1100
+
.name = "dcdc2",
1101
+
.supply_name = "vcc2",
1102
+
.of_match = of_match_ptr("dcdc2"),
1103
+
.regulators_node = of_match_ptr("regulators"),
1104
+
.id = RK801_ID_DCDC2,
1105
+
.ops = &rk801_buck_ops,
1106
+
.type = REGULATOR_VOLTAGE,
1107
+
.n_voltages = 8,
1108
+
.linear_ranges = rk801_buck2_voltage_ranges,
1109
+
.n_linear_ranges = ARRAY_SIZE(rk801_buck2_voltage_ranges),
1110
+
.vsel_reg = RK801_BUCK2_ON_VSEL_REG,
1111
+
.vsel_mask = RK801_BUCK_VSEL_MASK,
1112
+
.enable_reg = RK801_POWER_EN0_REG,
1113
+
.enable_mask = ENABLE_MASK(RK801_ID_DCDC2),
1114
+
.enable_val = ENABLE_MASK(RK801_ID_DCDC2),
1115
+
.disable_val = DISABLE_VAL(RK801_ID_DCDC2),
1116
+
.ramp_delay = 1000,
1117
+
.of_map_mode = rk8xx_regulator_of_map_mode,
1118
+
.enable_time = 400,
1119
+
.owner = THIS_MODULE,
1120
+
}, {
1121
+
.name = "dcdc3",
1122
+
.supply_name = "vcc3",
1123
+
.of_match = of_match_ptr("dcdc3"),
1124
+
.regulators_node = of_match_ptr("regulators"),
1125
+
.id = RK801_ID_DCDC3,
1126
+
.ops = &rk801_switch_ops,
1127
+
.type = REGULATOR_VOLTAGE,
1128
+
.n_voltages = 1,
1129
+
.enable_reg = RK801_POWER_EN0_REG,
1130
+
.enable_mask = ENABLE_MASK(RK801_ID_DCDC3),
1131
+
.enable_val = ENABLE_MASK(RK801_ID_DCDC3),
1132
+
.disable_val = DISABLE_VAL(RK801_ID_DCDC3),
1133
+
.of_map_mode = rk8xx_regulator_of_map_mode,
1134
+
.enable_time = 400,
1135
+
.owner = THIS_MODULE,
1136
+
}, {
1137
+
.name = "dcdc4",
1138
+
.supply_name = "vcc4",
1139
+
.of_match = of_match_ptr("dcdc4"),
1140
+
.regulators_node = of_match_ptr("regulators"),
1141
+
.id = RK801_ID_DCDC4,
1142
+
.ops = &rk801_buck_ops,
1143
+
.type = REGULATOR_VOLTAGE,
1144
+
.n_voltages = 87,
1145
+
.linear_ranges = rk801_buck4_voltage_ranges,
1146
+
.n_linear_ranges = ARRAY_SIZE(rk801_buck4_voltage_ranges),
1147
+
.vsel_reg = RK801_BUCK4_ON_VSEL_REG,
1148
+
.vsel_mask = RK801_BUCK_VSEL_MASK,
1149
+
.enable_reg = RK801_POWER_EN0_REG,
1150
+
.enable_mask = ENABLE_MASK(RK801_ID_DCDC4),
1151
+
.enable_val = ENABLE_MASK(RK801_ID_DCDC4),
1152
+
.disable_val = DISABLE_VAL(RK801_ID_DCDC4),
1153
+
.ramp_delay = 1000,
1154
+
.of_map_mode = rk8xx_regulator_of_map_mode,
1155
+
.enable_time = 400,
1156
+
.owner = THIS_MODULE,
1157
+
},
1158
+
1159
+
RK801_DESC(RK801_ID_LDO1, "ldo1", "vcc5", 500, 3400, 50,
1160
+
RK801_LDO1_ON_VSEL_REG, RK801_LDO_VSEL_MASK, RK801_POWER_EN1_REG,
1161
+
ENABLE_MASK(0), DISABLE_VAL(0), 400),
1162
+
RK801_DESC(RK801_ID_LDO2, "ldo2", "vcc6", 500, 3400, 50,
1163
+
RK801_LDO2_ON_VSEL_REG, RK801_LDO_VSEL_MASK, RK801_POWER_EN1_REG,
1164
+
ENABLE_MASK(1), DISABLE_VAL(1), 400),
1165
+
RK801_DESC_SWITCH(RK801_ID_SWITCH, "switch", "vcc7", RK801_POWER_EN1_REG,
1166
+
ENABLE_MASK(2), DISABLE_VAL(2)),
1172
1167
};
1173
1168
1174
1169
static const struct regulator_desc rk805_reg[] = {
···
2126
1887
return -ENOMEM;
2127
1888
2128
1889
switch (rk808->variant) {
1890
+
case RK801_ID:
1891
+
regulators = rk801_reg;
1892
+
nregulators = RK801_NUM_REGULATORS;
1893
+
break;
2129
1894
case RK805_ID:
2130
1895
regulators = rk805_reg;
2131
1896
nregulators = RK805_NUM_REGULATORS;
+3
include/linux/mfd/axp20x.h
+3
include/linux/mfd/axp20x.h
···
174
174
#define AXP717_ADC_DATA_SEL 0xcd
175
175
#define AXP717_ADC_DATA_H 0xce
176
176
#define AXP717_ADC_DATA_L 0xcf
177
+
#define AXP717_TYPEC_CC_AA_EN 0xe1
178
+
#define AXP717_TYPEC_CC_MODE_CONTROL 0xe3
179
+
#define AXP717_TYPEC_CC_STATUS 0xe7
177
180
178
181
#define AXP806_STARTUP_SRC 0x00
179
182
#define AXP806_CHIP_ID 0x03
+118
include/linux/mfd/rk808.h
+118
include/linux/mfd/rk808.h
···
340
340
#define RK818_USB_ILMIN_2000MA 0x7
341
341
#define RK818_USB_CHG_SD_VSEL_MASK 0x70
342
342
343
+
/* RK801 */
344
+
enum rk801_reg {
345
+
RK801_ID_DCDC1,
346
+
RK801_ID_DCDC2,
347
+
RK801_ID_DCDC4,
348
+
RK801_ID_DCDC3,
349
+
RK801_ID_LDO1,
350
+
RK801_ID_LDO2,
351
+
RK801_ID_SWITCH,
352
+
RK801_ID_MAX,
353
+
};
354
+
355
+
#define RK801_SLP_REG_OFFSET 5
356
+
#define RK801_NUM_REGULATORS 7
357
+
358
+
#define RK801_HW_SYNC_US 32
359
+
360
+
/* RK801 Register Definitions */
361
+
#define RK801_ID_MSB 0x00
362
+
#define RK801_ID_LSB 0x01
363
+
#define RK801_OTP_VER_REG 0x02
364
+
#define RK801_POWER_EN0_REG 0x03
365
+
#define RK801_POWER_EN1_REG 0x04
366
+
#define RK801_POWER_SLP_EN_REG 0x05
367
+
#define RK801_POWER_FPWM_EN_REG 0x06
368
+
#define RK801_SLP_LP_CONFIG_REG 0x07
369
+
#define RK801_BUCK_CONFIG_REG 0x08
370
+
#define RK801_BUCK1_ON_VSEL_REG 0x09
371
+
#define RK801_BUCK2_ON_VSEL_REG 0x0a
372
+
#define RK801_BUCK4_ON_VSEL_REG 0x0b
373
+
#define RK801_LDO1_ON_VSEL_REG 0x0c
374
+
#define RK801_LDO2_ON_VSEL_REG 0x0d
375
+
#define RK801_BUCK1_SLP_VSEL_REG 0x0e
376
+
#define RK801_BUCK2_SLP_VSEL_REG 0x0f
377
+
#define RK801_BUCK4_SLP_VSEL_REG 0x10
378
+
#define RK801_LDO1_SLP_VSEL_REG 0x11
379
+
#define RK801_LDO2_SLP_VSEL_REG 0x12
380
+
#define RK801_LDO_SW_IMAX_REG 0x13
381
+
#define RK801_SYS_STS_REG 0x14
382
+
#define RK801_SYS_CFG0_REG 0x15
383
+
#define RK801_SYS_CFG1_REG 0x16
384
+
#define RK801_SYS_CFG2_REG 0x17
385
+
#define RK801_SYS_CFG3_REG 0x18
386
+
#define RK801_SYS_CFG4_REG 0x19
387
+
#define RK801_SLEEP_CFG_REG 0x1a
388
+
#define RK801_ON_SOURCE_REG 0x1b
389
+
#define RK801_OFF_SOURCE_REG 0x1c
390
+
#define RK801_PWRON_KEY_REG 0x1d
391
+
#define RK801_INT_STS0_REG 0x1e
392
+
#define RK801_INT_MASK0_REG 0x1f
393
+
#define RK801_INT_CONFIG_REG 0x20
394
+
#define RK801_CON_BACK1_REG 0x21
395
+
#define RK801_CON_BACK2_REG 0x22
396
+
#define RK801_DATA_CON0_REG 0x23
397
+
#define RK801_DATA_CON1_REG 0x24
398
+
#define RK801_DATA_CON2_REG 0x25
399
+
#define RK801_DATA_CON3_REG 0x26
400
+
#define RK801_POWER_EXIT_SLP_SEQ0_REG 0x27
401
+
#define RK801_POWER_EXIT_SLP_SEQ1_REG 0x28
402
+
#define RK801_POWER_EXIT_SLP_SEQ2_REG 0x29
403
+
#define RK801_POWER_EXIT_SLP_SEQ3_REG 0x2a
404
+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ0_REG 0x2b
405
+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ1_REG 0x2c
406
+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ2_REG 0x2d
407
+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ3_REG 0x2e
408
+
#define RK801_BUCK_DEBUG1_REG 0x2f
409
+
#define RK801_BUCK_DEBUG2_REG 0x30
410
+
#define RK801_BUCK_DEBUG3_REG 0x31
411
+
#define RK801_BUCK_DEBUG4_REG 0x32
412
+
#define RK801_BUCK_DEBUG5_REG 0x33
413
+
#define RK801_BUCK_DEBUG7_REG 0x34
414
+
#define RK801_OTP_EN_CON_REG 0x35
415
+
#define RK801_TEST_CON_REG 0x36
416
+
#define RK801_EFUSE_CONTROL_REG 0x37
417
+
#define RK801_SYS_CFG3_OTP_REG 0x38
418
+
419
+
/* RK801 IRQ Definitions */
420
+
#define RK801_IRQ_PWRON_FALL 0
421
+
#define RK801_IRQ_PWRON_RISE 1
422
+
#define RK801_IRQ_PWRON 2
423
+
#define RK801_IRQ_PWRON_LP 3
424
+
#define RK801_IRQ_HOTDIE 4
425
+
#define RK801_IRQ_VDC_RISE 5
426
+
#define RK801_IRQ_VDC_FALL 6
427
+
#define RK801_IRQ_PWRON_FALL_MSK BIT(0)
428
+
#define RK801_IRQ_PWRON_RISE_MSK BIT(1)
429
+
#define RK801_IRQ_PWRON_MSK BIT(2)
430
+
#define RK801_IRQ_PWRON_LP_MSK BIT(3)
431
+
#define RK801_IRQ_HOTDIE_MSK BIT(4)
432
+
#define RK801_IRQ_VDC_RISE_MSK BIT(5)
433
+
#define RK801_IRQ_VDC_FALL_MSK BIT(6)
434
+
/* RK801_SLP_LP_CONFIG_REG */
435
+
#define RK801_BUCK_SLP_LP_EN BIT(3)
436
+
#define RK801_PLDO_SLP_LP_EN BIT(1)
437
+
#define RK801_SLP_LP_MASK (RK801_PLDO_SLP_LP_EN | RK801_BUCK_SLP_LP_EN)
438
+
/* RK801_SLEEP_CFG_REG */
439
+
#define RK801_SLEEP_FUN_MSK 0x3
440
+
#define RK801_NONE_FUN 0x0
441
+
#define RK801_SLEEP_FUN 0x1
442
+
#define RK801_SHUTDOWN_FUN 0x2
443
+
#define RK801_RESET_FUN 0x3
444
+
/* RK801_SYS_CFG2_REG */
445
+
#define RK801_SLEEP_POL_MSK BIT(1)
446
+
#define RK801_SLEEP_ACT_H BIT(1)
447
+
#define RK801_SLEEP_ACT_L 0
448
+
#define RK801_RST_MSK (0x3 << 4)
449
+
#define RK801_RST_RESTART_PMU (0x0 << 4)
450
+
#define RK801_RST_RESTART_REG (0x1 << 4)
451
+
#define RK801_RST_RESTART_REG_RESETB (0x2 << 4)
452
+
/* RK801_INT_CONFIG_REG */
453
+
#define RK801_INT_POL_MSK BIT(1)
454
+
#define RK801_INT_ACT_H BIT(1)
455
+
#define RK801_INT_ACT_L 0
456
+
#define RK801_FPWM_MODE 1
457
+
#define RK801_AUTO_PWM_MODE 0
458
+
#define RK801_PLDO_HRDEC_EN BIT(6)
459
+
343
460
/* RK805 */
344
461
enum rk805_reg {
345
462
RK805_ID_DCDC1,
···
1449
1332
};
1450
1333
1451
1334
enum {
1335
+
RK801_ID = 0x8010,
1452
1336
RK805_ID = 0x8050,
1453
1337
RK806_ID = 0x8060,
1454
1338
RK808_ID = 0x0000,
+2
include/linux/mfd/rohm-bd71828.h
+2
include/linux/mfd/rohm-bd71828.h
+3
-2
include/linux/mfd/tps6105x.h
+3
-2
include/linux/mfd/tps6105x.h
···
53
53
/**
54
54
* enum tps6105x_mode - desired mode for the TPS6105x
55
55
* @TPS6105X_MODE_SHUTDOWN: this instance is inactive, not used for anything
56
-
* @TPS61905X_MODE_TORCH: this instance is used as a LED, usually a while
56
+
* @TPS6105X_MODE_TORCH: this instance is used as a LED, usually a while
57
57
* LED, for example as backlight or flashlight. If this is set, the
58
58
* TPS6105X will register to the LED framework
59
59
* @TPS6105X_MODE_TORCH_FLASH: this instance is used as a flashgun, usually
···
82
82
83
83
/**
84
84
* struct tps6105x - state holder for the TPS6105x drivers
85
-
* @i2c_client: corresponding I2C client
85
+
* @pdata: associated platform data
86
+
* @client: corresponding I2C client
86
87
* @regulator: regulator device if used in voltage mode
87
88
* @regmap: used for i2c communcation on accessing registers
88
89
*/
+2
include/linux/mfd/tps65219.h
+2
include/linux/mfd/tps65219.h
···
149
149
#define TPS65215_ENABLE_LDO2_EN_MASK BIT(5)
150
150
#define TPS65214_ENABLE_LDO1_EN_MASK BIT(5)
151
151
#define TPS65219_ENABLE_LDO4_EN_MASK BIT(6)
152
+
/* Register Unlock */
153
+
#define TPS65214_LOCK_ACCESS_CMD 0x5a
152
154
/* power ON-OFF sequence slot */
153
155
#define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0)
154
156
#define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4)