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Merge tag 'mmc-v4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson:
"MMC core:
- Fix unsupported parallel dispatch of requests

MMC host:
- atmel-mci/android-goldfish: Fixup logic of sg_copy_{from,to}_buffer
- renesas_sdhi_internal_dmac: Prevent IRQ-storm due of DMAC IRQs
- renesas_sdhi_internal_dmac: Fixup bad register offset"

* tag 'mmc-v4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: renesas_sdhi_internal_dmac: mask DMAC interrupts
mmc: renesas_sdhi_internal_dmac: fix #define RST_RESERVED_BITS
mmc: block: Fix unsupported parallel dispatch of requests
mmc: android-goldfish: fix bad logic of sg_copy_{from,to}_buffer conversion
mmc: atmel-mci: fix bad logic of sg_copy_{from,to}_buffer conversion

+25 -14
+7 -5
drivers/mmc/core/queue.c
··· 238 238 mmc_exit_request(mq->queue, req); 239 239 } 240 240 241 - /* 242 - * We use BLK_MQ_F_BLOCKING and have only 1 hardware queue, which means requests 243 - * will not be dispatched in parallel. 244 - */ 245 241 static blk_status_t mmc_mq_queue_rq(struct blk_mq_hw_ctx *hctx, 246 242 const struct blk_mq_queue_data *bd) 247 243 { ··· 260 264 261 265 spin_lock_irq(q->queue_lock); 262 266 263 - if (mq->recovery_needed) { 267 + if (mq->recovery_needed || mq->busy) { 264 268 spin_unlock_irq(q->queue_lock); 265 269 return BLK_STS_RESOURCE; 266 270 } ··· 286 290 req->timeout = 600 * HZ; 287 291 break; 288 292 } 293 + 294 + /* Parallel dispatch of requests is not supported at the moment */ 295 + mq->busy = true; 289 296 290 297 mq->in_flight[issue_type] += 1; 291 298 get_card = (mmc_tot_in_flight(mq) == 1); ··· 332 333 mq->in_flight[issue_type] -= 1; 333 334 if (mmc_tot_in_flight(mq) == 0) 334 335 put_card = true; 336 + mq->busy = false; 335 337 spin_unlock_irq(q->queue_lock); 336 338 if (put_card) 337 339 mmc_put_card(card, &mq->ctx); 340 + } else { 341 + WRITE_ONCE(mq->busy, false); 338 342 } 339 343 340 344 return ret;
+1
drivers/mmc/core/queue.h
··· 81 81 unsigned int cqe_busy; 82 82 #define MMC_CQE_DCMD_BUSY BIT(0) 83 83 #define MMC_CQE_QUEUE_FULL BIT(1) 84 + bool busy; 84 85 bool use_cqe; 85 86 bool recovery_needed; 86 87 bool in_recovery;
+2 -2
drivers/mmc/host/android-goldfish.c
··· 217 217 * We don't really have DMA, so we need 218 218 * to copy from our platform driver buffer 219 219 */ 220 - sg_copy_to_buffer(data->sg, 1, host->virt_base, 220 + sg_copy_from_buffer(data->sg, 1, host->virt_base, 221 221 data->sg->length); 222 222 } 223 223 host->data->bytes_xfered += data->sg->length; ··· 393 393 * We don't really have DMA, so we need to copy to our 394 394 * platform driver buffer 395 395 */ 396 - sg_copy_from_buffer(data->sg, 1, host->virt_base, 396 + sg_copy_to_buffer(data->sg, 1, host->virt_base, 397 397 data->sg->length); 398 398 } 399 399 }
+6 -6
drivers/mmc/host/atmel-mci.c
··· 1976 1976 do { 1977 1977 value = atmci_readl(host, ATMCI_RDR); 1978 1978 if (likely(offset + 4 <= sg->length)) { 1979 - sg_pcopy_to_buffer(sg, 1, &value, sizeof(u32), offset); 1979 + sg_pcopy_from_buffer(sg, 1, &value, sizeof(u32), offset); 1980 1980 1981 1981 offset += 4; 1982 1982 nbytes += 4; ··· 1993 1993 } else { 1994 1994 unsigned int remaining = sg->length - offset; 1995 1995 1996 - sg_pcopy_to_buffer(sg, 1, &value, remaining, offset); 1996 + sg_pcopy_from_buffer(sg, 1, &value, remaining, offset); 1997 1997 nbytes += remaining; 1998 1998 1999 1999 flush_dcache_page(sg_page(sg)); ··· 2003 2003 goto done; 2004 2004 2005 2005 offset = 4 - remaining; 2006 - sg_pcopy_to_buffer(sg, 1, (u8 *)&value + remaining, 2006 + sg_pcopy_from_buffer(sg, 1, (u8 *)&value + remaining, 2007 2007 offset, 0); 2008 2008 nbytes += offset; 2009 2009 } ··· 2042 2042 2043 2043 do { 2044 2044 if (likely(offset + 4 <= sg->length)) { 2045 - sg_pcopy_from_buffer(sg, 1, &value, sizeof(u32), offset); 2045 + sg_pcopy_to_buffer(sg, 1, &value, sizeof(u32), offset); 2046 2046 atmci_writel(host, ATMCI_TDR, value); 2047 2047 2048 2048 offset += 4; ··· 2059 2059 unsigned int remaining = sg->length - offset; 2060 2060 2061 2061 value = 0; 2062 - sg_pcopy_from_buffer(sg, 1, &value, remaining, offset); 2062 + sg_pcopy_to_buffer(sg, 1, &value, remaining, offset); 2063 2063 nbytes += remaining; 2064 2064 2065 2065 host->sg = sg = sg_next(sg); ··· 2070 2070 } 2071 2071 2072 2072 offset = 4 - remaining; 2073 - sg_pcopy_from_buffer(sg, 1, (u8 *)&value + remaining, 2073 + sg_pcopy_to_buffer(sg, 1, (u8 *)&value + remaining, 2074 2074 offset, 0); 2075 2075 atmci_writel(host, ATMCI_TDR, value); 2076 2076 nbytes += offset;
+9 -1
drivers/mmc/host/renesas_sdhi_internal_dmac.c
··· 45 45 /* DM_CM_RST */ 46 46 #define RST_DTRANRST1 BIT(9) 47 47 #define RST_DTRANRST0 BIT(8) 48 - #define RST_RESERVED_BITS GENMASK_ULL(32, 0) 48 + #define RST_RESERVED_BITS GENMASK_ULL(31, 0) 49 49 50 50 /* DM_CM_INFO1 and DM_CM_INFO1_MASK */ 51 51 #define INFO1_CLEAR 0 52 + #define INFO1_MASK_CLEAR GENMASK_ULL(31, 0) 52 53 #define INFO1_DTRANEND1 BIT(17) 53 54 #define INFO1_DTRANEND0 BIT(16) 54 55 55 56 /* DM_CM_INFO2 and DM_CM_INFO2_MASK */ 57 + #define INFO2_MASK_CLEAR GENMASK_ULL(31, 0) 56 58 #define INFO2_DTRANERR1 BIT(17) 57 59 #define INFO2_DTRANERR0 BIT(16) 58 60 ··· 253 251 struct tmio_mmc_data *pdata) 254 252 { 255 253 struct renesas_sdhi *priv = host_to_priv(host); 254 + 255 + /* Disable DMAC interrupts, we don't use them */ 256 + renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1_MASK, 257 + INFO1_MASK_CLEAR); 258 + renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO2_MASK, 259 + INFO2_MASK_CLEAR); 256 260 257 261 /* Each value is set to non-zero to assume "enabling" each DMA */ 258 262 host->chan_rx = host->chan_tx = (void *)0xdeadbeaf;