Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
crypto: qat - abstract PFVF send function
Make the PFVF send function device specific.
This is in preparation for the introduction of PFVF support in the
qat_4xxx driver since the send logic differs between QAT GEN2 and
QAT GEN4 devices.
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
authored by
Marco Chiappero
and committed by
Herbert Xu
49c43538
9baf2de7
+102
-91
+1
drivers/crypto/qat/qat_common/adf_accel_devices.h
+1
drivers/crypto/qat/qat_common/adf_accel_devices.h
···
154
154
u32 (*get_vf2pf_sources)(void __iomem *pmisc_addr);
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void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
156
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void (*disable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
157
+
int (*send_msg)(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
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};
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struct adf_hw_device_data {
+97
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
+97
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
···
1
1
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2
2
/* Copyright(c) 2021 Intel Corporation */
3
+
#include <linux/delay.h>
4
+
#include <linux/mutex.h>
3
5
#include <linux/types.h>
4
6
#include "adf_accel_devices.h"
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#include "adf_common_drv.h"
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#include "adf_gen2_pfvf.h"
9
+
#include "adf_pf2vf_msg.h"
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/* VF2PF interrupts */
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#define ADF_GEN2_ERR_REG_VF2PF(vf_src) (((vf_src) & 0x01FFFE00) >> 9)
···
14
11
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#define ADF_GEN2_PF_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
16
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#define ADF_GEN2_VF_PF2VF_OFFSET 0x200
14
+
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+
#define ADF_PFVF_MSG_ACK_DELAY 2
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+
#define ADF_PFVF_MSG_ACK_MAX_RETRY 100
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+
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+
#define ADF_PFVF_MSG_RETRY_DELAY 5
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+
#define ADF_PFVF_MSG_MAX_RETRIES 3
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static u32 adf_gen2_pf_get_pfvf_offset(u32 i)
19
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{
···
70
61
}
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}
72
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64
+
static int adf_gen2_pfvf_send(struct adf_accel_dev *accel_dev, u32 msg,
65
+
u8 vf_nr)
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+
{
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+
struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
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+
struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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+
void __iomem *pmisc_bar_addr =
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+
pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
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+
u32 val, pfvf_offset, count = 0;
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u32 local_in_use_mask, local_in_use_pattern;
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u32 remote_in_use_mask, remote_in_use_pattern;
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struct mutex *lock; /* lock preventing concurrent acces of CSR */
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unsigned int retries = ADF_PFVF_MSG_MAX_RETRIES;
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u32 int_bit;
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+
int ret;
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+
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+
if (accel_dev->is_vf) {
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pfvf_offset = GET_PFVF_OPS(accel_dev)->get_vf2pf_offset(0);
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lock = &accel_dev->vf.vf2pf_lock;
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local_in_use_mask = ADF_VF2PF_IN_USE_BY_VF_MASK;
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local_in_use_pattern = ADF_VF2PF_IN_USE_BY_VF;
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remote_in_use_mask = ADF_PF2VF_IN_USE_BY_PF_MASK;
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remote_in_use_pattern = ADF_PF2VF_IN_USE_BY_PF;
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int_bit = ADF_VF2PF_INT;
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} else {
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pfvf_offset = GET_PFVF_OPS(accel_dev)->get_pf2vf_offset(vf_nr);
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lock = &accel_dev->pf.vf_info[vf_nr].pf2vf_lock;
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local_in_use_mask = ADF_PF2VF_IN_USE_BY_PF_MASK;
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local_in_use_pattern = ADF_PF2VF_IN_USE_BY_PF;
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remote_in_use_mask = ADF_VF2PF_IN_USE_BY_VF_MASK;
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remote_in_use_pattern = ADF_VF2PF_IN_USE_BY_VF;
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int_bit = ADF_PF2VF_INT;
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}
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msg &= ~local_in_use_mask;
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msg |= local_in_use_pattern;
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mutex_lock(lock);
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start:
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ret = 0;
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/* Check if the PFVF CSR is in use by remote function */
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val = ADF_CSR_RD(pmisc_bar_addr, pfvf_offset);
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if ((val & remote_in_use_mask) == remote_in_use_pattern) {
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dev_dbg(&GET_DEV(accel_dev),
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"PFVF CSR in use by remote function\n");
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goto retry;
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}
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+
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/* Attempt to get ownership of the PFVF CSR */
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ADF_CSR_WR(pmisc_bar_addr, pfvf_offset, msg | int_bit);
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/* Wait for confirmation from remote func it received the message */
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do {
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msleep(ADF_PFVF_MSG_ACK_DELAY);
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val = ADF_CSR_RD(pmisc_bar_addr, pfvf_offset);
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} while ((val & int_bit) && (count++ < ADF_PFVF_MSG_ACK_MAX_RETRY));
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if (val & int_bit) {
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dev_dbg(&GET_DEV(accel_dev), "ACK not received from remote\n");
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val &= ~int_bit;
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ret = -EIO;
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}
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+
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if (val != msg) {
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dev_dbg(&GET_DEV(accel_dev),
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"Collision - PFVF CSR overwritten by remote function\n");
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goto retry;
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}
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/* Finished with the PFVF CSR; relinquish it and leave msg in CSR */
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ADF_CSR_WR(pmisc_bar_addr, pfvf_offset, val & ~local_in_use_mask);
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out:
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mutex_unlock(lock);
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return ret;
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retry:
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if (--retries) {
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msleep(ADF_PFVF_MSG_RETRY_DELAY);
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goto start;
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} else {
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ret = -EBUSY;
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goto out;
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}
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}
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void adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
74
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{
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pfvf_ops->enable_comms = adf_enable_pf2vf_comms;
···
164
69
pfvf_ops->get_vf2pf_sources = adf_gen2_get_vf2pf_sources;
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pfvf_ops->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
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71
pfvf_ops->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
72
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pfvf_ops->send_msg = adf_gen2_pfvf_send;
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}
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EXPORT_SYMBOL_GPL(adf_gen2_init_pf_pfvf_ops);
169
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···
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pfvf_ops->enable_comms = adf_enable_vf2pf_comms;
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pfvf_ops->get_pf2vf_offset = adf_gen2_vf_get_pfvf_offset;
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pfvf_ops->get_vf2pf_offset = adf_gen2_vf_get_pfvf_offset;
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pfvf_ops->send_msg = adf_gen2_pfvf_send;
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}
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EXPORT_SYMBOL_GPL(adf_gen2_init_vf_pfvf_ops);
+2
-90
drivers/crypto/qat/qat_common/adf_pf2vf_msg.c
+2
-90
drivers/crypto/qat/qat_common/adf_pf2vf_msg.c
···
1
1
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2
2
/* Copyright(c) 2015 - 2020 Intel Corporation */
3
-
#include <linux/delay.h>
4
3
#include "adf_accel_devices.h"
5
4
#include "adf_common_drv.h"
6
5
#include "adf_pf2vf_msg.h"
···
7
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#define ADF_PFVF_MSG_COLLISION_DETECT_DELAY 10
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9
#define ADF_PFVF_MSG_ACK_DELAY 2
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#define ADF_PFVF_MSG_ACK_MAX_RETRY 100
10
-
#define ADF_PFVF_MSG_RETRY_DELAY 5
11
-
#define ADF_PFVF_MSG_MAX_RETRIES 3
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11
#define ADF_PFVF_MSG_RESP_TIMEOUT (ADF_PFVF_MSG_ACK_DELAY * \
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12
ADF_PFVF_MSG_ACK_MAX_RETRY + \
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ADF_PFVF_MSG_COLLISION_DETECT_DELAY)
15
-
16
-
static int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr)
17
-
{
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-
struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
19
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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-
void __iomem *pmisc_bar_addr =
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-
pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
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-
u32 val, pf2vf_offset, count = 0;
23
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u32 local_in_use_mask, local_in_use_pattern;
24
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u32 remote_in_use_mask, remote_in_use_pattern;
25
-
struct mutex *lock; /* lock preventing concurrent acces of CSR */
26
-
unsigned int retries = ADF_PFVF_MSG_MAX_RETRIES;
27
-
u32 int_bit;
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int ret;
29
-
30
-
if (accel_dev->is_vf) {
31
-
pf2vf_offset = hw_data->pfvf_ops.get_vf2pf_offset(0);
32
-
lock = &accel_dev->vf.vf2pf_lock;
33
-
local_in_use_mask = ADF_VF2PF_IN_USE_BY_VF_MASK;
34
-
local_in_use_pattern = ADF_VF2PF_IN_USE_BY_VF;
35
-
remote_in_use_mask = ADF_PF2VF_IN_USE_BY_PF_MASK;
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-
remote_in_use_pattern = ADF_PF2VF_IN_USE_BY_PF;
37
-
int_bit = ADF_VF2PF_INT;
38
-
} else {
39
-
pf2vf_offset = hw_data->pfvf_ops.get_pf2vf_offset(vf_nr);
40
-
lock = &accel_dev->pf.vf_info[vf_nr].pf2vf_lock;
41
-
local_in_use_mask = ADF_PF2VF_IN_USE_BY_PF_MASK;
42
-
local_in_use_pattern = ADF_PF2VF_IN_USE_BY_PF;
43
-
remote_in_use_mask = ADF_VF2PF_IN_USE_BY_VF_MASK;
44
-
remote_in_use_pattern = ADF_VF2PF_IN_USE_BY_VF;
45
-
int_bit = ADF_PF2VF_INT;
46
-
}
47
-
48
-
msg &= ~local_in_use_mask;
49
-
msg |= local_in_use_pattern;
50
-
51
-
mutex_lock(lock);
52
-
53
-
start:
54
-
ret = 0;
55
-
56
-
/* Check if the PFVF CSR is in use by remote function */
57
-
val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset);
58
-
if ((val & remote_in_use_mask) == remote_in_use_pattern) {
59
-
dev_dbg(&GET_DEV(accel_dev),
60
-
"PFVF CSR in use by remote function\n");
61
-
goto retry;
62
-
}
63
-
64
-
/* Attempt to get ownership of the PFVF CSR */
65
-
ADF_CSR_WR(pmisc_bar_addr, pf2vf_offset, msg | int_bit);
66
-
67
-
/* Wait for confirmation from remote func it received the message */
68
-
do {
69
-
msleep(ADF_PFVF_MSG_ACK_DELAY);
70
-
val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset);
71
-
} while ((val & int_bit) && (count++ < ADF_PFVF_MSG_ACK_MAX_RETRY));
72
-
73
-
if (val & int_bit) {
74
-
dev_dbg(&GET_DEV(accel_dev), "ACK not received from remote\n");
75
-
val &= ~int_bit;
76
-
ret = -EIO;
77
-
}
78
-
79
-
if (val != msg) {
80
-
dev_dbg(&GET_DEV(accel_dev),
81
-
"Collision - PFVF CSR overwritten by remote function\n");
82
-
goto retry;
83
-
}
84
-
85
-
/* Finished with the PFVF CSR; relinquish it and leave msg in CSR */
86
-
ADF_CSR_WR(pmisc_bar_addr, pf2vf_offset, val & ~local_in_use_mask);
87
-
out:
88
-
mutex_unlock(lock);
89
-
return ret;
90
-
91
-
retry:
92
-
if (--retries) {
93
-
msleep(ADF_PFVF_MSG_RETRY_DELAY);
94
-
goto start;
95
-
} else {
96
-
ret = -EBUSY;
97
-
goto out;
98
-
}
99
-
}
100
14
101
15
/**
102
16
* adf_send_pf2vf_msg() - send PF to VF message
···
23
111
*/
24
112
static int adf_send_pf2vf_msg(struct adf_accel_dev *accel_dev, u8 vf_nr, u32 msg)
25
113
{
26
-
return adf_iov_putmsg(accel_dev, msg, vf_nr);
114
+
return GET_PFVF_OPS(accel_dev)->send_msg(accel_dev, msg, vf_nr);
27
115
}
28
116
29
117
/**
···
37
125
*/
38
126
int adf_send_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 msg)
39
127
{
40
-
return adf_iov_putmsg(accel_dev, msg, 0);
128
+
return GET_PFVF_OPS(accel_dev)->send_msg(accel_dev, msg, 0);
41
129
}
42
130
43
131
/**
+2
-1
drivers/crypto/qat/qat_common/adf_pf2vf_msg.h
+2
-1
drivers/crypto/qat/qat_common/adf_pf2vf_msg.h
···
49
49
*
50
50
* When a PF or VF attempts to send a message in the lower or upper 16 bits,
51
51
* respectively, the other 16 bits are written to first with a defined
52
-
* IN_USE_BY pattern as part of a collision control scheme (see adf_iov_putmsg).
52
+
* IN_USE_BY pattern as part of a collision control scheme (see function
53
+
* adf_gen2_pfvf_send() in adf_pf2vf_msg.c).
53
54
*/
54
55
55
56
#define ADF_PFVF_COMPAT_THIS_VERSION 0x1 /* PF<->VF compat */