+3 -1

Documentation/hwmon/aquacomputer_d5next.rst

reviewed

··· 39 39 40 40 The Quadro exposes four physical and sixteen virtual temperature sensors, a flow 41 41 sensor and four PWM controllable fans, along with their speed (in RPM), power, 42 42 - voltage and current. 42 42 + voltage and current. Flow sensor pulses are also available. 43 43 44 44 The Farbwerk and Farbwerk 360 expose four temperature sensors. Additionally, 45 45 sixteen virtual temperature sensors of the Farbwerk 360 are exposed. ··· 62 62 63 63 ================ ============================================================== 64 64 temp[1-20]_input Physical/virtual temperature sensors (in millidegrees Celsius) 65 65 + temp[1-4]_offset Temperature sensor correction offset (in millidegrees Celsius) 65 66 fan[1-8]_input Pump/fan speed (in RPM) / Flow speed (in dL/h) 67 67 + fan5_pulses Quadro flow sensor pulses 66 68 power[1-8]_input Pump/fan power (in micro Watts) 67 69 in[0-7]_input Pump/fan voltage (in milli Volts) 68 70 curr[1-8]_input Pump/fan current (in milli Amperes)

+2

Documentation/hwmon/index.rst

reviewed

··· 160 160 nzxt-kraken2 161 161 nzxt-smart2 162 162 occ 163 163 + oxp-sensors 163 164 pc87360 164 165 pc87427 165 166 pcf8591 ··· 188 187 sis5595 189 188 sl28cpld 190 189 smm665 190 190 + smpro-hwmon 191 191 smsc47b397 192 192 smsc47m192 193 193 smsc47m1

+44

Documentation/hwmon/oxp-sensors.rst

reviewed

··· 1 1 + .. SPDX-License-Identifier: GPL-2.0-or-later 2 2 + 3 3 + Kernel driver oxp-sensors 4 4 + ========================= 5 5 + 6 6 + Author: 7 7 + - Joaquín Ignacio Aramendía <samsagax@gmail.com> 8 8 + 9 9 + Description: 10 10 + ------------ 11 11 + 12 12 + One X Player devices from One Netbook provide fan readings and fan control 13 13 + through its Embedded Controller. 14 14 + 15 15 + Currently only supports AMD boards from the One X Player and AOK ZOE lineup. 16 16 + Intel boards could be supported if we could figure out the EC registers and 17 17 + values to write to since the EC layout and model is different. 18 18 + 19 19 + Supported devices 20 20 + ----------------- 21 21 + 22 22 + Currently the driver supports the following handhelds: 23 23 + 24 24 + - AOK ZOE A1 25 25 + - OneXPlayer AMD 26 26 + - OneXPlayer mini AMD 27 27 + - OneXPlayer mini AMD PRO 28 28 + 29 29 + Sysfs entries 30 30 + ------------- 31 31 + 32 32 + The following attributes are supported: 33 33 + 34 34 + fan1_input 35 35 + Read Only. Reads current fan RMP. 36 36 + 37 37 + pwm1_enable 38 38 + Read Write. Enable manual fan control. Write "1" to set to manual, write "0" 39 39 + to let the EC control de fan speed. Read this attribute to see current status. 40 40 + 41 41 + pwm1 42 42 + Read Write. Read this attribute to see current duty cycle in the range [0-255]. 43 43 + When pwm1_enable is set to "1" (manual) write any value in the range [0-255] 44 44 + to set fan speed.

+102

Documentation/hwmon/smpro-hwmon.rst

reviewed

··· 1 1 + .. SPDX-License-Identifier: GPL-2.0-only 2 2 + 3 3 + Kernel driver Ampere(R)'s Altra(R) SMpro hwmon 4 4 + ============================================== 5 5 + 6 6 + Supported chips: 7 7 + 8 8 + * Ampere(R) Altra(R) 9 9 + 10 10 + Prefix: ``smpro`` 11 11 + 12 12 + Reference: `Altra SoC BMC Interface Specification` 13 13 + 14 14 + Author: Thu Nguyen <thu@os.amperecomputing.com> 15 15 + 16 16 + Description 17 17 + ----------- 18 18 + The smpro-hwmon driver supports hardware monitoring for Ampere(R) Altra(R) 19 19 + SoCs based on the SMpro co-processor (SMpro). The following sensor metrics 20 20 + are supported by the driver: 21 21 + 22 22 + * temperature 23 23 + * voltage 24 24 + * current 25 25 + * power 26 26 + 27 27 + The interface provides the registers to query the various sensors and 28 28 + their values which are then exported to userspace by this driver. 29 29 + 30 30 + Usage Notes 31 31 + ----------- 32 32 + 33 33 + The driver creates at least two sysfs files for each sensor. 34 34 + 35 35 + * ``<sensor_type><idx>_label`` reports the sensor label. 36 36 + * ``<sensor_type><idx>_input`` returns the sensor value. 37 37 + 38 38 + The sysfs files are allocated in the SMpro rootfs folder, with one root 39 39 + directory for each instance. 40 40 + 41 41 + When the SoC is turned off, the driver will fail to read registers and 42 42 + return ``-ENXIO``. 43 43 + 44 44 + Sysfs entries 45 45 + ------------- 46 46 + 47 47 + The following sysfs files are supported: 48 48 + 49 49 + * Ampere(R) Altra(R): 50 50 + 51 51 + ============ ============= ====== =============================================== 52 52 + Name Unit Perm Description 53 53 + ============ ============= ====== =============================================== 54 54 + temp1_input millicelsius RO SoC temperature 55 55 + temp2_input millicelsius RO Max temperature reported among SoC VRDs 56 56 + temp2_crit millicelsius RO SoC VRD HOT Threshold temperature 57 57 + temp3_input millicelsius RO Max temperature reported among DIMM VRDs 58 58 + temp4_input millicelsius RO Max temperature reported among Core VRDs 59 59 + temp5_input millicelsius RO Temperature of DIMM0 on CH0 60 60 + temp5_crit millicelsius RO MEM HOT Threshold for all DIMMs 61 61 + temp6_input millicelsius RO Temperature of DIMM0 on CH1 62 62 + temp6_crit millicelsius RO MEM HOT Threshold for all DIMMs 63 63 + temp7_input millicelsius RO Temperature of DIMM0 on CH2 64 64 + temp7_crit millicelsius RO MEM HOT Threshold for all DIMMs 65 65 + temp8_input millicelsius RO Temperature of DIMM0 on CH3 66 66 + temp8_crit millicelsius RO MEM HOT Threshold for all DIMMs 67 67 + temp9_input millicelsius RO Temperature of DIMM0 on CH4 68 68 + temp9_crit millicelsius RO MEM HOT Threshold for all DIMMs 69 69 + temp10_input millicelsius RO Temperature of DIMM0 on CH5 70 70 + temp10_crit millicelsius RO MEM HOT Threshold for all DIMMs 71 71 + temp11_input millicelsius RO Temperature of DIMM0 on CH6 72 72 + temp11_crit millicelsius RO MEM HOT Threshold for all DIMMs 73 73 + temp12_input millicelsius RO Temperature of DIMM0 on CH7 74 74 + temp12_crit millicelsius RO MEM HOT Threshold for all DIMMs 75 75 + temp13_input millicelsius RO Max temperature reported among RCA VRDs 76 76 + in0_input millivolts RO Core voltage 77 77 + in1_input millivolts RO SoC voltage 78 78 + in2_input millivolts RO DIMM VRD1 voltage 79 79 + in3_input millivolts RO DIMM VRD2 voltage 80 80 + in4_input millivolts RO RCA VRD voltage 81 81 + cur1_input milliamperes RO Core VRD current 82 82 + cur2_input milliamperes RO SoC VRD current 83 83 + cur3_input milliamperes RO DIMM VRD1 current 84 84 + cur4_input milliamperes RO DIMM VRD2 current 85 85 + cur5_input milliamperes RO RCA VRD current 86 86 + power1_input microwatts RO Core VRD power 87 87 + power2_input microwatts RO SoC VRD power 88 88 + power3_input microwatts RO DIMM VRD1 power 89 89 + power4_input microwatts RO DIMM VRD2 power 90 90 + power5_input microwatts RO RCA VRD power 91 91 + ============ ============= ====== =============================================== 92 92 + 93 93 + Example:: 94 94 + 95 95 + # cat in0_input 96 96 + 830 97 97 + # cat temp1_input 98 98 + 37000 99 99 + # cat curr1_input 100 100 + 9000 101 101 + # cat power5_input 102 102 + 19500000

+6

MAINTAINERS

reviewed

··· 15452 15452 F: drivers/mtd/nand/onenand/ 15453 15453 F: include/linux/mtd/onenand*.h 15454 15454 15455 15455 + ONEXPLAYER FAN DRIVER 15456 15456 + M: Joaquín Ignacio Aramendía <samsagax@gmail.com> 15457 15457 + L: linux-hwmon@vger.kernel.org 15458 15458 + S: Maintained 15459 15459 + F: drivers/hwmon/oxp-sensors.c 15460 15460 + 15455 15461 ONION OMEGA2+ BOARD 15456 15462 M: Harvey Hunt <harveyhuntnexus@gmail.com> 15457 15463 L: linux-mips@vger.kernel.org

+20

drivers/hwmon/Kconfig

reviewed

··· 67 67 This driver can also be built as a module. If so, the module 68 68 will be called abituguru3. 69 69 70 70 + config SENSORS_SMPRO 71 71 + tristate "Ampere's Altra SMpro hardware monitoring driver" 72 72 + depends on MFD_SMPRO 73 73 + help 74 74 + If you say yes here you get support for the thermal, voltage, 75 75 + current and power sensors of Ampere's Altra processor family SoC 76 76 + with SMpro co-processor. 77 77 + 70 78 config SENSORS_AD7314 71 79 tristate "Analog Devices AD7314 and compatibles" 72 80 depends on SPI ··· 807 799 config SENSORS_JC42 808 800 tristate "JEDEC JC42.4 compliant memory module temperature sensors" 809 801 depends on I2C 802 802 + select REGMAP_I2C 810 803 help 811 804 If you say yes here, you get support for JEDEC JC42.4 compliant 812 805 temperature sensors, which are used on many DDR3 memory modules for ··· 1615 1606 will be called nzxt-smart2. 1616 1607 1617 1608 source "drivers/hwmon/occ/Kconfig" 1609 1609 + 1610 1610 + config SENSORS_OXP 1611 1611 + tristate "OneXPlayer EC fan control" 1612 1612 + depends on ACPI 1613 1613 + depends on X86 1614 1614 + help 1615 1615 + If you say yes here you get support for fan readings and control over 1616 1616 + OneXPlayer handheld devices. Only OneXPlayer mini AMD handheld variant 1617 1617 + boards are supported. 1618 1618 + 1619 1619 + Can also be built as a module. In that case it will be called oxp-sensors. 1618 1620 1619 1621 config SENSORS_PCF8591 1620 1622 tristate "Philips PCF8591 ADC/DAC"

+2

drivers/hwmon/Makefile

reviewed

··· 167 167 obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o 168 168 obj-$(CONFIG_SENSORS_NZXT_KRAKEN2) += nzxt-kraken2.o 169 169 obj-$(CONFIG_SENSORS_NZXT_SMART2) += nzxt-smart2.o 170 170 + obj-$(CONFIG_SENSORS_OXP) += oxp-sensors.o 170 171 obj-$(CONFIG_SENSORS_PC87360) += pc87360.o 171 172 obj-$(CONFIG_SENSORS_PC87427) += pc87427.o 172 173 obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o ··· 188 187 obj-$(CONFIG_SENSORS_SHTC1) += shtc1.o 189 188 obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o 190 189 obj-$(CONFIG_SENSORS_SMM665) += smm665.o 190 190 + obj-$(CONFIG_SENSORS_SMPRO) += smpro-hwmon.o 191 191 obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o 192 192 obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o 193 193 obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o

+3 -24

drivers/hwmon/adm1177.c

reviewed

··· 26 26 /** 27 27 * struct adm1177_state - driver instance specific data 28 28 * @client: pointer to i2c client 29 29 - * @reg: regulator info for the power supply of the device 30 29 * @r_sense_uohm: current sense resistor value 31 30 * @alert_threshold_ua: current limit for shutdown 32 31 * @vrange_high: internal voltage divider 33 32 */ 34 33 struct adm1177_state { 35 34 struct i2c_client *client; 36 36 - struct regulator *reg; 37 35 u32 r_sense_uohm; 38 36 u32 alert_threshold_ua; 39 37 bool vrange_high; ··· 187 189 .info = adm1177_info, 188 190 }; 189 191 190 190 - static void adm1177_remove(void *data) 191 191 - { 192 192 - struct adm1177_state *st = data; 193 193 - 194 194 - regulator_disable(st->reg); 195 195 - } 196 196 - 197 192 static int adm1177_probe(struct i2c_client *client) 198 193 { 199 194 struct device *dev = &client->dev; ··· 201 210 202 211 st->client = client; 203 212 204 204 - st->reg = devm_regulator_get_optional(&client->dev, "vref"); 205 205 - if (IS_ERR(st->reg)) { 206 206 - if (PTR_ERR(st->reg) == -EPROBE_DEFER) 207 207 - return -EPROBE_DEFER; 208 208 - 209 209 - st->reg = NULL; 210 210 - } else { 211 211 - ret = regulator_enable(st->reg); 212 212 - if (ret) 213 213 - return ret; 214 214 - ret = devm_add_action_or_reset(&client->dev, adm1177_remove, 215 215 - st); 216 216 - if (ret) 217 217 - return ret; 218 218 - } 213 213 + ret = devm_regulator_get_enable_optional(&client->dev, "vref"); 214 214 + if (ret == -EPROBE_DEFER) 215 215 + return -EPROBE_DEFER; 219 216 220 217 if (device_property_read_u32(dev, "shunt-resistor-micro-ohms", 221 218 &st->r_sense_uohm))

+2 -3

drivers/hwmon/aht10.c

reviewed

··· 289 289 .info = aht10_info, 290 290 }; 291 291 292 292 - static int aht10_probe(struct i2c_client *client, 293 293 - const struct i2c_device_id *aht10_id) 292 292 + static int aht10_probe(struct i2c_client *client) 294 293 { 295 294 struct device *device = &client->dev; 296 295 struct device *hwmon_dev; ··· 335 336 .driver = { 336 337 .name = "aht10", 337 338 }, 338 338 - .probe = aht10_probe, 339 339 + .probe_new = aht10_probe, 339 340 .id_table = aht10_id, 340 341 }; 341 342

+181 -52

drivers/hwmon/aquacomputer_d5next.c

reviewed

··· 59 59 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x34, 0xC6 60 60 }; 61 61 62 62 - /* Register offsets for all Aquacomputer devices */ 62 62 + /* Sensor sizes and offsets for all Aquacomputer devices */ 63 63 #define AQC_TEMP_SENSOR_SIZE 0x02 64 64 #define AQC_TEMP_SENSOR_DISCONNECTED 0x7FFF 65 65 #define AQC_FAN_PERCENT_OFFSET 0x00 ··· 68 68 #define AQC_FAN_POWER_OFFSET 0x06 69 69 #define AQC_FAN_SPEED_OFFSET 0x08 70 70 71 71 - /* Register offsets for the D5 Next pump */ 72 72 - #define D5NEXT_POWER_CYCLES 0x18 73 73 - #define D5NEXT_COOLANT_TEMP 0x57 71 71 + /* Specs of the D5 Next pump */ 74 72 #define D5NEXT_NUM_FANS 2 75 73 #define D5NEXT_NUM_SENSORS 1 76 74 #define D5NEXT_NUM_VIRTUAL_SENSORS 8 77 77 - #define D5NEXT_VIRTUAL_SENSORS_START 0x3f 75 75 + #define D5NEXT_CTRL_REPORT_SIZE 0x329 76 76 + 77 77 + /* Sensor report offsets for the D5 Next pump */ 78 78 + #define D5NEXT_POWER_CYCLES 0x18 79 79 + #define D5NEXT_COOLANT_TEMP 0x57 78 80 #define D5NEXT_PUMP_OFFSET 0x6c 79 81 #define D5NEXT_FAN_OFFSET 0x5f 80 82 #define D5NEXT_5V_VOLTAGE 0x39 81 83 #define D5NEXT_12V_VOLTAGE 0x37 82 82 - #define D5NEXT_CTRL_REPORT_SIZE 0x329 84 84 + #define D5NEXT_VIRTUAL_SENSORS_START 0x3f 83 85 static u8 d5next_sensor_fan_offsets[] = { D5NEXT_PUMP_OFFSET, D5NEXT_FAN_OFFSET }; 84 86 85 85 - /* Pump and fan speed registers in D5 Next control report (from 0-100%) */ 86 86 - static u16 d5next_ctrl_fan_offsets[] = { 0x97, 0x42 }; 87 87 + /* Control report offsets for the D5 Next pump */ 88 88 + #define D5NEXT_TEMP_CTRL_OFFSET 0x2D /* Temperature sensor offsets location */ 89 89 + static u16 d5next_ctrl_fan_offsets[] = { 0x97, 0x42 }; /* Pump and fan speed (from 0-100%) */ 87 90 88 88 - /* Register offsets for the Farbwerk RGB controller */ 91 91 + /* Spec and sensor report offset for the Farbwerk RGB controller */ 89 92 #define FARBWERK_NUM_SENSORS 4 90 93 #define FARBWERK_SENSOR_START 0x2f 91 94 92 92 - /* Register offsets for the Farbwerk 360 RGB controller */ 95 95 + /* Specs of the Farbwerk 360 RGB controller */ 93 96 #define FARBWERK360_NUM_SENSORS 4 94 94 - #define FARBWERK360_SENSOR_START 0x32 95 97 #define FARBWERK360_NUM_VIRTUAL_SENSORS 16 98 98 + #define FARBWERK360_CTRL_REPORT_SIZE 0x682 99 99 + 100 100 + /* Sensor report offsets for the Farbwerk 360 */ 101 101 + #define FARBWERK360_SENSOR_START 0x32 96 102 #define FARBWERK360_VIRTUAL_SENSORS_START 0x3a 97 103 98 98 - /* Register offsets for the Octo fan controller */ 99 99 - #define OCTO_POWER_CYCLES 0x18 104 104 + /* Control report offsets for the Farbwerk 360 */ 105 105 + #define FARBWERK360_TEMP_CTRL_OFFSET 0x8 106 106 + 107 107 + /* Specs of the Octo fan controller */ 100 108 #define OCTO_NUM_FANS 8 101 109 #define OCTO_NUM_SENSORS 4 102 102 - #define OCTO_SENSOR_START 0x3D 103 110 #define OCTO_NUM_VIRTUAL_SENSORS 16 104 104 - #define OCTO_VIRTUAL_SENSORS_START 0x45 105 111 #define OCTO_CTRL_REPORT_SIZE 0x65F 112 112 + 113 113 + /* Sensor report offsets for the Octo */ 114 114 + #define OCTO_POWER_CYCLES 0x18 115 115 + #define OCTO_SENSOR_START 0x3D 116 116 + #define OCTO_VIRTUAL_SENSORS_START 0x45 106 117 static u8 octo_sensor_fan_offsets[] = { 0x7D, 0x8A, 0x97, 0xA4, 0xB1, 0xBE, 0xCB, 0xD8 }; 107 118 108 108 - /* Fan speed registers in Octo control report (from 0-100%) */ 119 119 + /* Control report offsets for the Octo */ 120 120 + #define OCTO_TEMP_CTRL_OFFSET 0xA 121 121 + /* Fan speed offsets (0-100%) */ 109 122 static u16 octo_ctrl_fan_offsets[] = { 0x5B, 0xB0, 0x105, 0x15A, 0x1AF, 0x204, 0x259, 0x2AE }; 110 123 111 111 - /* Register offsets for the Quadro fan controller */ 112 112 - #define QUADRO_POWER_CYCLES 0x18 124 124 + /* Specs of Quadro fan controller */ 113 125 #define QUADRO_NUM_FANS 4 114 126 #define QUADRO_NUM_SENSORS 4 115 115 - #define QUADRO_SENSOR_START 0x34 116 127 #define QUADRO_NUM_VIRTUAL_SENSORS 16 117 117 - #define QUADRO_VIRTUAL_SENSORS_START 0x3c 118 128 #define QUADRO_CTRL_REPORT_SIZE 0x3c1 129 129 + 130 130 + /* Sensor report offsets for the Quadro */ 131 131 + #define QUADRO_POWER_CYCLES 0x18 132 132 + #define QUADRO_SENSOR_START 0x34 133 133 + #define QUADRO_VIRTUAL_SENSORS_START 0x3c 119 134 #define QUADRO_FLOW_SENSOR_OFFSET 0x6e 120 135 static u8 quadro_sensor_fan_offsets[] = { 0x70, 0x7D, 0x8A, 0x97 }; 121 136 122 122 - /* Fan speed registers in Quadro control report (from 0-100%) */ 123 123 - static u16 quadro_ctrl_fan_offsets[] = { 0x37, 0x8c, 0xe1, 0x136 }; 137 137 + /* Control report offsets for the Quadro */ 138 138 + #define QUADRO_TEMP_CTRL_OFFSET 0xA 139 139 + #define QUADRO_FLOW_PULSES_CTRL_OFFSET 0x6 140 140 + static u16 quadro_ctrl_fan_offsets[] = { 0x37, 0x8c, 0xe1, 0x136 }; /* Fan speed offsets (0-100%) */ 124 141 125 125 - /* Register offsets for the High Flow Next */ 142 142 + /* Specs of High Flow Next flow sensor */ 126 143 #define HIGHFLOWNEXT_NUM_SENSORS 2 144 144 + 145 145 + /* Sensor report offsets for the High Flow Next */ 127 146 #define HIGHFLOWNEXT_SENSOR_START 85 128 147 #define HIGHFLOWNEXT_FLOW 81 129 148 #define HIGHFLOWNEXT_WATER_QUALITY 89 ··· 301 282 int temp_sensor_start_offset; 302 283 int num_virtual_temp_sensors; 303 284 int virtual_temp_sensor_start_offset; 285 285 + u16 temp_ctrl_offset; 304 286 u16 power_cycle_count_offset; 305 287 u8 flow_sensor_offset; 288 288 + u8 flow_pulses_ctrl_offset; 306 289 307 290 /* General info, same across all devices */ 308 291 u32 serial_number[2]; ··· 386 365 return ret; 387 366 } 388 367 389 389 - /* Refreshes the control buffer and returns value at offset */ 390 390 - static int aqc_get_ctrl_val(struct aqc_data *priv, int offset) 368 368 + /* Refreshes the control buffer and stores value at offset in val */ 369 369 + static int aqc_get_ctrl_val(struct aqc_data *priv, int offset, long *val) 391 370 { 392 371 int ret; 393 372 ··· 397 376 if (ret < 0) 398 377 goto unlock_and_return; 399 378 400 400 - ret = get_unaligned_be16(priv->buffer + offset); 379 379 + *val = (s16)get_unaligned_be16(priv->buffer + offset); 401 380 402 381 unlock_and_return: 403 382 mutex_unlock(&priv->mutex); ··· 414 393 if (ret < 0) 415 394 goto unlock_and_return; 416 395 417 417 - put_unaligned_be16((u16)val, priv->buffer + offset); 396 396 + put_unaligned_be16((s16)val, priv->buffer + offset); 418 397 419 398 ret = aqc_send_ctrl_data(priv); 420 399 ··· 429 408 430 409 switch (type) { 431 410 case hwmon_temp: 411 411 + if (channel < priv->num_temp_sensors) { 412 412 + switch (attr) { 413 413 + case hwmon_temp_label: 414 414 + case hwmon_temp_input: 415 415 + return 0444; 416 416 + case hwmon_temp_offset: 417 417 + if (priv->temp_ctrl_offset != 0) 418 418 + return 0644; 419 419 + break; 420 420 + default: 421 421 + break; 422 422 + } 423 423 + } 424 424 + 432 425 if (channel < priv->num_temp_sensors + priv->num_virtual_temp_sensors) 433 433 - return 0444; 426 426 + switch (attr) { 427 427 + case hwmon_temp_label: 428 428 + case hwmon_temp_input: 429 429 + return 0444; 430 430 + default: 431 431 + break; 432 432 + } 434 433 break; 435 434 case hwmon_pwm: 436 435 if (priv->fan_ctrl_offsets && channel < priv->num_fans) { ··· 463 422 } 464 423 break; 465 424 case hwmon_fan: 466 466 - switch (priv->kind) { 467 467 - case highflownext: 468 468 - /* Special case to support flow sensor, water quality and conductivity */ 469 469 - if (channel < 3) 470 470 - return 0444; 425 425 + switch (attr) { 426 426 + case hwmon_fan_input: 427 427 + case hwmon_fan_label: 428 428 + switch (priv->kind) { 429 429 + case highflownext: 430 430 + /* Special case to support flow sensor, water quality 431 431 + * and conductivity 432 432 + */ 433 433 + if (channel < 3) 434 434 + return 0444; 435 435 + break; 436 436 + case quadro: 437 437 + /* Special case to support flow sensor */ 438 438 + if (channel < priv->num_fans + 1) 439 439 + return 0444; 440 440 + break; 441 441 + default: 442 442 + if (channel < priv->num_fans) 443 443 + return 0444; 444 444 + break; 445 445 + } 471 446 break; 472 472 - case quadro: 473 473 - /* Special case to support flow sensor */ 474 474 - if (channel < priv->num_fans + 1) 475 475 - return 0444; 447 447 + case hwmon_fan_pulses: 448 448 + /* Special case for Quadro flow sensor */ 449 449 + if (priv->kind == quadro && channel == priv->num_fans) 450 450 + return 0644; 476 451 break; 477 452 default: 478 478 - if (channel < priv->num_fans) 479 479 - return 0444; 480 453 break; 481 454 } 482 455 break; ··· 547 492 548 493 switch (type) { 549 494 case hwmon_temp: 550 550 - if (priv->temp_input[channel] == -ENODATA) 551 551 - return -ENODATA; 495 495 + switch (attr) { 496 496 + case hwmon_temp_input: 497 497 + if (priv->temp_input[channel] == -ENODATA) 498 498 + return -ENODATA; 552 499 553 553 - *val = priv->temp_input[channel]; 500 500 + *val = priv->temp_input[channel]; 501 501 + break; 502 502 + case hwmon_temp_offset: 503 503 + ret = 504 504 + aqc_get_ctrl_val(priv, priv->temp_ctrl_offset + 505 505 + channel * AQC_TEMP_SENSOR_SIZE, val); 506 506 + if (ret < 0) 507 507 + return ret; 508 508 + 509 509 + *val *= 10; 510 510 + break; 511 511 + default: 512 512 + break; 513 513 + } 554 514 break; 555 515 case hwmon_fan: 556 556 - *val = priv->speed_input[channel]; 516 516 + switch (attr) { 517 517 + case hwmon_fan_input: 518 518 + *val = priv->speed_input[channel]; 519 519 + break; 520 520 + case hwmon_fan_pulses: 521 521 + ret = aqc_get_ctrl_val(priv, priv->flow_pulses_ctrl_offset, val); 522 522 + if (ret < 0) 523 523 + return ret; 524 524 + break; 525 525 + default: 526 526 + break; 527 527 + } 557 528 break; 558 529 case hwmon_power: 559 530 *val = priv->power_input[channel]; 560 531 break; 561 532 case hwmon_pwm: 562 533 if (priv->fan_ctrl_offsets) { 563 563 - ret = aqc_get_ctrl_val(priv, priv->fan_ctrl_offsets[channel]); 534 534 + ret = aqc_get_ctrl_val(priv, priv->fan_ctrl_offsets[channel], val); 564 535 if (ret < 0) 565 536 return ret; 566 537 ··· 644 563 struct aqc_data *priv = dev_get_drvdata(dev); 645 564 646 565 switch (type) { 566 566 + case hwmon_temp: 567 567 + switch (attr) { 568 568 + case hwmon_temp_offset: 569 569 + /* Limit temp offset to +/- 15K as in the official software */ 570 570 + val = clamp_val(val, -15000, 15000) / 10; 571 571 + ret = 572 572 + aqc_set_ctrl_val(priv, priv->temp_ctrl_offset + 573 573 + channel * AQC_TEMP_SENSOR_SIZE, val); 574 574 + if (ret < 0) 575 575 + return ret; 576 576 + break; 577 577 + default: 578 578 + return -EOPNOTSUPP; 579 579 + } 580 580 + break; 581 581 + case hwmon_fan: 582 582 + switch (attr) { 583 583 + case hwmon_fan_pulses: 584 584 + val = clamp_val(val, 10, 1000); 585 585 + ret = aqc_set_ctrl_val(priv, priv->flow_pulses_ctrl_offset, val); 586 586 + if (ret < 0) 587 587 + return ret; 588 588 + break; 589 589 + default: 590 590 + break; 591 591 + } 592 592 + break; 647 593 case hwmon_pwm: 648 594 switch (attr) { 649 595 case hwmon_pwm_input: ··· 705 597 706 598 static const struct hwmon_channel_info *aqc_info[] = { 707 599 HWMON_CHANNEL_INFO(temp, 708 708 - HWMON_T_INPUT | HWMON_T_LABEL, 709 709 - HWMON_T_INPUT | HWMON_T_LABEL, 710 710 - HWMON_T_INPUT | HWMON_T_LABEL, 711 711 - HWMON_T_INPUT | HWMON_T_LABEL, 600 600 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET, 601 601 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET, 602 602 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET, 603 603 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET, 712 604 HWMON_T_INPUT | HWMON_T_LABEL, 713 605 HWMON_T_INPUT | HWMON_T_LABEL, 714 606 HWMON_T_INPUT | HWMON_T_LABEL, ··· 730 622 HWMON_F_INPUT | HWMON_F_LABEL, 731 623 HWMON_F_INPUT | HWMON_F_LABEL, 732 624 HWMON_F_INPUT | HWMON_F_LABEL, 733 733 - HWMON_F_INPUT | HWMON_F_LABEL, 625 625 + HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_PULSES, 734 626 HWMON_F_INPUT | HWMON_F_LABEL, 735 627 HWMON_F_INPUT | HWMON_F_LABEL, 736 628 HWMON_F_INPUT | HWMON_F_LABEL), ··· 955 847 priv->num_fans = D5NEXT_NUM_FANS; 956 848 priv->fan_sensor_offsets = d5next_sensor_fan_offsets; 957 849 priv->fan_ctrl_offsets = d5next_ctrl_fan_offsets; 850 850 + 958 851 priv->num_temp_sensors = D5NEXT_NUM_SENSORS; 959 852 priv->temp_sensor_start_offset = D5NEXT_COOLANT_TEMP; 960 853 priv->num_virtual_temp_sensors = D5NEXT_NUM_VIRTUAL_SENSORS; 961 854 priv->virtual_temp_sensor_start_offset = D5NEXT_VIRTUAL_SENSORS_START; 962 962 - priv->power_cycle_count_offset = D5NEXT_POWER_CYCLES; 855 855 + priv->temp_ctrl_offset = D5NEXT_TEMP_CTRL_OFFSET; 856 856 + 963 857 priv->buffer_size = D5NEXT_CTRL_REPORT_SIZE; 858 858 + 859 859 + priv->power_cycle_count_offset = D5NEXT_POWER_CYCLES; 964 860 965 861 priv->temp_label = label_d5next_temp; 966 862 priv->virtual_temp_label = label_virtual_temp_sensors; ··· 977 865 priv->kind = farbwerk; 978 866 979 867 priv->num_fans = 0; 868 868 + 980 869 priv->num_temp_sensors = FARBWERK_NUM_SENSORS; 981 870 priv->temp_sensor_start_offset = FARBWERK_SENSOR_START; 871 871 + 982 872 priv->temp_label = label_temp_sensors; 983 873 break; 984 874 case USB_PRODUCT_ID_FARBWERK360: 985 875 priv->kind = farbwerk360; 986 876 987 877 priv->num_fans = 0; 878 878 + 988 879 priv->num_temp_sensors = FARBWERK360_NUM_SENSORS; 989 880 priv->temp_sensor_start_offset = FARBWERK360_SENSOR_START; 990 881 priv->num_virtual_temp_sensors = FARBWERK360_NUM_VIRTUAL_SENSORS; 991 882 priv->virtual_temp_sensor_start_offset = FARBWERK360_VIRTUAL_SENSORS_START; 883 883 + priv->temp_ctrl_offset = FARBWERK360_TEMP_CTRL_OFFSET; 884 884 + 885 885 + priv->buffer_size = FARBWERK360_CTRL_REPORT_SIZE; 992 886 993 887 priv->temp_label = label_temp_sensors; 994 888 priv->virtual_temp_label = label_virtual_temp_sensors; ··· 1005 887 priv->num_fans = OCTO_NUM_FANS; 1006 888 priv->fan_sensor_offsets = octo_sensor_fan_offsets; 1007 889 priv->fan_ctrl_offsets = octo_ctrl_fan_offsets; 890 890 + 1008 891 priv->num_temp_sensors = OCTO_NUM_SENSORS; 1009 892 priv->temp_sensor_start_offset = OCTO_SENSOR_START; 1010 893 priv->num_virtual_temp_sensors = OCTO_NUM_VIRTUAL_SENSORS; 1011 894 priv->virtual_temp_sensor_start_offset = OCTO_VIRTUAL_SENSORS_START; 1012 1012 - priv->power_cycle_count_offset = OCTO_POWER_CYCLES; 895 895 + priv->temp_ctrl_offset = OCTO_TEMP_CTRL_OFFSET; 896 896 + 1013 897 priv->buffer_size = OCTO_CTRL_REPORT_SIZE; 898 898 + 899 899 + priv->power_cycle_count_offset = OCTO_POWER_CYCLES; 1014 900 1015 901 priv->temp_label = label_temp_sensors; 1016 902 priv->virtual_temp_label = label_virtual_temp_sensors; ··· 1029 907 priv->num_fans = QUADRO_NUM_FANS; 1030 908 priv->fan_sensor_offsets = quadro_sensor_fan_offsets; 1031 909 priv->fan_ctrl_offsets = quadro_ctrl_fan_offsets; 910 910 + 1032 911 priv->num_temp_sensors = QUADRO_NUM_SENSORS; 1033 912 priv->temp_sensor_start_offset = QUADRO_SENSOR_START; 1034 913 priv->num_virtual_temp_sensors = QUADRO_NUM_VIRTUAL_SENSORS; 1035 914 priv->virtual_temp_sensor_start_offset = QUADRO_VIRTUAL_SENSORS_START; 1036 1036 - priv->power_cycle_count_offset = QUADRO_POWER_CYCLES; 915 915 + priv->temp_ctrl_offset = QUADRO_TEMP_CTRL_OFFSET; 916 916 + 1037 917 priv->buffer_size = QUADRO_CTRL_REPORT_SIZE; 918 918 + 1038 919 priv->flow_sensor_offset = QUADRO_FLOW_SENSOR_OFFSET; 920 920 + priv->flow_pulses_ctrl_offset = QUADRO_FLOW_PULSES_CTRL_OFFSET; 921 921 + priv->power_cycle_count_offset = QUADRO_POWER_CYCLES; 1039 922 1040 923 priv->temp_label = label_temp_sensors; 1041 924 priv->virtual_temp_label = label_virtual_temp_sensors; ··· 1053 926 priv->kind = highflownext; 1054 927 1055 928 priv->num_fans = 0; 929 929 + 1056 930 priv->num_temp_sensors = HIGHFLOWNEXT_NUM_SENSORS; 1057 931 priv->temp_sensor_start_offset = HIGHFLOWNEXT_SENSOR_START; 932 932 + 1058 933 priv->power_cycle_count_offset = QUADRO_POWER_CYCLES; 1059 934 1060 935 priv->temp_label = label_highflownext_temp_sensors;

+1

drivers/hwmon/atxp1.c

reviewed

··· 16 16 #include <linux/hwmon.h> 17 17 #include <linux/hwmon-vid.h> 18 18 #include <linux/err.h> 19 19 + #include <linux/kstrtox.h> 19 20 #include <linux/mutex.h> 20 21 #include <linux/sysfs.h> 21 22 #include <linux/slab.h>

+140 -102

drivers/hwmon/coretemp.c

reviewed

··· 55 55 56 56 /* 57 57 * Per-Core Temperature Data 58 58 + * @tjmax: The static tjmax value when tjmax cannot be retrieved from 59 59 + * IA32_TEMPERATURE_TARGET MSR. 58 60 * @last_updated: The time when the current temperature value was updated 59 61 * earlier (in jiffies). 60 62 * @cpu_core_id: The CPU Core from which temperature values should be read ··· 66 64 * @attr_size: Total number of pre-core attrs displayed in the sysfs. 67 65 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. 68 66 * Otherwise, temp_data holds coretemp data. 69 69 - * @valid: If this is 1, the current temperature is valid. 70 67 */ 71 68 struct temp_data { 72 69 int temp; 73 73 - int ttarget; 74 70 int tjmax; 75 71 unsigned long last_updated; 76 72 unsigned int cpu; ··· 76 76 u32 status_reg; 77 77 int attr_size; 78 78 bool is_pkg_data; 79 79 - bool valid; 80 79 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; 81 80 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; 82 81 struct attribute *attrs[TOTAL_ATTRS + 1]; ··· 93 94 struct temp_data *core_data[MAX_CORE_DATA]; 94 95 struct device_attribute name_attr; 95 96 }; 96 96 - 97 97 - /* Keep track of how many zone pointers we allocated in init() */ 98 98 - static int max_zones __read_mostly; 99 99 - /* Array of zone pointers. Serialized by cpu hotplug lock */ 100 100 - static struct platform_device **zone_devices; 101 101 - 102 102 - static ssize_t show_label(struct device *dev, 103 103 - struct device_attribute *devattr, char *buf) 104 104 - { 105 105 - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 106 106 - struct platform_data *pdata = dev_get_drvdata(dev); 107 107 - struct temp_data *tdata = pdata->core_data[attr->index]; 108 108 - 109 109 - if (tdata->is_pkg_data) 110 110 - return sprintf(buf, "Package id %u\n", pdata->pkg_id); 111 111 - 112 112 - return sprintf(buf, "Core %u\n", tdata->cpu_core_id); 113 113 - } 114 114 - 115 115 - static ssize_t show_crit_alarm(struct device *dev, 116 116 - struct device_attribute *devattr, char *buf) 117 117 - { 118 118 - u32 eax, edx; 119 119 - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 120 120 - struct platform_data *pdata = dev_get_drvdata(dev); 121 121 - struct temp_data *tdata = pdata->core_data[attr->index]; 122 122 - 123 123 - mutex_lock(&tdata->update_lock); 124 124 - rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 125 125 - mutex_unlock(&tdata->update_lock); 126 126 - 127 127 - return sprintf(buf, "%d\n", (eax >> 5) & 1); 128 128 - } 129 129 - 130 130 - static ssize_t show_tjmax(struct device *dev, 131 131 - struct device_attribute *devattr, char *buf) 132 132 - { 133 133 - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 134 134 - struct platform_data *pdata = dev_get_drvdata(dev); 135 135 - 136 136 - return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); 137 137 - } 138 138 - 139 139 - static ssize_t show_ttarget(struct device *dev, 140 140 - struct device_attribute *devattr, char *buf) 141 141 - { 142 142 - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 143 143 - struct platform_data *pdata = dev_get_drvdata(dev); 144 144 - 145 145 - return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); 146 146 - } 147 147 - 148 148 - static ssize_t show_temp(struct device *dev, 149 149 - struct device_attribute *devattr, char *buf) 150 150 - { 151 151 - u32 eax, edx; 152 152 - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 153 153 - struct platform_data *pdata = dev_get_drvdata(dev); 154 154 - struct temp_data *tdata = pdata->core_data[attr->index]; 155 155 - 156 156 - mutex_lock(&tdata->update_lock); 157 157 - 158 158 - /* Check whether the time interval has elapsed */ 159 159 - if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { 160 160 - rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 161 161 - /* 162 162 - * Ignore the valid bit. In all observed cases the register 163 163 - * value is either low or zero if the valid bit is 0. 164 164 - * Return it instead of reporting an error which doesn't 165 165 - * really help at all. 166 166 - */ 167 167 - tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000; 168 168 - tdata->valid = true; 169 169 - tdata->last_updated = jiffies; 170 170 - } 171 171 - 172 172 - mutex_unlock(&tdata->update_lock); 173 173 - return sprintf(buf, "%d\n", tdata->temp); 174 174 - } 175 97 176 98 struct tjmax_pci { 177 99 unsigned int device; ··· 260 340 model != 0x36; 261 341 } 262 342 263 263 - static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 343 343 + static int get_tjmax(struct temp_data *tdata, struct device *dev) 264 344 { 345 345 + struct cpuinfo_x86 *c = &cpu_data(tdata->cpu); 265 346 int err; 266 347 u32 eax, edx; 267 348 u32 val; 349 349 + 350 350 + /* use static tjmax once it is set */ 351 351 + if (tdata->tjmax) 352 352 + return tdata->tjmax; 268 353 269 354 /* 270 355 * A new feature of current Intel(R) processors, the 271 356 * IA32_TEMPERATURE_TARGET contains the TjMax value 272 357 */ 273 273 - err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); 358 358 + err = rdmsr_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); 274 359 if (err) { 275 360 if (cpu_has_tjmax(c)) 276 276 - dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); 361 361 + dev_warn(dev, "Unable to read TjMax from CPU %u\n", tdata->cpu); 277 362 } else { 278 363 val = (eax >> 16) & 0xff; 279 364 /* ··· 294 369 if (force_tjmax) { 295 370 dev_notice(dev, "TjMax forced to %d degrees C by user\n", 296 371 force_tjmax); 297 297 - return force_tjmax * 1000; 372 372 + tdata->tjmax = force_tjmax * 1000; 373 373 + } else { 374 374 + /* 375 375 + * An assumption is made for early CPUs and unreadable MSR. 376 376 + * NOTE: the calculated value may not be correct. 377 377 + */ 378 378 + tdata->tjmax = adjust_tjmax(c, tdata->cpu, dev); 298 379 } 380 380 + return tdata->tjmax; 381 381 + } 382 382 + 383 383 + static int get_ttarget(struct temp_data *tdata, struct device *dev) 384 384 + { 385 385 + u32 eax, edx; 386 386 + int tjmax, ttarget_offset, ret; 299 387 300 388 /* 301 301 - * An assumption is made for early CPUs and unreadable MSR. 302 302 - * NOTE: the calculated value may not be correct. 389 389 + * ttarget is valid only if tjmax can be retrieved from 390 390 + * MSR_IA32_TEMPERATURE_TARGET 303 391 */ 304 304 - return adjust_tjmax(c, id, dev); 392 392 + if (tdata->tjmax) 393 393 + return -ENODEV; 394 394 + 395 395 + ret = rdmsr_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); 396 396 + if (ret) 397 397 + return ret; 398 398 + 399 399 + tjmax = (eax >> 16) & 0xff; 400 400 + 401 401 + /* Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. */ 402 402 + ttarget_offset = (eax >> 8) & 0xff; 403 403 + 404 404 + return (tjmax - ttarget_offset) * 1000; 405 405 + } 406 406 + 407 407 + /* Keep track of how many zone pointers we allocated in init() */ 408 408 + static int max_zones __read_mostly; 409 409 + /* Array of zone pointers. Serialized by cpu hotplug lock */ 410 410 + static struct platform_device **zone_devices; 411 411 + 412 412 + static ssize_t show_label(struct device *dev, 413 413 + struct device_attribute *devattr, char *buf) 414 414 + { 415 415 + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 416 416 + struct platform_data *pdata = dev_get_drvdata(dev); 417 417 + struct temp_data *tdata = pdata->core_data[attr->index]; 418 418 + 419 419 + if (tdata->is_pkg_data) 420 420 + return sprintf(buf, "Package id %u\n", pdata->pkg_id); 421 421 + 422 422 + return sprintf(buf, "Core %u\n", tdata->cpu_core_id); 423 423 + } 424 424 + 425 425 + static ssize_t show_crit_alarm(struct device *dev, 426 426 + struct device_attribute *devattr, char *buf) 427 427 + { 428 428 + u32 eax, edx; 429 429 + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 430 430 + struct platform_data *pdata = dev_get_drvdata(dev); 431 431 + struct temp_data *tdata = pdata->core_data[attr->index]; 432 432 + 433 433 + mutex_lock(&tdata->update_lock); 434 434 + rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 435 435 + mutex_unlock(&tdata->update_lock); 436 436 + 437 437 + return sprintf(buf, "%d\n", (eax >> 5) & 1); 438 438 + } 439 439 + 440 440 + static ssize_t show_tjmax(struct device *dev, 441 441 + struct device_attribute *devattr, char *buf) 442 442 + { 443 443 + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 444 444 + struct platform_data *pdata = dev_get_drvdata(dev); 445 445 + struct temp_data *tdata = pdata->core_data[attr->index]; 446 446 + int tjmax; 447 447 + 448 448 + mutex_lock(&tdata->update_lock); 449 449 + tjmax = get_tjmax(tdata, dev); 450 450 + mutex_unlock(&tdata->update_lock); 451 451 + 452 452 + return sprintf(buf, "%d\n", tjmax); 453 453 + } 454 454 + 455 455 + static ssize_t show_ttarget(struct device *dev, 456 456 + struct device_attribute *devattr, char *buf) 457 457 + { 458 458 + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 459 459 + struct platform_data *pdata = dev_get_drvdata(dev); 460 460 + struct temp_data *tdata = pdata->core_data[attr->index]; 461 461 + int ttarget; 462 462 + 463 463 + mutex_lock(&tdata->update_lock); 464 464 + ttarget = get_ttarget(tdata, dev); 465 465 + mutex_unlock(&tdata->update_lock); 466 466 + 467 467 + if (ttarget < 0) 468 468 + return ttarget; 469 469 + return sprintf(buf, "%d\n", ttarget); 470 470 + } 471 471 + 472 472 + static ssize_t show_temp(struct device *dev, 473 473 + struct device_attribute *devattr, char *buf) 474 474 + { 475 475 + u32 eax, edx; 476 476 + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 477 477 + struct platform_data *pdata = dev_get_drvdata(dev); 478 478 + struct temp_data *tdata = pdata->core_data[attr->index]; 479 479 + int tjmax; 480 480 + 481 481 + mutex_lock(&tdata->update_lock); 482 482 + 483 483 + tjmax = get_tjmax(tdata, dev); 484 484 + /* Check whether the time interval has elapsed */ 485 485 + if (time_after(jiffies, tdata->last_updated + HZ)) { 486 486 + rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 487 487 + /* 488 488 + * Ignore the valid bit. In all observed cases the register 489 489 + * value is either low or zero if the valid bit is 0. 490 490 + * Return it instead of reporting an error which doesn't 491 491 + * really help at all. 492 492 + */ 493 493 + tdata->temp = tjmax - ((eax >> 16) & 0x7f) * 1000; 494 494 + tdata->last_updated = jiffies; 495 495 + } 496 496 + 497 497 + mutex_unlock(&tdata->update_lock); 498 498 + return sprintf(buf, "%d\n", tdata->temp); 305 499 } 306 500 307 501 static int create_core_attrs(struct temp_data *tdata, struct device *dev, ··· 534 490 if (err) 535 491 goto exit_free; 536 492 537 537 - /* We can access status register. Get Critical Temperature */ 538 538 - tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); 493 493 + /* Make sure tdata->tjmax is a valid indicator for dynamic/static tjmax */ 494 494 + get_tjmax(tdata, &pdev->dev); 539 495 540 496 /* 541 541 - * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. 542 542 - * The target temperature is available on older CPUs but not in this 543 543 - * register. Atoms don't have the register at all. 497 497 + * The target temperature is available on older CPUs but not in the 498 498 + * MSR_IA32_TEMPERATURE_TARGET register. Atoms don't have the register 499 499 + * at all. 544 500 */ 545 545 - if (c->x86_model > 0xe && c->x86_model != 0x1c) { 546 546 - err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, 547 547 - &eax, &edx); 548 548 - if (!err) { 549 549 - tdata->ttarget 550 550 - = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; 501 501 + if (c->x86_model > 0xe && c->x86_model != 0x1c) 502 502 + if (get_ttarget(tdata, &pdev->dev) >= 0) 551 503 tdata->attr_size++; 552 552 - } 553 553 - } 554 504 555 505 pdata->core_data[attr_no] = tdata; 556 506

+2 -1

drivers/hwmon/dell-smm-hwmon.c

reviewed

··· 1447 1447 */ 1448 1448 if (i8k_get_dell_signature(I8K_SMM_GET_DELL_SIG1) && 1449 1449 i8k_get_dell_signature(I8K_SMM_GET_DELL_SIG2)) { 1450 1450 - pr_err("unable to get SMM Dell signature\n"); 1451 1450 if (!force) 1452 1451 return -ENODEV; 1452 1452 + 1453 1453 + pr_err("Unable to get Dell SMM signature\n"); 1453 1454 } 1454 1455 1455 1456 dell_smm_device = platform_create_bundle(&dell_smm_driver, dell_smm_probe, NULL, 0, NULL,

+1 -1

drivers/hwmon/ds1621.c

reviewed

··· 269 269 struct device_attribute *da, char *buf) 270 270 { 271 271 struct ds1621_data *data = dev_get_drvdata(dev); 272 272 - return scnprintf(buf, PAGE_SIZE, "%hu\n", data->update_interval); 272 272 + return sysfs_emit(buf, "%hu\n", data->update_interval); 273 273 } 274 274 275 275 static ssize_t update_interval_store(struct device *dev,

+27 -21

drivers/hwmon/emc2305.c

reviewed

··· 16 16 emc2305_normal_i2c[] = { 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d, I2C_CLIENT_END }; 17 17 18 18 #define EMC2305_REG_DRIVE_FAIL_STATUS 0x27 19 19 - #define EMC2305_REG_DEVICE 0xfd 20 19 #define EMC2305_REG_VENDOR 0xfe 21 20 #define EMC2305_FAN_MAX 0xff 22 21 #define EMC2305_FAN_MIN 0x00 ··· 171 172 return 0; 172 173 } 173 174 174 174 - static int emc2305_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) 175 175 + static int __emc2305_set_cur_state(struct emc2305_data *data, int cdev_idx, unsigned long state) 175 176 { 176 176 - int cdev_idx, ret; 177 177 - struct emc2305_data *data = cdev->devdata; 177 177 + int ret; 178 178 struct i2c_client *client = data->client; 179 179 u8 val, i; 180 180 181 181 - if (state > data->max_state) 182 182 - return -EINVAL; 183 183 - 184 184 - cdev_idx = emc2305_get_cdev_idx(cdev); 185 185 - if (cdev_idx < 0) 186 186 - return cdev_idx; 187 187 - 188 188 - /* Save thermal state. */ 189 189 - data->cdev_data[cdev_idx].last_thermal_state = state; 190 181 state = max_t(unsigned long, state, data->cdev_data[cdev_idx].last_hwmon_state); 191 182 192 183 val = EMC2305_PWM_STATE2DUTY(state, data->max_state, EMC2305_FAN_MAX); ··· 197 208 return ret; 198 209 } 199 210 } 211 211 + 212 212 + return 0; 213 213 + } 214 214 + 215 215 + static int emc2305_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) 216 216 + { 217 217 + int cdev_idx, ret; 218 218 + struct emc2305_data *data = cdev->devdata; 219 219 + 220 220 + if (state > data->max_state) 221 221 + return -EINVAL; 222 222 + 223 223 + cdev_idx = emc2305_get_cdev_idx(cdev); 224 224 + if (cdev_idx < 0) 225 225 + return cdev_idx; 226 226 + 227 227 + /* Save thermal state. */ 228 228 + data->cdev_data[cdev_idx].last_thermal_state = state; 229 229 + ret = __emc2305_set_cur_state(data, cdev_idx, state); 230 230 + if (ret < 0) 231 231 + return ret; 200 232 201 233 return 0; 202 234 } ··· 412 402 */ 413 403 if (data->cdev_data[cdev_idx].last_hwmon_state >= 414 404 data->cdev_data[cdev_idx].last_thermal_state) 415 415 - return emc2305_set_cur_state(data->cdev_data[cdev_idx].cdev, 405 405 + return __emc2305_set_cur_state(data, cdev_idx, 416 406 data->cdev_data[cdev_idx].last_hwmon_state); 417 407 return 0; 418 408 } ··· 528 518 return 0; 529 519 } 530 520 531 531 - static int emc2305_probe(struct i2c_client *client, const struct i2c_device_id *id) 521 521 + static int emc2305_probe(struct i2c_client *client) 532 522 { 533 523 struct i2c_adapter *adapter = client->adapter; 534 524 struct device *dev = &client->dev; 535 525 struct emc2305_data *data; 536 526 struct emc2305_platform_data *pdata; 537 537 - int vendor, device; 527 527 + int vendor; 538 528 int ret; 539 529 int i; 540 530 ··· 543 533 544 534 vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR); 545 535 if (vendor != EMC2305_VENDOR) 546 546 - return -ENODEV; 547 547 - 548 548 - device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE); 549 549 - if (device != EMC2305_DEVICE) 550 536 return -ENODEV; 551 537 552 538 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ··· 613 607 .driver = { 614 608 .name = "emc2305", 615 609 }, 616 616 - .probe = emc2305_probe, 610 610 + .probe_new = emc2305_probe, 617 611 .remove = emc2305_remove, 618 612 .id_table = emc2305_ids, 619 613 .address_list = emc2305_normal_i2c,

+2 -2

drivers/hwmon/fschmd.c

reviewed

··· 1083 1083 static int fschmd_probe(struct i2c_client *client) 1084 1084 { 1085 1085 struct fschmd_data *data; 1086 1086 - const char * const names[7] = { "Poseidon", "Hermes", "Scylla", 1086 1086 + static const char * const names[7] = { "Poseidon", "Hermes", "Scylla", 1087 1087 "Heracles", "Heimdall", "Hades", "Syleus" }; 1088 1088 - const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 }; 1088 1088 + static const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 }; 1089 1089 int i, err; 1090 1090 enum chips kind = i2c_match_id(fschmd_id, client)->driver_data; 1091 1091

+1

drivers/hwmon/gpio-fan.c

reviewed

··· 14 14 #include <linux/irq.h> 15 15 #include <linux/platform_device.h> 16 16 #include <linux/err.h> 17 17 + #include <linux/kstrtox.h> 17 18 #include <linux/mutex.h> 18 19 #include <linux/hwmon.h> 19 20 #include <linux/gpio/consumer.h>

+2 -4

drivers/hwmon/gsc-hwmon.c

reviewed

··· 257 257 if (nchannels == 0) 258 258 return ERR_PTR(-ENODEV); 259 259 260 260 - pdata = devm_kzalloc(dev, 261 261 - sizeof(*pdata) + nchannels * sizeof(*ch), 260 260 + pdata = devm_kzalloc(dev, struct_size(pdata, channels, nchannels), 262 261 GFP_KERNEL); 263 262 if (!pdata) 264 263 return ERR_PTR(-ENOMEM); 265 265 - ch = (struct gsc_hwmon_channel *)(pdata + 1); 266 266 - pdata->channels = ch; 267 264 pdata->nchannels = nchannels; 268 265 269 266 /* fan controller base address */ ··· 274 277 275 278 of_node_put(fan); 276 279 280 280 + ch = pdata->channels; 277 281 /* allocate structures for channels and count instances of each type */ 278 282 device_for_each_child_node(dev, child) { 279 283 if (fwnode_property_read_string(child, "label", &ch->name)) {

+1

drivers/hwmon/hwmon.c

reviewed

··· 15 15 #include <linux/gfp.h> 16 16 #include <linux/hwmon.h> 17 17 #include <linux/idr.h> 18 18 + #include <linux/kstrtox.h> 18 19 #include <linux/list.h> 19 20 #include <linux/module.h> 20 21 #include <linux/pci.h>

+68 -22

drivers/hwmon/it87.c

reviewed

··· 69 69 module_param(force_id, ushort, 0); 70 70 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 71 71 72 72 + static bool ignore_resource_conflict; 73 73 + module_param(ignore_resource_conflict, bool, 0); 74 74 + MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict"); 75 75 + 72 76 static struct platform_device *it87_pdev[2]; 73 77 74 78 #define REG_2E 0x2e /* The register to read/write */ ··· 566 562 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */ 567 563 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */ 568 564 }; 565 565 + 566 566 + /* Board specific settings from DMI matching */ 567 567 + struct it87_dmi_data { 568 568 + u8 skip_pwm; /* pwm channels to skip for this board */ 569 569 + }; 570 570 + 571 571 + /* Global for results from DMI matching, if needed */ 572 572 + static struct it87_dmi_data *dmi_data; 569 573 570 574 static int adc_lsb(const struct it87_data *data, int nr) 571 575 { ··· 2401 2389 { 2402 2390 int err; 2403 2391 u16 chip_type; 2404 2404 - const char *board_vendor, *board_name; 2405 2392 const struct it87_devices *config; 2406 2393 2407 2394 err = superio_enter(sioaddr); ··· 2408 2397 return err; 2409 2398 2410 2399 err = -ENODEV; 2411 2411 - chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID); 2400 2400 + chip_type = superio_inw(sioaddr, DEVID); 2401 2401 + /* check first for a valid chip before forcing chip id */ 2402 2402 + if (chip_type == 0xffff) 2403 2403 + goto exit; 2404 2404 + 2405 2405 + if (force_id) 2406 2406 + chip_type = force_id; 2412 2407 2413 2408 switch (chip_type) { 2414 2409 case IT8705F_DEVID: ··· 2819 2802 if (sio_data->beep_pin) 2820 2803 pr_info("Beeping is supported\n"); 2821 2804 2822 2822 - /* Disable specific features based on DMI strings */ 2823 2823 - board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 2824 2824 - board_name = dmi_get_system_info(DMI_BOARD_NAME); 2825 2825 - if (board_vendor && board_name) { 2826 2826 - if (strcmp(board_vendor, "nVIDIA") == 0 && 2827 2827 - strcmp(board_name, "FN68PT") == 0) { 2828 2828 - /* 2829 2829 - * On the Shuttle SN68PT, FAN_CTL2 is apparently not 2830 2830 - * connected to a fan, but to something else. One user 2831 2831 - * has reported instant system power-off when changing 2832 2832 - * the PWM2 duty cycle, so we disable it. 2833 2833 - * I use the board name string as the trigger in case 2834 2834 - * the same board is ever used in other systems. 2835 2835 - */ 2836 2836 - pr_info("Disabling pwm2 due to hardware constraints\n"); 2837 2837 - sio_data->skip_pwm = BIT(1); 2838 2838 - } 2839 2839 - } 2805 2805 + /* Set values based on DMI matches */ 2806 2806 + if (dmi_data) 2807 2807 + sio_data->skip_pwm |= dmi_data->skip_pwm; 2840 2808 2841 2809 exit: 2842 2810 superio_exit(sioaddr); ··· 3263 3261 int err; 3264 3262 3265 3263 err = acpi_check_resource_conflict(&res); 3266 3266 - if (err) 3267 3267 - return err; 3264 3264 + if (err) { 3265 3265 + if (!ignore_resource_conflict) 3266 3266 + return err; 3267 3267 + } 3268 3268 3269 3269 pdev = platform_device_alloc(DRVNAME, address); 3270 3270 if (!pdev) ··· 3299 3295 return err; 3300 3296 } 3301 3297 3298 3298 + /* callback function for DMI */ 3299 3299 + static int it87_dmi_cb(const struct dmi_system_id *dmi_entry) 3300 3300 + { 3301 3301 + dmi_data = dmi_entry->driver_data; 3302 3302 + 3303 3303 + if (dmi_data && dmi_data->skip_pwm) 3304 3304 + pr_info("Disabling pwm2 due to hardware constraints\n"); 3305 3305 + 3306 3306 + return 1; 3307 3307 + } 3308 3308 + 3309 3309 + /* 3310 3310 + * On the Shuttle SN68PT, FAN_CTL2 is apparently not 3311 3311 + * connected to a fan, but to something else. One user 3312 3312 + * has reported instant system power-off when changing 3313 3313 + * the PWM2 duty cycle, so we disable it. 3314 3314 + * I use the board name string as the trigger in case 3315 3315 + * the same board is ever used in other systems. 3316 3316 + */ 3317 3317 + static struct it87_dmi_data nvidia_fn68pt = { 3318 3318 + .skip_pwm = BIT(1), 3319 3319 + }; 3320 3320 + 3321 3321 + #define IT87_DMI_MATCH_VND(vendor, name, cb, data) \ 3322 3322 + { \ 3323 3323 + .callback = cb, \ 3324 3324 + .matches = { \ 3325 3325 + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, vendor), \ 3326 3326 + DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \ 3327 3327 + }, \ 3328 3328 + .driver_data = data, \ 3329 3329 + } 3330 3330 + 3331 3331 + static const struct dmi_system_id it87_dmi_table[] __initconst = { 3332 3332 + IT87_DMI_MATCH_VND("nVIDIA", "FN68PT", it87_dmi_cb, &nvidia_fn68pt), 3333 3333 + { } 3334 3334 + 3335 3335 + }; 3336 3336 + MODULE_DEVICE_TABLE(dmi, it87_dmi_table); 3337 3337 + 3302 3338 static int __init sm_it87_init(void) 3303 3339 { 3304 3340 int sioaddr[2] = { REG_2E, REG_4E }; ··· 3350 3306 err = platform_driver_register(&it87_driver); 3351 3307 if (err) 3352 3308 return err; 3309 3309 + 3310 3310 + dmi_check_system(it87_dmi_table); 3353 3311 3354 3312 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) { 3355 3313 memset(&sio_data, 0, sizeof(struct it87_sio_data));

+155 -118

drivers/hwmon/jc42.c

reviewed

··· 10 10 */ 11 11 12 12 #include <linux/bitops.h> 13 13 + #include <linux/bitfield.h> 13 14 #include <linux/module.h> 14 15 #include <linux/init.h> 15 16 #include <linux/slab.h> ··· 20 19 #include <linux/err.h> 21 20 #include <linux/mutex.h> 22 21 #include <linux/of.h> 22 22 + #include <linux/regmap.h> 23 23 24 24 /* Addresses to scan */ 25 25 static const unsigned short normal_i2c[] = { ··· 38 36 #define JC42_REG_SMBUS 0x22 /* NXP and Atmel, possibly others? */ 39 37 40 38 /* Status bits in temperature register */ 41 41 - #define JC42_ALARM_CRIT_BIT 15 42 42 - #define JC42_ALARM_MAX_BIT 14 43 43 - #define JC42_ALARM_MIN_BIT 13 39 39 + #define JC42_ALARM_CRIT BIT(15) 40 40 + #define JC42_ALARM_MAX BIT(14) 41 41 + #define JC42_ALARM_MIN BIT(13) 44 42 45 43 /* Configuration register defines */ 46 46 - #define JC42_CFG_CRIT_ONLY (1 << 2) 47 47 - #define JC42_CFG_TCRIT_LOCK (1 << 6) 48 48 - #define JC42_CFG_EVENT_LOCK (1 << 7) 49 49 - #define JC42_CFG_SHUTDOWN (1 << 8) 50 50 - #define JC42_CFG_HYST_SHIFT 9 51 51 - #define JC42_CFG_HYST_MASK (0x03 << 9) 44 44 + #define JC42_CFG_CRIT_ONLY BIT(2) 45 45 + #define JC42_CFG_TCRIT_LOCK BIT(6) 46 46 + #define JC42_CFG_EVENT_LOCK BIT(7) 47 47 + #define JC42_CFG_SHUTDOWN BIT(8) 48 48 + #define JC42_CFG_HYST_MASK GENMASK(10, 9) 52 49 53 50 /* Capabilities */ 54 54 - #define JC42_CAP_RANGE (1 << 2) 51 51 + #define JC42_CAP_RANGE BIT(2) 55 52 56 53 /* Manufacturer IDs */ 57 54 #define ADT_MANID 0x11d4 /* Analog Devices */ ··· 200 199 { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK }, 201 200 }; 202 201 203 203 - enum temp_index { 204 204 - t_input = 0, 205 205 - t_crit, 206 206 - t_min, 207 207 - t_max, 208 208 - t_num_temp 209 209 - }; 210 210 - 211 211 - static const u8 temp_regs[t_num_temp] = { 212 212 - [t_input] = JC42_REG_TEMP, 213 213 - [t_crit] = JC42_REG_TEMP_CRITICAL, 214 214 - [t_min] = JC42_REG_TEMP_LOWER, 215 215 - [t_max] = JC42_REG_TEMP_UPPER, 216 216 - }; 217 217 - 218 202 /* Each client has this additional data */ 219 203 struct jc42_data { 220 220 - struct i2c_client *client; 221 204 struct mutex update_lock; /* protect register access */ 205 205 + struct regmap *regmap; 222 206 bool extended; /* true if extended range supported */ 223 207 bool valid; 224 224 - unsigned long last_updated; /* In jiffies */ 225 208 u16 orig_config; /* original configuration */ 226 209 u16 config; /* current configuration */ 227 227 - u16 temp[t_num_temp];/* Temperatures */ 228 210 }; 229 211 230 212 #define JC42_TEMP_MIN_EXTENDED (-40000) ··· 232 248 return reg * 125 / 2; 233 249 } 234 250 235 235 - static struct jc42_data *jc42_update_device(struct device *dev) 236 236 - { 237 237 - struct jc42_data *data = dev_get_drvdata(dev); 238 238 - struct i2c_client *client = data->client; 239 239 - struct jc42_data *ret = data; 240 240 - int i, val; 241 241 - 242 242 - mutex_lock(&data->update_lock); 243 243 - 244 244 - if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 245 245 - for (i = 0; i < t_num_temp; i++) { 246 246 - val = i2c_smbus_read_word_swapped(client, temp_regs[i]); 247 247 - if (val < 0) { 248 248 - ret = ERR_PTR(val); 249 249 - goto abort; 250 250 - } 251 251 - data->temp[i] = val; 252 252 - } 253 253 - data->last_updated = jiffies; 254 254 - data->valid = true; 255 255 - } 256 256 - abort: 257 257 - mutex_unlock(&data->update_lock); 258 258 - return ret; 259 259 - } 260 260 - 261 251 static int jc42_read(struct device *dev, enum hwmon_sensor_types type, 262 252 u32 attr, int channel, long *val) 263 253 { 264 264 - struct jc42_data *data = jc42_update_device(dev); 265 265 - int temp, hyst; 254 254 + struct jc42_data *data = dev_get_drvdata(dev); 255 255 + unsigned int regval; 256 256 + int ret, temp, hyst; 266 257 267 267 - if (IS_ERR(data)) 268 268 - return PTR_ERR(data); 258 258 + mutex_lock(&data->update_lock); 269 259 270 260 switch (attr) { 271 261 case hwmon_temp_input: 272 272 - *val = jc42_temp_from_reg(data->temp[t_input]); 273 273 - return 0; 262 262 + ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval); 263 263 + if (ret) 264 264 + break; 265 265 + 266 266 + *val = jc42_temp_from_reg(regval); 267 267 + break; 274 268 case hwmon_temp_min: 275 275 - *val = jc42_temp_from_reg(data->temp[t_min]); 276 276 - return 0; 269 269 + ret = regmap_read(data->regmap, JC42_REG_TEMP_LOWER, &regval); 270 270 + if (ret) 271 271 + break; 272 272 + 273 273 + *val = jc42_temp_from_reg(regval); 274 274 + break; 277 275 case hwmon_temp_max: 278 278 - *val = jc42_temp_from_reg(data->temp[t_max]); 279 279 - return 0; 276 276 + ret = regmap_read(data->regmap, JC42_REG_TEMP_UPPER, &regval); 277 277 + if (ret) 278 278 + break; 279 279 + 280 280 + *val = jc42_temp_from_reg(regval); 281 281 + break; 280 282 case hwmon_temp_crit: 281 281 - *val = jc42_temp_from_reg(data->temp[t_crit]); 282 282 - return 0; 283 283 + ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL, 284 284 + &regval); 285 285 + if (ret) 286 286 + break; 287 287 + 288 288 + *val = jc42_temp_from_reg(regval); 289 289 + break; 283 290 case hwmon_temp_max_hyst: 284 284 - temp = jc42_temp_from_reg(data->temp[t_max]); 285 285 - hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) 286 286 - >> JC42_CFG_HYST_SHIFT]; 291 291 + ret = regmap_read(data->regmap, JC42_REG_TEMP_UPPER, &regval); 292 292 + if (ret) 293 293 + break; 294 294 + 295 295 + temp = jc42_temp_from_reg(regval); 296 296 + hyst = jc42_hysteresis[FIELD_GET(JC42_CFG_HYST_MASK, 297 297 + data->config)]; 287 298 *val = temp - hyst; 288 288 - return 0; 299 299 + break; 289 300 case hwmon_temp_crit_hyst: 290 290 - temp = jc42_temp_from_reg(data->temp[t_crit]); 291 291 - hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) 292 292 - >> JC42_CFG_HYST_SHIFT]; 301 301 + ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL, 302 302 + &regval); 303 303 + if (ret) 304 304 + break; 305 305 + 306 306 + temp = jc42_temp_from_reg(regval); 307 307 + hyst = jc42_hysteresis[FIELD_GET(JC42_CFG_HYST_MASK, 308 308 + data->config)]; 293 309 *val = temp - hyst; 294 294 - return 0; 310 310 + break; 295 311 case hwmon_temp_min_alarm: 296 296 - *val = (data->temp[t_input] >> JC42_ALARM_MIN_BIT) & 1; 297 297 - return 0; 312 312 + ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval); 313 313 + if (ret) 314 314 + break; 315 315 + 316 316 + *val = FIELD_GET(JC42_ALARM_MIN, regval); 317 317 + break; 298 318 case hwmon_temp_max_alarm: 299 299 - *val = (data->temp[t_input] >> JC42_ALARM_MAX_BIT) & 1; 300 300 - return 0; 319 319 + ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval); 320 320 + if (ret) 321 321 + break; 322 322 + 323 323 + *val = FIELD_GET(JC42_ALARM_MAX, regval); 324 324 + break; 301 325 case hwmon_temp_crit_alarm: 302 302 - *val = (data->temp[t_input] >> JC42_ALARM_CRIT_BIT) & 1; 303 303 - return 0; 326 326 + ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval); 327 327 + if (ret) 328 328 + break; 329 329 + 330 330 + *val = FIELD_GET(JC42_ALARM_CRIT, regval); 331 331 + break; 304 332 default: 305 305 - return -EOPNOTSUPP; 333 333 + ret = -EOPNOTSUPP; 334 334 + break; 306 335 } 336 336 + 337 337 + mutex_unlock(&data->update_lock); 338 338 + 339 339 + return ret; 307 340 } 308 341 309 342 static int jc42_write(struct device *dev, enum hwmon_sensor_types type, 310 343 u32 attr, int channel, long val) 311 344 { 312 345 struct jc42_data *data = dev_get_drvdata(dev); 313 313 - struct i2c_client *client = data->client; 346 346 + unsigned int regval; 314 347 int diff, hyst; 315 348 int ret; 316 349 ··· 335 334 336 335 switch (attr) { 337 336 case hwmon_temp_min: 338 338 - data->temp[t_min] = jc42_temp_to_reg(val, data->extended); 339 339 - ret = i2c_smbus_write_word_swapped(client, temp_regs[t_min], 340 340 - data->temp[t_min]); 337 337 + ret = regmap_write(data->regmap, JC42_REG_TEMP_LOWER, 338 338 + jc42_temp_to_reg(val, data->extended)); 341 339 break; 342 340 case hwmon_temp_max: 343 343 - data->temp[t_max] = jc42_temp_to_reg(val, data->extended); 344 344 - ret = i2c_smbus_write_word_swapped(client, temp_regs[t_max], 345 345 - data->temp[t_max]); 341 341 + ret = regmap_write(data->regmap, JC42_REG_TEMP_UPPER, 342 342 + jc42_temp_to_reg(val, data->extended)); 346 343 break; 347 344 case hwmon_temp_crit: 348 348 - data->temp[t_crit] = jc42_temp_to_reg(val, data->extended); 349 349 - ret = i2c_smbus_write_word_swapped(client, temp_regs[t_crit], 350 350 - data->temp[t_crit]); 345 345 + ret = regmap_write(data->regmap, JC42_REG_TEMP_CRITICAL, 346 346 + jc42_temp_to_reg(val, data->extended)); 351 347 break; 352 348 case hwmon_temp_crit_hyst: 349 349 + ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL, 350 350 + &regval); 351 351 + if (ret) 352 352 + break; 353 353 + 353 354 /* 354 355 * JC42.4 compliant chips only support four hysteresis values. 355 356 * Pick best choice and go from there. ··· 359 356 val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED 360 357 : JC42_TEMP_MIN) - 6000, 361 358 JC42_TEMP_MAX); 362 362 - diff = jc42_temp_from_reg(data->temp[t_crit]) - val; 359 359 + diff = jc42_temp_from_reg(regval) - val; 363 360 hyst = 0; 364 361 if (diff > 0) { 365 362 if (diff < 2250) ··· 370 367 hyst = 3; /* 6.0 degrees C */ 371 368 } 372 369 data->config = (data->config & ~JC42_CFG_HYST_MASK) | 373 373 - (hyst << JC42_CFG_HYST_SHIFT); 374 374 - ret = i2c_smbus_write_word_swapped(data->client, 375 375 - JC42_REG_CONFIG, 376 376 - data->config); 370 370 + FIELD_PREP(JC42_CFG_HYST_MASK, hyst); 371 371 + ret = regmap_write(data->regmap, JC42_REG_CONFIG, 372 372 + data->config); 377 373 break; 378 374 default: 379 375 ret = -EOPNOTSUPP; ··· 472 470 .info = jc42_info, 473 471 }; 474 472 473 473 + static bool jc42_readable_reg(struct device *dev, unsigned int reg) 474 474 + { 475 475 + return (reg >= JC42_REG_CAP && reg <= JC42_REG_DEVICEID) || 476 476 + reg == JC42_REG_SMBUS; 477 477 + } 478 478 + 479 479 + static bool jc42_writable_reg(struct device *dev, unsigned int reg) 480 480 + { 481 481 + return (reg >= JC42_REG_CONFIG && reg <= JC42_REG_TEMP_CRITICAL) || 482 482 + reg == JC42_REG_SMBUS; 483 483 + } 484 484 + 485 485 + static bool jc42_volatile_reg(struct device *dev, unsigned int reg) 486 486 + { 487 487 + return reg == JC42_REG_CONFIG || reg == JC42_REG_TEMP; 488 488 + } 489 489 + 490 490 + static const struct regmap_config jc42_regmap_config = { 491 491 + .reg_bits = 8, 492 492 + .val_bits = 16, 493 493 + .val_format_endian = REGMAP_ENDIAN_BIG, 494 494 + .max_register = JC42_REG_SMBUS, 495 495 + .writeable_reg = jc42_writable_reg, 496 496 + .readable_reg = jc42_readable_reg, 497 497 + .volatile_reg = jc42_volatile_reg, 498 498 + .cache_type = REGCACHE_RBTREE, 499 499 + }; 500 500 + 475 501 static int jc42_probe(struct i2c_client *client) 476 502 { 477 503 struct device *dev = &client->dev; 478 504 struct device *hwmon_dev; 505 505 + unsigned int config, cap; 479 506 struct jc42_data *data; 480 480 - int config, cap; 507 507 + int ret; 481 508 482 509 data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL); 483 510 if (!data) 484 511 return -ENOMEM; 485 512 486 486 - data->client = client; 513 513 + data->regmap = devm_regmap_init_i2c(client, &jc42_regmap_config); 514 514 + if (IS_ERR(data->regmap)) 515 515 + return PTR_ERR(data->regmap); 516 516 + 487 517 i2c_set_clientdata(client, data); 488 518 mutex_init(&data->update_lock); 489 519 490 490 - cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); 491 491 - if (cap < 0) 492 492 - return cap; 520 520 + ret = regmap_read(data->regmap, JC42_REG_CAP, &cap); 521 521 + if (ret) 522 522 + return ret; 493 523 494 524 data->extended = !!(cap & JC42_CAP_RANGE); 495 525 496 526 if (device_property_read_bool(dev, "smbus-timeout-disable")) { 497 497 - int smbus; 498 498 - 499 527 /* 500 528 * Not all chips support this register, but from a 501 529 * quick read of various datasheets no chip appears 502 530 * incompatible with the below attempt to disable 503 531 * the timeout. And the whole thing is opt-in... 504 532 */ 505 505 - smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS); 506 506 - if (smbus < 0) 507 507 - return smbus; 508 508 - i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS, 509 509 - smbus | SMBUS_STMOUT); 533 533 + ret = regmap_set_bits(data->regmap, JC42_REG_SMBUS, 534 534 + SMBUS_STMOUT); 535 535 + if (ret) 536 536 + return ret; 510 537 } 511 538 512 512 - config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); 513 513 - if (config < 0) 514 514 - return config; 539 539 + ret = regmap_read(data->regmap, JC42_REG_CONFIG, &config); 540 540 + if (ret) 541 541 + return ret; 515 542 516 543 data->orig_config = config; 517 544 if (config & JC42_CFG_SHUTDOWN) { 518 545 config &= ~JC42_CFG_SHUTDOWN; 519 519 - i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); 546 546 + regmap_write(data->regmap, JC42_REG_CONFIG, config); 520 547 } 521 548 data->config = config; 522 549 ··· 566 535 567 536 config = (data->orig_config & ~JC42_CFG_HYST_MASK) 568 537 | (data->config & JC42_CFG_HYST_MASK); 569 569 - i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); 538 538 + regmap_write(data->regmap, JC42_REG_CONFIG, config); 570 539 } 571 540 } 572 541 ··· 577 546 struct jc42_data *data = dev_get_drvdata(dev); 578 547 579 548 data->config |= JC42_CFG_SHUTDOWN; 580 580 - i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG, 581 581 - data->config); 549 549 + regmap_write(data->regmap, JC42_REG_CONFIG, data->config); 550 550 + 551 551 + regcache_cache_only(data->regmap, true); 552 552 + regcache_mark_dirty(data->regmap); 553 553 + 582 554 return 0; 583 555 } 584 556 ··· 589 555 { 590 556 struct jc42_data *data = dev_get_drvdata(dev); 591 557 558 558 + regcache_cache_only(data->regmap, false); 559 559 + 592 560 data->config &= ~JC42_CFG_SHUTDOWN; 593 593 - i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG, 594 594 - data->config); 595 595 - return 0; 561 561 + regmap_write(data->regmap, JC42_REG_CONFIG, data->config); 562 562 + 563 563 + /* Restore cached register values to hardware */ 564 564 + return regcache_sync(data->regmap); 596 565 } 597 566 598 567 static const struct dev_pm_ops jc42_dev_pm_ops = {

+3 -3

drivers/hwmon/lm73.c

reviewed

··· 92 92 /* use integer division instead of equivalent right shift to 93 93 guarantee arithmetic shift and preserve the sign */ 94 94 temp = (((s16) err) * 250) / 32; 95 95 - return scnprintf(buf, PAGE_SIZE, "%d\n", temp); 95 95 + return sysfs_emit(buf, "%d\n", temp); 96 96 } 97 97 98 98 static ssize_t convrate_store(struct device *dev, struct device_attribute *da, ··· 137 137 int res; 138 138 139 139 res = (data->ctrl & LM73_CTRL_RES_MASK) >> LM73_CTRL_RES_SHIFT; 140 140 - return scnprintf(buf, PAGE_SIZE, "%hu\n", lm73_convrates[res]); 140 140 + return sysfs_emit(buf, "%hu\n", lm73_convrates[res]); 141 141 } 142 142 143 143 static ssize_t maxmin_alarm_show(struct device *dev, ··· 154 154 data->ctrl = ctrl; 155 155 mutex_unlock(&data->lock); 156 156 157 157 - return scnprintf(buf, PAGE_SIZE, "%d\n", (ctrl >> attr->index) & 1); 157 157 + return sysfs_emit(buf, "%d\n", (ctrl >> attr->index) & 1); 158 158 159 159 abort: 160 160 mutex_unlock(&data->lock);

+3 -18

drivers/hwmon/lm90.c

reviewed

··· 103 103 #include <linux/interrupt.h> 104 104 #include <linux/jiffies.h> 105 105 #include <linux/hwmon.h> 106 106 + #include <linux/kstrtox.h> 106 107 #include <linux/module.h> 107 108 #include <linux/mutex.h> 108 109 #include <linux/of_device.h> ··· 2664 2663 device_remove_file(dev, &dev_attr_pec); 2665 2664 } 2666 2665 2667 2667 - static void lm90_regulator_disable(void *regulator) 2668 2668 - { 2669 2669 - regulator_disable(regulator); 2670 2670 - } 2671 2671 - 2672 2666 static int lm90_probe_channel_from_dt(struct i2c_client *client, 2673 2667 struct device_node *child, 2674 2668 struct lm90_data *data) ··· 2745 2749 struct device *dev = &client->dev; 2746 2750 struct i2c_adapter *adapter = client->adapter; 2747 2751 struct hwmon_channel_info *info; 2748 2748 - struct regulator *regulator; 2749 2752 struct device *hwmon_dev; 2750 2753 struct lm90_data *data; 2751 2754 int err; 2752 2755 2753 2753 - regulator = devm_regulator_get(dev, "vcc"); 2754 2754 - if (IS_ERR(regulator)) 2755 2755 - return PTR_ERR(regulator); 2756 2756 - 2757 2757 - err = regulator_enable(regulator); 2758 2758 - if (err < 0) { 2759 2759 - dev_err(dev, "Failed to enable regulator: %d\n", err); 2760 2760 - return err; 2761 2761 - } 2762 2762 - 2763 2763 - err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator); 2756 2756 + err = devm_regulator_get_enable(dev, "vcc"); 2764 2757 if (err) 2765 2765 - return err; 2758 2758 + return dev_err_probe(dev, err, "Failed to enable regulator\n"); 2766 2759 2767 2760 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL); 2768 2761 if (!data)

+2 -2

drivers/hwmon/ltc2992.c

reviewed

··· 881 881 return 0; 882 882 } 883 883 884 884 - static int ltc2992_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) 884 884 + static int ltc2992_i2c_probe(struct i2c_client *client) 885 885 { 886 886 struct device *hwmon_dev; 887 887 struct ltc2992_state *st; ··· 927 927 .name = "ltc2992", 928 928 .of_match_table = ltc2992_of_match, 929 929 }, 930 930 - .probe = ltc2992_i2c_probe, 930 930 + .probe_new = ltc2992_i2c_probe, 931 931 .id_table = ltc2992_i2c_id, 932 932 }; 933 933

+2 -3

drivers/hwmon/max127.c

reviewed

··· 303 303 .info = max127_info, 304 304 }; 305 305 306 306 - static int max127_probe(struct i2c_client *client, 307 307 - const struct i2c_device_id *id) 306 306 + static int max127_probe(struct i2c_client *client) 308 307 { 309 308 int i; 310 309 struct device *hwmon_dev; ··· 339 340 .driver = { 340 341 .name = "max127", 341 342 }, 342 342 - .probe = max127_probe, 343 343 + .probe_new = max127_probe, 343 344 .id_table = max127_id, 344 345 }; 345 346

+1

drivers/hwmon/mr75203.c

reviewed

··· 11 11 #include <linux/clk.h> 12 12 #include <linux/debugfs.h> 13 13 #include <linux/hwmon.h> 14 14 + #include <linux/kstrtox.h> 14 15 #include <linux/module.h> 15 16 #include <linux/mod_devicetable.h> 16 17 #include <linux/mutex.h>

+7

drivers/hwmon/nct6775-platform.c

reviewed

··· 1043 1043 1044 1044 static const char * const asus_wmi_boards[] = { 1045 1045 "PRO H410T", 1046 1046 + "ProArt B550-CREATOR", 1046 1047 "ProArt X570-CREATOR WIFI", 1048 1048 + "ProArt Z490-CREATOR 10G", 1047 1049 "Pro B550M-C", 1048 1050 "Pro WS X570-ACE", 1049 1051 "PRIME B360-PLUS", ··· 1057 1055 "PRIME X570-P", 1058 1056 "PRIME X570-PRO", 1059 1057 "ROG CROSSHAIR VIII DARK HERO", 1058 1058 + "ROG CROSSHAIR VIII EXTREME", 1060 1059 "ROG CROSSHAIR VIII FORMULA", 1061 1060 "ROG CROSSHAIR VIII HERO", 1061 1061 + "ROG CROSSHAIR VIII HERO (WI-FI)", 1062 1062 "ROG CROSSHAIR VIII IMPACT", 1063 1063 "ROG STRIX B550-A GAMING", 1064 1064 "ROG STRIX B550-E GAMING", ··· 1084 1080 "ROG STRIX Z490-G GAMING (WI-FI)", 1085 1081 "ROG STRIX Z490-H GAMING", 1086 1082 "ROG STRIX Z490-I GAMING", 1083 1083 + "TUF GAMING B550M-E", 1084 1084 + "TUF GAMING B550M-E (WI-FI)", 1087 1085 "TUF GAMING B550M-PLUS", 1088 1086 "TUF GAMING B550M-PLUS (WI-FI)", 1087 1087 + "TUF GAMING B550M-PLUS WIFI II", 1089 1088 "TUF GAMING B550-PLUS", 1090 1089 "TUF GAMING B550-PLUS WIFI II", 1091 1090 "TUF GAMING B550-PRO",

-2

drivers/hwmon/occ/Kconfig

reviewed

··· 6 6 config SENSORS_OCC_P8_I2C 7 7 tristate "POWER8 OCC through I2C" 8 8 depends on I2C 9 9 - depends on ARM || ARM64 || COMPILE_TEST 10 9 select SENSORS_OCC 11 10 help 12 11 This option enables support for monitoring sensors provided by the ··· 20 21 config SENSORS_OCC_P9_SBE 21 22 tristate "POWER9 OCC through SBE" 22 23 depends on FSI_OCC 23 23 - depends on ARM || ARM64 || COMPILE_TEST 24 24 select SENSORS_OCC 25 25 help 26 26 This option enables support for monitoring sensors provided by the

+284

drivers/hwmon/oxp-sensors.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0+ 2 2 + /* 3 3 + * Platform driver for OXP Handhelds that expose fan reading and control 4 4 + * via hwmon sysfs. 5 5 + * 6 6 + * Old boards have the same DMI strings and they are told appart by the 7 7 + * boot cpu vendor (Intel/AMD). Currently only AMD boards are supported 8 8 + * but the code is made to be simple to add other handheld boards in the 9 9 + * future. 10 10 + * Fan control is provided via pwm interface in the range [0-255]. 11 11 + * Old AMD boards use [0-100] as range in the EC, the written value is 12 12 + * scaled to accommodate for that. Newer boards like the mini PRO and 13 13 + * AOK ZOE are not scaled but have the same EC layout. 14 14 + * 15 15 + * Copyright (C) 2022 Joaquín I. Aramendía <samsagax@gmail.com> 16 16 + */ 17 17 + 18 18 + #include <linux/acpi.h> 19 19 + #include <linux/dev_printk.h> 20 20 + #include <linux/dmi.h> 21 21 + #include <linux/hwmon.h> 22 22 + #include <linux/init.h> 23 23 + #include <linux/kernel.h> 24 24 + #include <linux/module.h> 25 25 + #include <linux/platform_device.h> 26 26 + #include <linux/processor.h> 27 27 + 28 28 + /* Handle ACPI lock mechanism */ 29 29 + static u32 oxp_mutex; 30 30 + 31 31 + #define ACPI_LOCK_DELAY_MS 500 32 32 + 33 33 + static bool lock_global_acpi_lock(void) 34 34 + { 35 35 + return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, &oxp_mutex)); 36 36 + } 37 37 + 38 38 + static bool unlock_global_acpi_lock(void) 39 39 + { 40 40 + return ACPI_SUCCESS(acpi_release_global_lock(oxp_mutex)); 41 41 + } 42 42 + 43 43 + enum oxp_board { 44 44 + aok_zoe_a1 = 1, 45 45 + oxp_mini_amd, 46 46 + oxp_mini_amd_pro, 47 47 + }; 48 48 + 49 49 + static enum oxp_board board; 50 50 + 51 51 + #define OXP_SENSOR_FAN_REG 0x76 /* Fan reading is 2 registers long */ 52 52 + #define OXP_SENSOR_PWM_ENABLE_REG 0x4A /* PWM enable is 1 register long */ 53 53 + #define OXP_SENSOR_PWM_REG 0x4B /* PWM reading is 1 register long */ 54 54 + 55 55 + static const struct dmi_system_id dmi_table[] = { 56 56 + { 57 57 + .matches = { 58 58 + DMI_MATCH(DMI_BOARD_VENDOR, "AOKZOE"), 59 59 + DMI_EXACT_MATCH(DMI_BOARD_NAME, "AOKZOE A1 AR07"), 60 60 + }, 61 61 + .driver_data = (void *) &(enum oxp_board) {aok_zoe_a1}, 62 62 + }, 63 63 + { 64 64 + .matches = { 65 65 + DMI_MATCH(DMI_BOARD_VENDOR, "ONE-NETBOOK"), 66 66 + DMI_EXACT_MATCH(DMI_BOARD_NAME, "ONE XPLAYER"), 67 67 + }, 68 68 + .driver_data = (void *) &(enum oxp_board) {oxp_mini_amd}, 69 69 + }, 70 70 + { 71 71 + .matches = { 72 72 + DMI_MATCH(DMI_BOARD_VENDOR, "ONE-NETBOOK"), 73 73 + DMI_EXACT_MATCH(DMI_BOARD_NAME, "ONEXPLAYER Mini Pro"), 74 74 + }, 75 75 + .driver_data = (void *) &(enum oxp_board) {oxp_mini_amd_pro}, 76 76 + }, 77 77 + {}, 78 78 + }; 79 79 + 80 80 + /* Helper functions to handle EC read/write */ 81 81 + static int read_from_ec(u8 reg, int size, long *val) 82 82 + { 83 83 + int i; 84 84 + int ret; 85 85 + u8 buffer; 86 86 + 87 87 + if (!lock_global_acpi_lock()) 88 88 + return -EBUSY; 89 89 + 90 90 + *val = 0; 91 91 + for (i = 0; i < size; i++) { 92 92 + ret = ec_read(reg + i, &buffer); 93 93 + if (ret) 94 94 + return ret; 95 95 + *val <<= i * 8; 96 96 + *val += buffer; 97 97 + } 98 98 + 99 99 + if (!unlock_global_acpi_lock()) 100 100 + return -EBUSY; 101 101 + 102 102 + return 0; 103 103 + } 104 104 + 105 105 + static int write_to_ec(const struct device *dev, u8 reg, u8 value) 106 106 + { 107 107 + int ret; 108 108 + 109 109 + if (!lock_global_acpi_lock()) 110 110 + return -EBUSY; 111 111 + 112 112 + ret = ec_write(reg, value); 113 113 + 114 114 + if (!unlock_global_acpi_lock()) 115 115 + return -EBUSY; 116 116 + 117 117 + return ret; 118 118 + } 119 119 + 120 120 + static int oxp_pwm_enable(const struct device *dev) 121 121 + { 122 122 + return write_to_ec(dev, OXP_SENSOR_PWM_ENABLE_REG, 0x01); 123 123 + } 124 124 + 125 125 + static int oxp_pwm_disable(const struct device *dev) 126 126 + { 127 127 + return write_to_ec(dev, OXP_SENSOR_PWM_ENABLE_REG, 0x00); 128 128 + } 129 129 + 130 130 + /* Callbacks for hwmon interface */ 131 131 + static umode_t oxp_ec_hwmon_is_visible(const void *drvdata, 132 132 + enum hwmon_sensor_types type, u32 attr, int channel) 133 133 + { 134 134 + switch (type) { 135 135 + case hwmon_fan: 136 136 + return 0444; 137 137 + case hwmon_pwm: 138 138 + return 0644; 139 139 + default: 140 140 + return 0; 141 141 + } 142 142 + } 143 143 + 144 144 + static int oxp_platform_read(struct device *dev, enum hwmon_sensor_types type, 145 145 + u32 attr, int channel, long *val) 146 146 + { 147 147 + int ret; 148 148 + 149 149 + switch (type) { 150 150 + case hwmon_fan: 151 151 + switch (attr) { 152 152 + case hwmon_fan_input: 153 153 + return read_from_ec(OXP_SENSOR_FAN_REG, 2, val); 154 154 + default: 155 155 + break; 156 156 + } 157 157 + break; 158 158 + case hwmon_pwm: 159 159 + switch (attr) { 160 160 + case hwmon_pwm_input: 161 161 + ret = read_from_ec(OXP_SENSOR_PWM_REG, 1, val); 162 162 + if (ret) 163 163 + return ret; 164 164 + if (board == oxp_mini_amd) 165 165 + *val = (*val * 255) / 100; 166 166 + return 0; 167 167 + case hwmon_pwm_enable: 168 168 + return read_from_ec(OXP_SENSOR_PWM_ENABLE_REG, 1, val); 169 169 + default: 170 170 + break; 171 171 + } 172 172 + break; 173 173 + default: 174 174 + break; 175 175 + } 176 176 + return -EOPNOTSUPP; 177 177 + } 178 178 + 179 179 + static int oxp_platform_write(struct device *dev, enum hwmon_sensor_types type, 180 180 + u32 attr, int channel, long val) 181 181 + { 182 182 + switch (type) { 183 183 + case hwmon_pwm: 184 184 + switch (attr) { 185 185 + case hwmon_pwm_enable: 186 186 + if (val == 1) 187 187 + return oxp_pwm_enable(dev); 188 188 + else if (val == 0) 189 189 + return oxp_pwm_disable(dev); 190 190 + return -EINVAL; 191 191 + case hwmon_pwm_input: 192 192 + if (val < 0 || val > 255) 193 193 + return -EINVAL; 194 194 + if (board == oxp_mini_amd) 195 195 + val = (val * 100) / 255; 196 196 + return write_to_ec(dev, OXP_SENSOR_PWM_REG, val); 197 197 + default: 198 198 + break; 199 199 + } 200 200 + break; 201 201 + default: 202 202 + break; 203 203 + } 204 204 + return -EOPNOTSUPP; 205 205 + } 206 206 + 207 207 + /* Known sensors in the OXP EC controllers */ 208 208 + static const struct hwmon_channel_info *oxp_platform_sensors[] = { 209 209 + HWMON_CHANNEL_INFO(fan, 210 210 + HWMON_F_INPUT), 211 211 + HWMON_CHANNEL_INFO(pwm, 212 212 + HWMON_PWM_INPUT | HWMON_PWM_ENABLE), 213 213 + NULL, 214 214 + }; 215 215 + 216 216 + static const struct hwmon_ops oxp_ec_hwmon_ops = { 217 217 + .is_visible = oxp_ec_hwmon_is_visible, 218 218 + .read = oxp_platform_read, 219 219 + .write = oxp_platform_write, 220 220 + }; 221 221 + 222 222 + static const struct hwmon_chip_info oxp_ec_chip_info = { 223 223 + .ops = &oxp_ec_hwmon_ops, 224 224 + .info = oxp_platform_sensors, 225 225 + }; 226 226 + 227 227 + /* Initialization logic */ 228 228 + static int oxp_platform_probe(struct platform_device *pdev) 229 229 + { 230 230 + const struct dmi_system_id *dmi_entry; 231 231 + struct device *dev = &pdev->dev; 232 232 + struct device *hwdev; 233 233 + 234 234 + /* 235 235 + * Have to check for AMD processor here because DMI strings are the 236 236 + * same between Intel and AMD boards, the only way to tell them appart 237 237 + * is the CPU. 238 238 + * Intel boards seem to have different EC registers and values to 239 239 + * read/write. 240 240 + */ 241 241 + dmi_entry = dmi_first_match(dmi_table); 242 242 + if (!dmi_entry || boot_cpu_data.x86_vendor != X86_VENDOR_AMD) 243 243 + return -ENODEV; 244 244 + 245 245 + board = *((enum oxp_board *) dmi_entry->driver_data); 246 246 + 247 247 + hwdev = devm_hwmon_device_register_with_info(dev, "oxpec", NULL, 248 248 + &oxp_ec_chip_info, NULL); 249 249 + 250 250 + return PTR_ERR_OR_ZERO(hwdev); 251 251 + } 252 252 + 253 253 + static struct platform_driver oxp_platform_driver = { 254 254 + .driver = { 255 255 + .name = "oxp-platform", 256 256 + }, 257 257 + .probe = oxp_platform_probe, 258 258 + }; 259 259 + 260 260 + static struct platform_device *oxp_platform_device; 261 261 + 262 262 + static int __init oxp_platform_init(void) 263 263 + { 264 264 + oxp_platform_device = 265 265 + platform_create_bundle(&oxp_platform_driver, 266 266 + oxp_platform_probe, NULL, 0, NULL, 0); 267 267 + 268 268 + return PTR_ERR_OR_ZERO(oxp_platform_device); 269 269 + } 270 270 + 271 271 + static void __exit oxp_platform_exit(void) 272 272 + { 273 273 + platform_device_unregister(oxp_platform_device); 274 274 + platform_driver_unregister(&oxp_platform_driver); 275 275 + } 276 276 + 277 277 + MODULE_DEVICE_TABLE(dmi, dmi_table); 278 278 + 279 279 + module_init(oxp_platform_init); 280 280 + module_exit(oxp_platform_exit); 281 281 + 282 282 + MODULE_AUTHOR("Joaquín Ignacio Aramendía <samsagax@gmail.com>"); 283 283 + MODULE_DESCRIPTION("Platform driver that handles EC sensors of OneXPlayer devices"); 284 284 + MODULE_LICENSE("GPL");

+1

drivers/hwmon/pcf8591.c

reviewed

··· 14 14 #include <linux/mutex.h> 15 15 #include <linux/err.h> 16 16 #include <linux/hwmon.h> 17 17 + #include <linux/kstrtox.h> 17 18 18 19 /* Insmod parameters */ 19 20

+11 -6

drivers/hwmon/pmbus/ltc2978.c

reviewed

··· 23 23 /* Managers */ 24 24 ltc2972, ltc2974, ltc2975, ltc2977, ltc2978, ltc2979, ltc2980, 25 25 /* Controllers */ 26 26 - ltc3880, ltc3882, ltc3883, ltc3884, ltc3886, ltc3887, ltc3889, ltc7880, 26 26 + ltc3880, ltc3882, ltc3883, ltc3884, ltc3886, ltc3887, ltc3889, ltc7132, ltc7880, 27 27 /* Modules */ 28 28 ltm2987, ltm4664, ltm4675, ltm4676, ltm4677, ltm4678, ltm4680, ltm4686, 29 29 ltm4700, ··· 45 45 #define LTC2974_MFR_IOUT_PEAK 0xd7 46 46 #define LTC2974_MFR_IOUT_MIN 0xd8 47 47 48 48 - /* LTC3880, LTC3882, LTC3883, LTC3887, LTM4675, and LTM4676 */ 48 48 + /* LTC3880, LTC3882, LTC3883, LTC3887, LTM4675, LTM4676, LTC7132 */ 49 49 #define LTC3880_MFR_IOUT_PEAK 0xd7 50 50 #define LTC3880_MFR_CLEAR_PEAKS 0xe3 51 51 #define LTC3880_MFR_TEMPERATURE2_PEAK 0xf4 52 52 53 53 - /* LTC3883, LTC3884, LTC3886, LTC3889 and LTC7880 only */ 53 53 + /* LTC3883, LTC3884, LTC3886, LTC3889, LTC7132, LTC7880 */ 54 54 #define LTC3883_MFR_IIN_PEAK 0xe1 55 55 - 56 55 57 56 /* LTC2975 only */ 58 57 #define LTC2975_MFR_IIN_PEAK 0xc4 ··· 78 79 #define LTC3884_ID 0x4C00 79 80 #define LTC3886_ID 0x4600 80 81 #define LTC3887_ID 0x4700 82 82 + #define LTC3889_ID 0x4900 83 83 + #define LTC7132_ID 0x4CE0 84 84 + #define LTC7880_ID 0x49E0 81 85 #define LTM2987_ID_A 0x8010 /* A/B for two die IDs */ 82 86 #define LTM2987_ID_B 0x8020 83 83 - #define LTC3889_ID 0x4900 84 84 - #define LTC7880_ID 0x49E0 85 87 #define LTM4664_ID 0x4120 86 88 #define LTM4675_ID 0x47a0 87 89 #define LTM4676_ID_REV1 0x4400 ··· 547 547 {"ltc3886", ltc3886}, 548 548 {"ltc3887", ltc3887}, 549 549 {"ltc3889", ltc3889}, 550 550 + {"ltc7132", ltc7132}, 550 551 {"ltc7880", ltc7880}, 551 552 {"ltm2987", ltm2987}, 552 553 {"ltm4664", ltm4664}, ··· 652 651 return ltc3887; 653 652 else if (chip_id == LTC3889_ID) 654 653 return ltc3889; 654 654 + else if (chip_id == LTC7132_ID) 655 655 + return ltc7132; 655 656 else if (chip_id == LTC7880_ID) 656 657 return ltc7880; 657 658 else if (chip_id == LTM2987_ID_A || chip_id == LTM2987_ID_B) ··· 834 831 case ltc3884: 835 832 case ltc3886: 836 833 case ltc3889: 834 834 + case ltc7132: 837 835 case ltc7880: 838 836 case ltm4664: 839 837 case ltm4678: ··· 906 902 { .compatible = "lltc,ltc3886" }, 907 903 { .compatible = "lltc,ltc3887" }, 908 904 { .compatible = "lltc,ltc3889" }, 905 905 + { .compatible = "lltc,ltc7132" }, 909 906 { .compatible = "lltc,ltc7880" }, 910 907 { .compatible = "lltc,ltm2987" }, 911 908 { .compatible = "lltc,ltm4664" },

+50 -2

drivers/hwmon/pmbus/pmbus_core.c

reviewed

··· 2827 2827 if (status < 0) 2828 2828 return status; 2829 2829 2830 2830 - if (pmbus_regulator_is_enabled(rdev) && (status & PB_STATUS_OFF)) 2831 2831 - *flags |= REGULATOR_ERROR_FAIL; 2830 2830 + if (pmbus_regulator_is_enabled(rdev)) { 2831 2831 + if (status & PB_STATUS_OFF) 2832 2832 + *flags |= REGULATOR_ERROR_FAIL; 2832 2833 2834 2834 + if (status & PB_STATUS_POWER_GOOD_N) 2835 2835 + *flags |= REGULATOR_ERROR_REGULATION_OUT; 2836 2836 + } 2833 2837 /* 2834 2838 * Unlike most other status bits, PB_STATUS_{IOUT_OC,VOUT_OV} are 2835 2839 * defined strictly as fault indicators (not warnings). ··· 2853 2849 *flags |= REGULATOR_ERROR_OVER_TEMP_WARN; 2854 2850 2855 2851 return 0; 2852 2852 + } 2853 2853 + 2854 2854 + static int pmbus_regulator_get_status(struct regulator_dev *rdev) 2855 2855 + { 2856 2856 + struct device *dev = rdev_get_dev(rdev); 2857 2857 + struct i2c_client *client = to_i2c_client(dev->parent); 2858 2858 + struct pmbus_data *data = i2c_get_clientdata(client); 2859 2859 + u8 page = rdev_get_id(rdev); 2860 2860 + int status, ret; 2861 2861 + 2862 2862 + mutex_lock(&data->update_lock); 2863 2863 + status = pmbus_get_status(client, page, PMBUS_STATUS_WORD); 2864 2864 + if (status < 0) { 2865 2865 + ret = status; 2866 2866 + goto unlock; 2867 2867 + } 2868 2868 + 2869 2869 + if (status & PB_STATUS_OFF) { 2870 2870 + ret = REGULATOR_STATUS_OFF; 2871 2871 + goto unlock; 2872 2872 + } 2873 2873 + 2874 2874 + /* If regulator is ON & reports power good then return ON */ 2875 2875 + if (!(status & PB_STATUS_POWER_GOOD_N)) { 2876 2876 + ret = REGULATOR_STATUS_ON; 2877 2877 + goto unlock; 2878 2878 + } 2879 2879 + 2880 2880 + ret = pmbus_regulator_get_error_flags(rdev, &status); 2881 2881 + if (ret) 2882 2882 + goto unlock; 2883 2883 + 2884 2884 + if (status & (REGULATOR_ERROR_UNDER_VOLTAGE | REGULATOR_ERROR_OVER_CURRENT | 2885 2885 + REGULATOR_ERROR_REGULATION_OUT | REGULATOR_ERROR_FAIL | REGULATOR_ERROR_OVER_TEMP)) { 2886 2886 + ret = REGULATOR_STATUS_ERROR; 2887 2887 + goto unlock; 2888 2888 + } 2889 2889 + 2890 2890 + ret = REGULATOR_STATUS_UNDEFINED; 2891 2891 + 2892 2892 + unlock: 2893 2893 + mutex_unlock(&data->update_lock); 2894 2894 + return ret; 2856 2895 } 2857 2896 2858 2897 static int pmbus_regulator_get_low_margin(struct i2c_client *client, int page) ··· 3038 2991 .disable = pmbus_regulator_disable, 3039 2992 .is_enabled = pmbus_regulator_is_enabled, 3040 2993 .get_error_flags = pmbus_regulator_get_error_flags, 2994 2994 + .get_status = pmbus_regulator_get_status, 3041 2995 .get_voltage = pmbus_regulator_get_voltage, 3042 2996 .set_voltage = pmbus_regulator_set_voltage, 3043 2997 .list_voltage = pmbus_regulator_list_voltage,

+1

drivers/hwmon/pmbus/q54sj108a2.c

reviewed

··· 8 8 9 9 #include <linux/debugfs.h> 10 10 #include <linux/i2c.h> 11 11 + #include <linux/kstrtox.h> 11 12 #include <linux/module.h> 12 13 #include <linux/of_device.h> 13 14 #include "pmbus.h"

+2 -3

drivers/hwmon/sbrmi.c

reviewed

··· 297 297 return ret; 298 298 } 299 299 300 300 - static int sbrmi_probe(struct i2c_client *client, 301 301 - const struct i2c_device_id *id) 300 300 + static int sbrmi_probe(struct i2c_client *client) 302 301 { 303 302 struct device *dev = &client->dev; 304 303 struct device *hwmon_dev; ··· 347 348 .name = "sbrmi", 348 349 .of_match_table = of_match_ptr(sbrmi_of_match), 349 350 }, 350 350 - .probe = sbrmi_probe, 351 351 + .probe_new = sbrmi_probe, 351 352 .id_table = sbrmi_id, 352 353 }; 353 354

+2 -3

drivers/hwmon/sbtsi_temp.c

reviewed

··· 199 199 .info = sbtsi_info, 200 200 }; 201 201 202 202 - static int sbtsi_probe(struct i2c_client *client, 203 203 - const struct i2c_device_id *id) 202 202 + static int sbtsi_probe(struct i2c_client *client) 204 203 { 205 204 struct device *dev = &client->dev; 206 205 struct device *hwmon_dev; ··· 238 239 .name = "sbtsi", 239 240 .of_match_table = of_match_ptr(sbtsi_of_match), 240 241 }, 241 241 - .probe = sbtsi_probe, 242 242 + .probe_new = sbtsi_probe, 242 243 .id_table = sbtsi_id, 243 244 }; 244 245

+6 -6

drivers/hwmon/sht3x.c

reviewed

··· 320 320 u8 index = to_sensor_dev_attr(attr)->index; 321 321 int temperature_limit = data->temperature_limits[index]; 322 322 323 323 - return scnprintf(buf, PAGE_SIZE, "%d\n", temperature_limit); 323 323 + return sysfs_emit(buf, "%d\n", temperature_limit); 324 324 } 325 325 326 326 static ssize_t humidity1_limit_show(struct device *dev, ··· 331 331 u8 index = to_sensor_dev_attr(attr)->index; 332 332 u32 humidity_limit = data->humidity_limits[index]; 333 333 334 334 - return scnprintf(buf, PAGE_SIZE, "%u\n", humidity_limit); 334 334 + return sysfs_emit(buf, "%u\n", humidity_limit); 335 335 } 336 336 337 337 /* ··· 483 483 if (ret) 484 484 return ret; 485 485 486 486 - return scnprintf(buf, PAGE_SIZE, "%d\n", !!(buffer[0] & 0x04)); 486 486 + return sysfs_emit(buf, "%d\n", !!(buffer[0] & 0x04)); 487 487 } 488 488 489 489 static ssize_t humidity1_alarm_show(struct device *dev, ··· 498 498 if (ret) 499 499 return ret; 500 500 501 501 - return scnprintf(buf, PAGE_SIZE, "%d\n", !!(buffer[0] & 0x08)); 501 501 + return sysfs_emit(buf, "%d\n", !!(buffer[0] & 0x08)); 502 502 } 503 503 504 504 static ssize_t heater_enable_show(struct device *dev, ··· 513 513 if (ret) 514 514 return ret; 515 515 516 516 - return scnprintf(buf, PAGE_SIZE, "%d\n", !!(buffer[0] & 0x20)); 516 516 + return sysfs_emit(buf, "%d\n", !!(buffer[0] & 0x20)); 517 517 } 518 518 519 519 static ssize_t heater_enable_store(struct device *dev, ··· 550 550 { 551 551 struct sht3x_data *data = dev_get_drvdata(dev); 552 552 553 553 - return scnprintf(buf, PAGE_SIZE, "%u\n", 553 553 + return sysfs_emit(buf, "%u\n", 554 554 mode_to_update_interval[data->mode]); 555 555 } 556 556

+2 -3

drivers/hwmon/sht4x.c

reviewed

··· 232 232 .info = sht4x_info, 233 233 }; 234 234 235 235 - static int sht4x_probe(struct i2c_client *client, 236 236 - const struct i2c_device_id *sht4x_id) 235 235 + static int sht4x_probe(struct i2c_client *client) 237 236 { 238 237 struct device *device = &client->dev; 239 238 struct device *hwmon_dev; ··· 291 292 .name = "sht4x", 292 293 .of_match_table = sht4x_of_match, 293 294 }, 294 294 - .probe = sht4x_probe, 295 295 + .probe_new = sht4x_probe, 295 296 .id_table = sht4x_id, 296 297 }; 297 298

+466

drivers/hwmon/smpro-hwmon.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-only 2 2 + /* 3 3 + * Ampere Computing SoC's SMPro Hardware Monitoring Driver 4 4 + * 5 5 + * Copyright (c) 2022, Ampere Computing LLC 6 6 + */ 7 7 + #include <linux/bitfield.h> 8 8 + #include <linux/bitops.h> 9 9 + #include <linux/hwmon.h> 10 10 + #include <linux/hwmon-sysfs.h> 11 11 + #include <linux/kernel.h> 12 12 + #include <linux/mod_devicetable.h> 13 13 + #include <linux/module.h> 14 14 + #include <linux/platform_device.h> 15 15 + #include <linux/property.h> 16 16 + #include <linux/regmap.h> 17 17 + 18 18 + /* Logical Power Sensor Registers */ 19 19 + #define SOC_TEMP 0x10 20 20 + #define SOC_VRD_TEMP 0x11 21 21 + #define DIMM_VRD_TEMP 0x12 22 22 + #define CORE_VRD_TEMP 0x13 23 23 + #define CH0_DIMM_TEMP 0x14 24 24 + #define CH1_DIMM_TEMP 0x15 25 25 + #define CH2_DIMM_TEMP 0x16 26 26 + #define CH3_DIMM_TEMP 0x17 27 27 + #define CH4_DIMM_TEMP 0x18 28 28 + #define CH5_DIMM_TEMP 0x19 29 29 + #define CH6_DIMM_TEMP 0x1A 30 30 + #define CH7_DIMM_TEMP 0x1B 31 31 + #define RCA_VRD_TEMP 0x1C 32 32 + 33 33 + #define CORE_VRD_PWR 0x20 34 34 + #define SOC_PWR 0x21 35 35 + #define DIMM_VRD1_PWR 0x22 36 36 + #define DIMM_VRD2_PWR 0x23 37 37 + #define CORE_VRD_PWR_MW 0x26 38 38 + #define SOC_PWR_MW 0x27 39 39 + #define DIMM_VRD1_PWR_MW 0x28 40 40 + #define DIMM_VRD2_PWR_MW 0x29 41 41 + #define RCA_VRD_PWR 0x2A 42 42 + #define RCA_VRD_PWR_MW 0x2B 43 43 + 44 44 + #define MEM_HOT_THRESHOLD 0x32 45 45 + #define SOC_VR_HOT_THRESHOLD 0x33 46 46 + #define CORE_VRD_VOLT 0x34 47 47 + #define SOC_VRD_VOLT 0x35 48 48 + #define DIMM_VRD1_VOLT 0x36 49 49 + #define DIMM_VRD2_VOLT 0x37 50 50 + #define RCA_VRD_VOLT 0x38 51 51 + 52 52 + #define CORE_VRD_CURR 0x39 53 53 + #define SOC_VRD_CURR 0x3A 54 54 + #define DIMM_VRD1_CURR 0x3B 55 55 + #define DIMM_VRD2_CURR 0x3C 56 56 + #define RCA_VRD_CURR 0x3D 57 57 + 58 58 + struct smpro_hwmon { 59 59 + struct regmap *regmap; 60 60 + }; 61 61 + 62 62 + struct smpro_sensor { 63 63 + const u8 reg; 64 64 + const u8 reg_ext; 65 65 + const char *label; 66 66 + }; 67 67 + 68 68 + static const struct smpro_sensor temperature[] = { 69 69 + { 70 70 + .reg = SOC_TEMP, 71 71 + .label = "temp1 SoC" 72 72 + }, 73 73 + { 74 74 + .reg = SOC_VRD_TEMP, 75 75 + .reg_ext = SOC_VR_HOT_THRESHOLD, 76 76 + .label = "temp2 SoC VRD" 77 77 + }, 78 78 + { 79 79 + .reg = DIMM_VRD_TEMP, 80 80 + .label = "temp3 DIMM VRD" 81 81 + }, 82 82 + { 83 83 + .reg = CORE_VRD_TEMP, 84 84 + .label = "temp4 CORE VRD" 85 85 + }, 86 86 + { 87 87 + .reg = CH0_DIMM_TEMP, 88 88 + .reg_ext = MEM_HOT_THRESHOLD, 89 89 + .label = "temp5 CH0 DIMM" 90 90 + }, 91 91 + { 92 92 + .reg = CH1_DIMM_TEMP, 93 93 + .reg_ext = MEM_HOT_THRESHOLD, 94 94 + .label = "temp6 CH1 DIMM" 95 95 + }, 96 96 + { 97 97 + .reg = CH2_DIMM_TEMP, 98 98 + .reg_ext = MEM_HOT_THRESHOLD, 99 99 + .label = "temp7 CH2 DIMM" 100 100 + }, 101 101 + { 102 102 + .reg = CH3_DIMM_TEMP, 103 103 + .reg_ext = MEM_HOT_THRESHOLD, 104 104 + .label = "temp8 CH3 DIMM" 105 105 + }, 106 106 + { 107 107 + .reg = CH4_DIMM_TEMP, 108 108 + .reg_ext = MEM_HOT_THRESHOLD, 109 109 + .label = "temp9 CH4 DIMM" 110 110 + }, 111 111 + { 112 112 + .reg = CH5_DIMM_TEMP, 113 113 + .reg_ext = MEM_HOT_THRESHOLD, 114 114 + .label = "temp10 CH5 DIMM" 115 115 + }, 116 116 + { 117 117 + .reg = CH6_DIMM_TEMP, 118 118 + .reg_ext = MEM_HOT_THRESHOLD, 119 119 + .label = "temp11 CH6 DIMM" 120 120 + }, 121 121 + { 122 122 + .reg = CH7_DIMM_TEMP, 123 123 + .reg_ext = MEM_HOT_THRESHOLD, 124 124 + .label = "temp12 CH7 DIMM" 125 125 + }, 126 126 + { 127 127 + .reg = RCA_VRD_TEMP, 128 128 + .label = "temp13 RCA VRD" 129 129 + }, 130 130 + }; 131 131 + 132 132 + static const struct smpro_sensor voltage[] = { 133 133 + { 134 134 + .reg = CORE_VRD_VOLT, 135 135 + .label = "vout0 CORE VRD" 136 136 + }, 137 137 + { 138 138 + .reg = SOC_VRD_VOLT, 139 139 + .label = "vout1 SoC VRD" 140 140 + }, 141 141 + { 142 142 + .reg = DIMM_VRD1_VOLT, 143 143 + .label = "vout2 DIMM VRD1" 144 144 + }, 145 145 + { 146 146 + .reg = DIMM_VRD2_VOLT, 147 147 + .label = "vout3 DIMM VRD2" 148 148 + }, 149 149 + { 150 150 + .reg = RCA_VRD_VOLT, 151 151 + .label = "vout4 RCA VRD" 152 152 + }, 153 153 + }; 154 154 + 155 155 + static const struct smpro_sensor curr_sensor[] = { 156 156 + { 157 157 + .reg = CORE_VRD_CURR, 158 158 + .label = "iout1 CORE VRD" 159 159 + }, 160 160 + { 161 161 + .reg = SOC_VRD_CURR, 162 162 + .label = "iout2 SoC VRD" 163 163 + }, 164 164 + { 165 165 + .reg = DIMM_VRD1_CURR, 166 166 + .label = "iout3 DIMM VRD1" 167 167 + }, 168 168 + { 169 169 + .reg = DIMM_VRD2_CURR, 170 170 + .label = "iout4 DIMM VRD2" 171 171 + }, 172 172 + { 173 173 + .reg = RCA_VRD_CURR, 174 174 + .label = "iout5 RCA VRD" 175 175 + }, 176 176 + }; 177 177 + 178 178 + static const struct smpro_sensor power[] = { 179 179 + { 180 180 + .reg = CORE_VRD_PWR, 181 181 + .reg_ext = CORE_VRD_PWR_MW, 182 182 + .label = "power1 CORE VRD" 183 183 + }, 184 184 + { 185 185 + .reg = SOC_PWR, 186 186 + .reg_ext = SOC_PWR_MW, 187 187 + .label = "power2 SoC" 188 188 + }, 189 189 + { 190 190 + .reg = DIMM_VRD1_PWR, 191 191 + .reg_ext = DIMM_VRD1_PWR_MW, 192 192 + .label = "power3 DIMM VRD1" 193 193 + }, 194 194 + { 195 195 + .reg = DIMM_VRD2_PWR, 196 196 + .reg_ext = DIMM_VRD2_PWR_MW, 197 197 + .label = "power4 DIMM VRD2" 198 198 + }, 199 199 + { 200 200 + .reg = RCA_VRD_PWR, 201 201 + .reg_ext = RCA_VRD_PWR_MW, 202 202 + .label = "power5 RCA VRD" 203 203 + }, 204 204 + }; 205 205 + 206 206 + static int smpro_read_temp(struct device *dev, u32 attr, int channel, long *val) 207 207 + { 208 208 + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); 209 209 + unsigned int value; 210 210 + int ret; 211 211 + 212 212 + switch (attr) { 213 213 + case hwmon_temp_input: 214 214 + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); 215 215 + if (ret) 216 216 + return ret; 217 217 + break; 218 218 + case hwmon_temp_crit: 219 219 + ret = regmap_read(hwmon->regmap, temperature[channel].reg_ext, &value); 220 220 + if (ret) 221 221 + return ret; 222 222 + break; 223 223 + default: 224 224 + return -EOPNOTSUPP; 225 225 + } 226 226 + 227 227 + *val = sign_extend32(value, 8) * 1000; 228 228 + return 0; 229 229 + } 230 230 + 231 231 + static int smpro_read_in(struct device *dev, u32 attr, int channel, long *val) 232 232 + { 233 233 + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); 234 234 + unsigned int value; 235 235 + int ret; 236 236 + 237 237 + switch (attr) { 238 238 + case hwmon_in_input: 239 239 + ret = regmap_read(hwmon->regmap, voltage[channel].reg, &value); 240 240 + if (ret < 0) 241 241 + return ret; 242 242 + /* 15-bit value in 1mV */ 243 243 + *val = value & 0x7fff; 244 244 + return 0; 245 245 + default: 246 246 + return -EOPNOTSUPP; 247 247 + } 248 248 + } 249 249 + 250 250 + static int smpro_read_curr(struct device *dev, u32 attr, int channel, long *val) 251 251 + { 252 252 + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); 253 253 + unsigned int value; 254 254 + int ret; 255 255 + 256 256 + switch (attr) { 257 257 + case hwmon_curr_input: 258 258 + ret = regmap_read(hwmon->regmap, curr_sensor[channel].reg, &value); 259 259 + if (ret < 0) 260 260 + return ret; 261 261 + /* Scale reported by the hardware is 1mA */ 262 262 + *val = value & 0x7fff; 263 263 + return 0; 264 264 + default: 265 265 + return -EOPNOTSUPP; 266 266 + } 267 267 + } 268 268 + 269 269 + static int smpro_read_power(struct device *dev, u32 attr, int channel, long *val_pwr) 270 270 + { 271 271 + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); 272 272 + unsigned int val = 0, val_mw = 0; 273 273 + int ret; 274 274 + 275 275 + switch (attr) { 276 276 + case hwmon_power_input: 277 277 + ret = regmap_read(hwmon->regmap, power[channel].reg, &val); 278 278 + if (ret) 279 279 + return ret; 280 280 + 281 281 + ret = regmap_read(hwmon->regmap, power[channel].reg_ext, &val_mw); 282 282 + if (ret) 283 283 + return ret; 284 284 + /* 10-bit value */ 285 285 + *val_pwr = (val & 0x3ff) * 1000000 + (val_mw & 0x3ff) * 1000; 286 286 + return 0; 287 287 + 288 288 + default: 289 289 + return -EOPNOTSUPP; 290 290 + } 291 291 + } 292 292 + 293 293 + static int smpro_read(struct device *dev, enum hwmon_sensor_types type, 294 294 + u32 attr, int channel, long *val) 295 295 + { 296 296 + switch (type) { 297 297 + case hwmon_temp: 298 298 + return smpro_read_temp(dev, attr, channel, val); 299 299 + case hwmon_in: 300 300 + return smpro_read_in(dev, attr, channel, val); 301 301 + case hwmon_power: 302 302 + return smpro_read_power(dev, attr, channel, val); 303 303 + case hwmon_curr: 304 304 + return smpro_read_curr(dev, attr, channel, val); 305 305 + default: 306 306 + return -EOPNOTSUPP; 307 307 + } 308 308 + } 309 309 + 310 310 + static int smpro_read_string(struct device *dev, enum hwmon_sensor_types type, 311 311 + u32 attr, int channel, const char **str) 312 312 + { 313 313 + switch (type) { 314 314 + case hwmon_temp: 315 315 + switch (attr) { 316 316 + case hwmon_temp_label: 317 317 + *str = temperature[channel].label; 318 318 + return 0; 319 319 + default: 320 320 + break; 321 321 + } 322 322 + break; 323 323 + 324 324 + case hwmon_in: 325 325 + switch (attr) { 326 326 + case hwmon_in_label: 327 327 + *str = voltage[channel].label; 328 328 + return 0; 329 329 + default: 330 330 + break; 331 331 + } 332 332 + break; 333 333 + 334 334 + case hwmon_curr: 335 335 + switch (attr) { 336 336 + case hwmon_curr_label: 337 337 + *str = curr_sensor[channel].label; 338 338 + return 0; 339 339 + default: 340 340 + break; 341 341 + } 342 342 + break; 343 343 + 344 344 + case hwmon_power: 345 345 + switch (attr) { 346 346 + case hwmon_power_label: 347 347 + *str = power[channel].label; 348 348 + return 0; 349 349 + default: 350 350 + break; 351 351 + } 352 352 + break; 353 353 + default: 354 354 + break; 355 355 + } 356 356 + 357 357 + return -EOPNOTSUPP; 358 358 + } 359 359 + 360 360 + static umode_t smpro_is_visible(const void *data, enum hwmon_sensor_types type, 361 361 + u32 attr, int channel) 362 362 + { 363 363 + const struct smpro_hwmon *hwmon = data; 364 364 + unsigned int value; 365 365 + int ret; 366 366 + 367 367 + switch (type) { 368 368 + case hwmon_temp: 369 369 + switch (attr) { 370 370 + case hwmon_temp_input: 371 371 + case hwmon_temp_label: 372 372 + case hwmon_temp_crit: 373 373 + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); 374 374 + if (ret || value == 0xFFFF) 375 375 + return 0; 376 376 + break; 377 377 + default: 378 378 + break; 379 379 + } 380 380 + break; 381 381 + default: 382 382 + break; 383 383 + } 384 384 + 385 385 + return 0444; 386 386 + } 387 387 + 388 388 + static const struct hwmon_channel_info *smpro_info[] = { 389 389 + HWMON_CHANNEL_INFO(temp, 390 390 + HWMON_T_INPUT | HWMON_T_LABEL, 391 391 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 392 392 + HWMON_T_INPUT | HWMON_T_LABEL, 393 393 + HWMON_T_INPUT | HWMON_T_LABEL, 394 394 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 395 395 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 396 396 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 397 397 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 398 398 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 399 399 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 400 400 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 401 401 + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, 402 402 + HWMON_T_INPUT | HWMON_T_LABEL), 403 403 + HWMON_CHANNEL_INFO(in, 404 404 + HWMON_I_INPUT | HWMON_I_LABEL, 405 405 + HWMON_I_INPUT | HWMON_I_LABEL, 406 406 + HWMON_I_INPUT | HWMON_I_LABEL, 407 407 + HWMON_I_INPUT | HWMON_I_LABEL, 408 408 + HWMON_I_INPUT | HWMON_I_LABEL), 409 409 + HWMON_CHANNEL_INFO(power, 410 410 + HWMON_P_INPUT | HWMON_P_LABEL, 411 411 + HWMON_P_INPUT | HWMON_P_LABEL, 412 412 + HWMON_P_INPUT | HWMON_P_LABEL, 413 413 + HWMON_P_INPUT | HWMON_P_LABEL, 414 414 + HWMON_P_INPUT | HWMON_P_LABEL), 415 415 + HWMON_CHANNEL_INFO(curr, 416 416 + HWMON_C_INPUT | HWMON_C_LABEL, 417 417 + HWMON_C_INPUT | HWMON_C_LABEL, 418 418 + HWMON_C_INPUT | HWMON_C_LABEL, 419 419 + HWMON_C_INPUT | HWMON_C_LABEL, 420 420 + HWMON_C_INPUT | HWMON_C_LABEL), 421 421 + NULL 422 422 + }; 423 423 + 424 424 + static const struct hwmon_ops smpro_hwmon_ops = { 425 425 + .is_visible = smpro_is_visible, 426 426 + .read = smpro_read, 427 427 + .read_string = smpro_read_string, 428 428 + }; 429 429 + 430 430 + static const struct hwmon_chip_info smpro_chip_info = { 431 431 + .ops = &smpro_hwmon_ops, 432 432 + .info = smpro_info, 433 433 + }; 434 434 + 435 435 + static int smpro_hwmon_probe(struct platform_device *pdev) 436 436 + { 437 437 + struct smpro_hwmon *hwmon; 438 438 + struct device *hwmon_dev; 439 439 + 440 440 + hwmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_hwmon), GFP_KERNEL); 441 441 + if (!hwmon) 442 442 + return -ENOMEM; 443 443 + 444 444 + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); 445 445 + if (!hwmon->regmap) 446 446 + return -ENODEV; 447 447 + 448 448 + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "smpro_hwmon", 449 449 + hwmon, &smpro_chip_info, NULL); 450 450 + 451 451 + return PTR_ERR_OR_ZERO(hwmon_dev); 452 452 + } 453 453 + 454 454 + static struct platform_driver smpro_hwmon_driver = { 455 455 + .probe = smpro_hwmon_probe, 456 456 + .driver = { 457 457 + .name = "smpro-hwmon", 458 458 + }, 459 459 + }; 460 460 + 461 461 + module_platform_driver(smpro_hwmon_driver); 462 462 + 463 463 + MODULE_AUTHOR("Thu Nguyen <thu@os.amperecomputing.com>"); 464 464 + MODULE_AUTHOR("Quan Nguyen <quan@os.amperecomputing.com>"); 465 465 + MODULE_DESCRIPTION("Ampere Altra SMPro hwmon driver"); 466 466 + MODULE_LICENSE("GPL");

-1

drivers/hwmon/vt8231.c

reviewed

··· 22 22 #include <linux/platform_device.h> 23 23 #include <linux/hwmon.h> 24 24 #include <linux/hwmon-sysfs.h> 25 25 - #include <linux/hwmon-vid.h> 26 25 #include <linux/err.h> 27 26 #include <linux/mutex.h> 28 27 #include <linux/acpi.h>

-1

drivers/hwmon/w83l786ng.c

reviewed

··· 16 16 #include <linux/slab.h> 17 17 #include <linux/i2c.h> 18 18 #include <linux/hwmon.h> 19 19 - #include <linux/hwmon-vid.h> 20 19 #include <linux/hwmon-sysfs.h> 21 20 #include <linux/err.h> 22 21 #include <linux/mutex.h>

+1

include/linux/hwmon-sysfs.h

reviewed

··· 8 8 #define _LINUX_HWMON_SYSFS_H 9 9 10 10 #include <linux/device.h> 11 11 + #include <linux/kstrtox.h> 11 12 12 13 struct sensor_device_attribute{ 13 14 struct device_attribute dev_attr;

+2 -3

include/linux/platform_data/gsc_hwmon.h

reviewed

··· 29 29 30 30 /** 31 31 * struct gsc_hwmon_platform_data - platform data for gsc_hwmon driver 32 32 - * @channels: pointer to array of gsc_hwmon_channel structures 33 33 - * describing channels 34 32 * @nchannels: number of elements in @channels array 35 33 * @vreference: voltage reference (mV) 36 34 * @resolution: ADC bit resolution 37 35 * @fan_base: register base for FAN controller 36 36 + * @channels: array of gsc_hwmon_channel structures describing channels 38 37 */ 39 38 struct gsc_hwmon_platform_data { 40 40 - const struct gsc_hwmon_channel *channels; 41 39 int nchannels; 42 40 unsigned int resolution; 43 41 unsigned int vreference; 44 42 unsigned int fan_base; 43 43 + struct gsc_hwmon_channel channels[]; 45 44 }; 46 45 #endif