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dt-bindings: devfreq: rk3399_dmc: Fix Hz units

The driver and all downstream device trees [1] are using Hz units, but
the document claims MHz. DRAM frequency for these systems can't possibly
exceed 2^32-1 Hz, so the choice of unit doesn't really matter than much.

Rather than add unnecessary risk in getting the units wrong, let's just
go with the unofficial convention and make the docs match reality.

A sub-1MHz frequency is extremely unlikely, so include a minimum in the
schema, to help catch anybody who might have believed this was MHz.

[1] And notably, also those trying to upstream them:
https://lore.kernel.org/lkml/20210308233858.24741-3-daniel.lezcano@linaro.org/

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

authored by

Brian Norris and committed by
Chanwoo Choi 4de8fd02 76d136b5

+12 -12
+12 -12
Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml
··· 115 115 116 116 rockchip,ddr3_odt_dis_freq: 117 117 $ref: /schemas/types.yaml#/definitions/uint32 118 + minimum: 1000000 # In case anyone thought this was MHz. 118 119 description: 119 120 When the DRAM type is DDR3, this parameter defines the ODT disable 120 - frequency in MHz (Mega Hz). When the DDR frequency is less then 121 - ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both 122 - disabled. 121 + frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq, 122 + the ODT on the DRAM side and controller side are both disabled. 123 123 124 124 rockchip,ddr3_drv: 125 125 deprecated: true ··· 163 163 164 164 rockchip,lpddr3_odt_dis_freq: 165 165 $ref: /schemas/types.yaml#/definitions/uint32 166 + minimum: 1000000 # In case anyone thought this was MHz. 166 167 description: 167 168 When the DRAM type is LPDDR3, this parameter defines then ODT disable 168 - frequency in MHz (Mega Hz). When DDR frequency is less then 169 - ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both 170 - disabled. 169 + frequency in Hz. When DDR frequency is less then ddr3_odt_dis_freq, the 170 + ODT on the DRAM side and controller side are both disabled. 171 171 172 172 rockchip,lpddr3_drv: 173 173 deprecated: true ··· 210 210 211 211 rockchip,lpddr4_odt_dis_freq: 212 212 $ref: /schemas/types.yaml#/definitions/uint32 213 + minimum: 1000000 # In case anyone thought this was MHz. 213 214 description: 214 215 When the DRAM type is LPDDR4, this parameter defines the ODT disable 215 - frequency in MHz (Mega Hz). When the DDR frequency is less then 216 - ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both 217 - disabled. 216 + frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq, 217 + the ODT on the DRAM side and controller side are both disabled. 218 218 219 219 rockchip,lpddr4_drv: 220 220 deprecated: true ··· 300 300 rockchip,sr_mc_gate_idle = <0x3>; 301 301 rockchip,srpd_lite_idle = <0x4>; 302 302 rockchip,standby_idle = <0x2000>; 303 - rockchip,ddr3_odt_dis_freq = <333>; 304 - rockchip,lpddr3_odt_dis_freq = <333>; 305 - rockchip,lpddr4_odt_dis_freq = <333>; 303 + rockchip,ddr3_odt_dis_freq = <333000000>; 304 + rockchip,lpddr3_odt_dis_freq = <333000000>; 305 + rockchip,lpddr4_odt_dis_freq = <333000000>; 306 306 };