Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
powerpc: dts: mpc8315erdb: Use IRQ_TYPE_* macros
This increases readability, because "0x8" isn't very descriptive.
mpc8315erdb.dtb remains identical after this patch.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20260303-mpc83xx-cleanup-v2-2-187d3a13effa@posteo.net
authored by
J. Neuschäfer
and committed by
Madhavan Srinivasan
4f439747
38ce944d
+59
-52
+59
-52
arch/powerpc/boot/dts/mpc8315erdb.dts
+59
-52
arch/powerpc/boot/dts/mpc8315erdb.dts
···
50
50
#size-cells = <1>;
51
51
compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
52
52
reg = <0xe0005000 0x1000>;
53
-
interrupts = <77 0x8>;
53
+
interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
54
54
interrupt-parent = <&ipic>;
55
55
56
56
// CS0 and CS1 are swapped when
···
112
112
cell-index = <0>;
113
113
compatible = "fsl-i2c";
114
114
reg = <0x3000 0x100>;
115
-
interrupts = <14 0x8>;
115
+
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
116
116
interrupt-parent = <&ipic>;
117
117
dfsrr;
118
118
rtc@68 {
···
133
133
cell-index = <0>;
134
134
compatible = "fsl,spi";
135
135
reg = <0x7000 0x1000>;
136
-
interrupts = <16 0x8>;
136
+
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
137
137
interrupt-parent = <&ipic>;
138
138
mode = "cpu";
139
139
};
···
145
145
reg = <0x82a8 4>;
146
146
ranges = <0 0x8100 0x1a8>;
147
147
interrupt-parent = <&ipic>;
148
-
interrupts = <71 8>;
148
+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
149
149
cell-index = <0>;
150
150
dma-channel@0 {
151
151
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
152
152
reg = <0 0x80>;
153
153
cell-index = <0>;
154
154
interrupt-parent = <&ipic>;
155
-
interrupts = <71 8>;
155
+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
156
156
};
157
157
dma-channel@80 {
158
158
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
159
159
reg = <0x80 0x80>;
160
160
cell-index = <1>;
161
161
interrupt-parent = <&ipic>;
162
-
interrupts = <71 8>;
162
+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
163
163
};
164
164
dma-channel@100 {
165
165
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
166
166
reg = <0x100 0x80>;
167
167
cell-index = <2>;
168
168
interrupt-parent = <&ipic>;
169
-
interrupts = <71 8>;
169
+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
170
170
};
171
171
dma-channel@180 {
172
172
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
173
173
reg = <0x180 0x28>;
174
174
cell-index = <3>;
175
175
interrupt-parent = <&ipic>;
176
-
interrupts = <71 8>;
176
+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
177
177
};
178
178
};
179
179
···
183
183
#address-cells = <1>;
184
184
#size-cells = <0>;
185
185
interrupt-parent = <&ipic>;
186
-
interrupts = <38 0x8>;
186
+
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
187
187
phy_type = "utmi";
188
188
};
189
189
···
197
197
reg = <0x24000 0x1000>;
198
198
ranges = <0x0 0x24000 0x1000>;
199
199
local-mac-address = [ 00 00 00 00 00 00 ];
200
-
interrupts = <32 0x8 33 0x8 34 0x8>;
200
+
interrupts = <32 IRQ_TYPE_LEVEL_LOW>,
201
+
<33 IRQ_TYPE_LEVEL_LOW>,
202
+
<34 IRQ_TYPE_LEVEL_LOW>;
201
203
interrupt-parent = <&ipic>;
202
204
tbi-handle = <&tbi0>;
203
205
phy-handle = < &phy0 >;
···
240
238
reg = <0x25000 0x1000>;
241
239
ranges = <0x0 0x25000 0x1000>;
242
240
local-mac-address = [ 00 00 00 00 00 00 ];
243
-
interrupts = <35 0x8 36 0x8 37 0x8>;
241
+
interrupts = <35 IRQ_TYPE_LEVEL_LOW>,
242
+
<36 IRQ_TYPE_LEVEL_LOW>,
243
+
<37 IRQ_TYPE_LEVEL_LOW>;
244
244
interrupt-parent = <&ipic>;
245
245
tbi-handle = <&tbi1>;
246
246
phy-handle = < &phy1 >;
···
267
263
compatible = "fsl,ns16550", "ns16550";
268
264
reg = <0x4500 0x100>;
269
265
clock-frequency = <133333333>;
270
-
interrupts = <9 0x8>;
266
+
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
271
267
interrupt-parent = <&ipic>;
272
268
};
273
269
···
277
273
compatible = "fsl,ns16550", "ns16550";
278
274
reg = <0x4600 0x100>;
279
275
clock-frequency = <133333333>;
280
-
interrupts = <10 0x8>;
276
+
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
281
277
interrupt-parent = <&ipic>;
282
278
};
283
279
···
286
282
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
287
283
"fsl,sec2.0";
288
284
reg = <0x30000 0x10000>;
289
-
interrupts = <11 0x8>;
285
+
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
290
286
interrupt-parent = <&ipic>;
291
287
fsl,num-channels = <4>;
292
288
fsl,channel-fifo-len = <24>;
···
298
294
compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
299
295
reg = <0x18000 0x1000>;
300
296
cell-index = <1>;
301
-
interrupts = <44 0x8>;
297
+
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
302
298
interrupt-parent = <&ipic>;
303
299
};
304
300
···
306
302
compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
307
303
reg = <0x19000 0x1000>;
308
304
cell-index = <2>;
309
-
interrupts = <45 0x8>;
305
+
interrupts = <45 IRQ_TYPE_LEVEL_LOW>;
310
306
interrupt-parent = <&ipic>;
311
307
};
312
308
313
309
gtm1: timer@500 {
314
310
compatible = "fsl,mpc8315-gtm", "fsl,gtm";
315
311
reg = <0x500 0x100>;
316
-
interrupts = <90 8 78 8 84 8 72 8>;
312
+
interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
313
+
<78 IRQ_TYPE_LEVEL_LOW>,
314
+
<84 IRQ_TYPE_LEVEL_LOW>,
315
+
<72 IRQ_TYPE_LEVEL_LOW>;
317
316
interrupt-parent = <&ipic>;
318
317
clock-frequency = <133333333>;
319
318
};
···
324
317
timer@600 {
325
318
compatible = "fsl,mpc8315-gtm", "fsl,gtm";
326
319
reg = <0x600 0x100>;
327
-
interrupts = <91 8 79 8 85 8 73 8>;
320
+
interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
321
+
<79 IRQ_TYPE_LEVEL_LOW>,
322
+
<85 IRQ_TYPE_LEVEL_LOW>,
323
+
<73 IRQ_TYPE_LEVEL_LOW>;
328
324
interrupt-parent = <&ipic>;
329
325
clock-frequency = <133333333>;
330
326
};
331
327
332
328
/* IPIC
333
-
* interrupts cell = <intr #, sense>
334
-
* sense values match linux IORESOURCE_IRQ_* defines:
335
-
* sense == 8: Level, low assertion
336
-
* sense == 2: Edge, high-to-low change
329
+
* interrupts cell = <intr #, type>
337
330
*/
338
331
ipic: interrupt-controller@700 {
339
332
interrupt-controller;
···
347
340
compatible = "fsl,ipic-msi";
348
341
reg = <0x7c0 0x40>;
349
342
msi-available-ranges = <0 0x100>;
350
-
interrupts = <0x43 0x8
351
-
0x4 0x8
352
-
0x51 0x8
353
-
0x52 0x8
354
-
0x56 0x8
355
-
0x57 0x8
356
-
0x58 0x8
357
-
0x59 0x8>;
343
+
interrupts = <0x43 IRQ_TYPE_LEVEL_LOW
344
+
0x4 IRQ_TYPE_LEVEL_LOW
345
+
0x51 IRQ_TYPE_LEVEL_LOW
346
+
0x52 IRQ_TYPE_LEVEL_LOW
347
+
0x56 IRQ_TYPE_LEVEL_LOW
348
+
0x57 IRQ_TYPE_LEVEL_LOW
349
+
0x58 IRQ_TYPE_LEVEL_LOW
350
+
0x59 IRQ_TYPE_LEVEL_LOW>;
358
351
interrupt-parent = < &ipic >;
359
352
};
360
353
···
362
355
compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc",
363
356
"fsl,mpc8349-pmc";
364
357
reg = <0xb00 0x100 0xa00 0x100>;
365
-
interrupts = <80 8>;
358
+
interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
366
359
interrupt-parent = <&ipic>;
367
360
fsl,mpc8313-wakeup-timer = <>m1>;
368
361
};
···
381
374
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
382
375
interrupt-map = <
383
376
/* IDSEL 0x0E -mini PCI */
384
-
0x7000 0x0 0x0 0x1 &ipic 18 0x8
385
-
0x7000 0x0 0x0 0x2 &ipic 18 0x8
386
-
0x7000 0x0 0x0 0x3 &ipic 18 0x8
387
-
0x7000 0x0 0x0 0x4 &ipic 18 0x8
377
+
0x7000 0x0 0x0 0x1 &ipic 18 IRQ_TYPE_LEVEL_LOW
378
+
0x7000 0x0 0x0 0x2 &ipic 18 IRQ_TYPE_LEVEL_LOW
379
+
0x7000 0x0 0x0 0x3 &ipic 18 IRQ_TYPE_LEVEL_LOW
380
+
0x7000 0x0 0x0 0x4 &ipic 18 IRQ_TYPE_LEVEL_LOW
388
381
389
382
/* IDSEL 0x0F -mini PCI */
390
-
0x7800 0x0 0x0 0x1 &ipic 17 0x8
391
-
0x7800 0x0 0x0 0x2 &ipic 17 0x8
392
-
0x7800 0x0 0x0 0x3 &ipic 17 0x8
393
-
0x7800 0x0 0x0 0x4 &ipic 17 0x8
383
+
0x7800 0x0 0x0 0x1 &ipic 17 IRQ_TYPE_LEVEL_LOW
384
+
0x7800 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
385
+
0x7800 0x0 0x0 0x3 &ipic 17 IRQ_TYPE_LEVEL_LOW
386
+
0x7800 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW
394
387
395
388
/* IDSEL 0x10 - PCI slot */
396
-
0x8000 0x0 0x0 0x1 &ipic 48 0x8
397
-
0x8000 0x0 0x0 0x2 &ipic 17 0x8
398
-
0x8000 0x0 0x0 0x3 &ipic 48 0x8
399
-
0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
389
+
0x8000 0x0 0x0 0x1 &ipic 48 IRQ_TYPE_LEVEL_LOW
390
+
0x8000 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
391
+
0x8000 0x0 0x0 0x3 &ipic 48 IRQ_TYPE_LEVEL_LOW
392
+
0x8000 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW>;
400
393
interrupt-parent = <&ipic>;
401
-
interrupts = <66 0x8>;
394
+
interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
402
395
bus-range = <0x0 0x0>;
403
396
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
404
397
0x42000000 0 0x80000000 0x80000000 0 0x10000000
···
424
417
0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
425
418
bus-range = <0 255>;
426
419
interrupt-map-mask = <0xf800 0 0 7>;
427
-
interrupt-map = <0 0 0 1 &ipic 1 8
428
-
0 0 0 2 &ipic 1 8
429
-
0 0 0 3 &ipic 1 8
430
-
0 0 0 4 &ipic 1 8>;
420
+
interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
421
+
0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
422
+
0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
423
+
0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
431
424
clock-frequency = <0>;
432
425
433
426
pcie@0 {
···
455
448
0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
456
449
bus-range = <0 255>;
457
450
interrupt-map-mask = <0xf800 0 0 7>;
458
-
interrupt-map = <0 0 0 1 &ipic 2 8
459
-
0 0 0 2 &ipic 2 8
460
-
0 0 0 3 &ipic 2 8
461
-
0 0 0 4 &ipic 2 8>;
451
+
interrupt-map = <0 0 0 1 &ipic 2 IRQ_TYPE_LEVEL_LOW
452
+
0 0 0 2 &ipic 2 IRQ_TYPE_LEVEL_LOW
453
+
0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW
454
+
0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>;
462
455
clock-frequency = <0>;
463
456
464
457
pcie@0 {