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drm/amd/pm/powerplay/smumgr: Fix PCIeBootLinkLevel value on Iceland

Previously this was initialized with zero which represented PCIe Gen
1.0 instead of using the
maximum value from the speed table which is the behaviour of all other
smumgr implementations.

Fixes: 18aafc59b106 ("drm/amd/powerplay: implement fw related smu interface for iceland.")
Signed-off-by: John Smith <itistotalbotnet@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 92b0a6ae6672857ddeabf892223943d2f0e06c97)

authored by

John Smith and committed by
Alex Deucher 501672e3 07a13f91

+1 -1
+1 -1
drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
··· 2028 2028 table->VoltageResponseTime = 0; 2029 2029 table->PhaseResponseTime = 0; 2030 2030 table->MemoryThermThrottleEnable = 1; 2031 - table->PCIeBootLinkLevel = 0; 2031 + table->PCIeBootLinkLevel = (uint8_t) (data->dpm_table.pcie_speed_table.count); 2032 2032 table->PCIeGenInterval = 1; 2033 2033 2034 2034 result = iceland_populate_smc_svi2_config(hwmgr, table);