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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amd/ras: add check safety watermark func for pmfw eeprom

add check safety watermark func for pmfw eeprom

Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Gangliang Xie and committed by
Alex Deucher 50428065 db217d08

+37
+3
drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
··· 571 571 if (!amdgpu_ras_mgr_is_ready(adev)) 572 572 return false; 573 573 574 + if (ras_fw_eeprom_supported(ras_mgr->ras_core)) 575 + return ras_fw_eeprom_check_safety_watermark(ras_mgr->ras_core); 576 + 574 577 return ras_eeprom_check_safety_watermark(ras_mgr->ras_core); 575 578 } 576 579
+3
drivers/gpu/drm/amd/ras/rascore/ras_core.c
··· 563 563 564 564 bool ras_core_check_safety_watermark(struct ras_core_context *ras_core) 565 565 { 566 + if (ras_fw_eeprom_supported(ras_core)) 567 + return ras_fw_eeprom_check_safety_watermark(ras_core); 568 + 566 569 return ras_eeprom_check_safety_watermark(ras_core); 567 570 } 568 571
+30
drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
··· 190 190 191 191 return res; 192 192 } 193 + 194 + bool ras_fw_eeprom_check_safety_watermark(struct ras_core_context *ras_core) 195 + { 196 + struct ras_fw_eeprom_control *control = &ras_core->ras_fw_eeprom; 197 + bool ret = false; 198 + int bad_page_count; 199 + 200 + if (!control->record_threshold_config) 201 + return false; 202 + 203 + bad_page_count = ras_umc_get_badpage_count(ras_core); 204 + 205 + if (bad_page_count > control->record_threshold_count) 206 + RAS_DEV_WARN(ras_core->dev, "RAS records:%d exceed threshold:%d", 207 + bad_page_count, control->record_threshold_count); 208 + 209 + if ((control->record_threshold_config == WARN_NONSTOP_OVER_THRESHOLD) || 210 + (control->record_threshold_config == NONSTOP_OVER_THRESHOLD)) { 211 + RAS_DEV_WARN(ras_core->dev, 212 + "Please consult AMD Service Action Guide (SAG) for appropriate service procedures.\n"); 213 + ret = false; 214 + } else { 215 + ras_core->is_rma = true; 216 + RAS_DEV_WARN(ras_core->dev, 217 + "Please consider adjusting the customized threshold.\n"); 218 + ret = true; 219 + } 220 + 221 + return ret; 222 + }
+1
drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
··· 67 67 int ras_fw_erase_ras_table(struct ras_core_context *ras_core, 68 68 uint32_t *result); 69 69 int ras_fw_eeprom_reset_table(struct ras_core_context *ras_core); 70 + bool ras_fw_eeprom_check_safety_watermark(struct ras_core_context *ras_core); 70 71 71 72 #endif