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dt-bindings: riscv: Add Zabha ISA extension description

Add description for the Zabha ISA extension which was ratified in April
2024.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Link: https://lore.kernel.org/r/20241103145153.105097-5-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

authored by

Alexandre Ghiti and committed by
Palmer Dabbelt 51624ddc 38acdee3

+6
+6
Documentation/devicetree/bindings/riscv/extensions.yaml
··· 178 178 as ratified at commit 4a69197e5617 ("Update to ratified state") of 179 179 riscv-svvptc. 180 180 181 + - const: zabha 182 + description: | 183 + The Zabha extension for Byte and Halfword Atomic Memory Operations 184 + as ratified at commit 49f49c842ff9 ("Update to Rafified state") of 185 + riscv-zabha. 186 + 181 187 - const: zacas 182 188 description: | 183 189 The Zacas extension for Atomic Compare-and-Swap (CAS) instructions