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drm/amdgpu: remove re-route ih in psp v12

APU doesn't have second IH ring, so re-routing action here is a no-op.
It will take a lot of time to wait timeout from PSP during the
initialization. So remove the function in psp v12.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Huang Rui and committed by
Alex Deucher
518e22b4 b54695da

-34
-34
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
··· 34 34 #include "sdma0/sdma0_4_0_offset.h" 35 35 #include "nbio/nbio_7_4_offset.h" 36 36 37 - #include "oss/osssys_4_0_offset.h" 38 - #include "oss/osssys_4_0_sh_mask.h" 39 - 40 37 MODULE_FIRMWARE("amdgpu/renoir_asd.bin"); 41 38 MODULE_FIRMWARE("amdgpu/renoir_ta.bin"); 42 39 MODULE_FIRMWARE("amdgpu/green_sardine_asd.bin"); ··· 139 142 return ret; 140 143 } 141 144 142 - static void psp_v12_0_reroute_ih(struct psp_context *psp) 143 - { 144 - struct amdgpu_device *adev = psp->adev; 145 - uint32_t tmp; 146 - 147 - /* Change IH ring for VMC */ 148 - tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1244b); 149 - tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, CLIENT_TYPE, 1); 150 - tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, RING_ID, 1); 151 - 152 - WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); 153 - WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); 154 - WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); 155 - 156 - psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), 157 - 0x80000000, 0x8000FFFF, false); 158 - 159 - /* Change IH ring for UMC */ 160 - tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1216b); 161 - tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, RING_ID, 1); 162 - 163 - WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); 164 - WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); 165 - WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); 166 - 167 - psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), 168 - 0x80000000, 0x8000FFFF, false); 169 - } 170 - 171 145 static int psp_v12_0_ring_create(struct psp_context *psp, 172 146 enum psp_ring_type ring_type) 173 147 { ··· 146 178 unsigned int psp_ring_reg = 0; 147 179 struct psp_ring *ring = &psp->km_ring; 148 180 struct amdgpu_device *adev = psp->adev; 149 - 150 - psp_v12_0_reroute_ih(psp); 151 181 152 182 if (amdgpu_sriov_vf(psp->adev)) { 153 183 /* Write low address of the ring to C2PMSG_102 */