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clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down

The gcc_mss_q6_bimc_axi_clk clock depends on the bimc_ddr_clk_src clock.
Move it down in the file to come after the source clock.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220704172453.838303-6-dmitry.baryshkov@linaro.org

authored by

Dmitry Baryshkov and committed by
Bjorn Andersson 52a0a6cb 69da4290

+17 -17
+17 -17
drivers/clk/qcom/gcc-msm8916.c
··· 2629 2629 }, 2630 2630 }; 2631 2631 2632 - static struct clk_branch gcc_mss_q6_bimc_axi_clk = { 2633 - .halt_reg = 0x49004, 2634 - .clkr = { 2635 - .enable_reg = 0x49004, 2636 - .enable_mask = BIT(0), 2637 - .hw.init = &(struct clk_init_data){ 2638 - .name = "gcc_mss_q6_bimc_axi_clk", 2639 - .parent_names = (const char *[]){ 2640 - "bimc_ddr_clk_src", 2641 - }, 2642 - .num_parents = 1, 2643 - .flags = CLK_SET_RATE_PARENT, 2644 - .ops = &clk_branch2_ops, 2645 - }, 2646 - }, 2647 - }; 2648 - 2649 2632 static struct clk_branch gcc_oxili_ahb_clk = { 2650 2633 .halt_reg = 0x59028, 2651 2634 .clkr = { ··· 2792 2809 .num_parents = ARRAY_SIZE(gcc_xo_gpll0_bimc), 2793 2810 .ops = &clk_rcg2_ops, 2794 2811 .flags = CLK_GET_RATE_NOCACHE, 2812 + }, 2813 + }; 2814 + 2815 + static struct clk_branch gcc_mss_q6_bimc_axi_clk = { 2816 + .halt_reg = 0x49004, 2817 + .clkr = { 2818 + .enable_reg = 0x49004, 2819 + .enable_mask = BIT(0), 2820 + .hw.init = &(struct clk_init_data){ 2821 + .name = "gcc_mss_q6_bimc_axi_clk", 2822 + .parent_names = (const char *[]){ 2823 + "bimc_ddr_clk_src", 2824 + }, 2825 + .num_parents = 1, 2826 + .flags = CLK_SET_RATE_PARENT, 2827 + .ops = &clk_branch2_ops, 2828 + }, 2795 2829 }, 2796 2830 }; 2797 2831