Merge tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging

+7 -2

Documentation/hwmon/w83627ehf

··· 50 50 (NCT6775F), and NCT6776F super I/O chips. We will refer to them collectively 51 51 as Winbond chips. 52 52 53 - The chips implement 2 to 4 temperature sensors (9 for NCT6775F and NCT6776F), 53 + The chips implement 3 to 4 temperature sensors (9 for NCT6775F and NCT6776F), 54 54 2 to 5 fan rotation speed sensors, 8 to 10 analog voltage sensors, one VID 55 55 (except for 627UHG), alarms with beep warnings (control unimplemented), 56 56 and some automatic fan regulation strategies (plus manual fan control mode). ··· 143 143 pwm[1-4]_stop_time - how many milliseconds [ms] must elapse to switch 144 144 corresponding fan off. (when the temperature was below 145 145 defined range). 146 + pwm[1-4]_start_output-minimum fan speed (range 1 - 255) when spinning up 147 + pwm[1-4]_step_output- rate of fan speed change (1 - 255) 148 + pwm[1-4]_stop_output- minimum fan speed (range 1 - 255) when spinning down 149 + pwm[1-4]_max_output - maximum fan speed (range 1 - 255), when the temperature 150 + is above defined range. 146 151 147 - Note: last two functions are influenced by other control bits, not yet exported 152 + Note: last six functions are influenced by other control bits, not yet exported 148 153 by the driver, so a change might not have any effect. 149 154 150 155 Implementation Details

+6 -8

Documentation/hwmon/zl6100

··· 88 88 delay 89 89 ----- 90 90 91 - Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between 92 - I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though 93 - 1 ms appears to be sufficient and has not caused any problems in testing. 94 - The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to 95 - affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms 96 - except for ZL2004 and ZL6105. To enable manual override, the driver provides a 97 - writeable module parameter, 'delay', which can be used to set the interval to 98 - a value between 0 and 65,535 microseconds. 91 + Intersil/Zilker Labs DC-DC controllers require a minimum interval between I2C 92 + bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms 93 + appears to be sufficient and has not caused any problems in testing. The problem 94 + is known to affect all currently supported chips. For manual override, the 95 + driver provides a writeable module parameter, 'delay', which can be used to set 96 + the interval to a value between 0 and 65,535 microseconds. 99 97 100 98 101 99 Sysfs entries

+3 -9

drivers/hwmon/pmbus/zl6100.c

··· 200 200 data->id = mid->driver_data; 201 201 202 202 /* 203 - * ZL2005, ZL2008, ZL2105, and ZL6100 are known to require a wait time 204 - * between I2C accesses. ZL2004 and ZL6105 are known to be safe. 205 - * Other chips have not yet been tested. 206 - * 207 - * Only clear the wait time for chips known to be safe. The wait time 208 - * can be cleared later for additional chips if tests show that it 209 - * is not needed (in other words, better be safe than sorry). 203 + * According to information from the chip vendor, all currently 204 + * supported chips are known to require a wait time between I2C 205 + * accesses. 210 206 */ 211 207 data->delay = delay; 212 - if (data->id == zl2004 || data->id == zl6105) 213 - data->delay = 0; 214 208 215 209 /* 216 210 * Since there was a direct I2C device access above, wait before

+8 -9

drivers/hwmon/w83627ehf.c

··· 39 39 0x8860 0xa1 40 40 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3 41 41 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3 42 - w83627uhg 8 2 2 2 0xa230 0xc1 0x5ca3 42 + w83627uhg 8 2 2 3 0xa230 0xc1 0x5ca3 43 43 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3 44 44 w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3 45 45 nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3 ··· 1607 1607 val = step_time_to_reg(val, data->pwm_mode[nr]); \ 1608 1608 mutex_lock(&data->update_lock); \ 1609 1609 data->reg[nr] = val; \ 1610 - w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \ 1610 + w83627ehf_write_value(data, data->REG_##REG[nr], val); \ 1611 1611 mutex_unlock(&data->update_lock); \ 1612 1612 return count; \ 1613 1613 } \ ··· 2004 2004 goto exit; 2005 2005 } 2006 2006 2007 - data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL); 2007 + data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data), 2008 + GFP_KERNEL); 2008 2009 if (!data) { 2009 2010 err = -ENOMEM; 2010 2011 goto exit_release; ··· 2158 2157 w83627ehf_set_temp_reg_ehf(data, 3); 2159 2158 2160 2159 /* 2161 - * Temperature sources for temp1 and temp2 are selected with 2160 + * Temperature sources for temp2 and temp3 are selected with 2162 2161 * bank 0, registers 0x49 and 0x4a. 2163 2162 */ 2164 2163 data->temp_src[0] = 0; /* SYSTIN */ 2165 2164 reg = w83627ehf_read_value(data, 0x49) & 0x07; 2166 2165 /* Adjust to have the same mapping as other source registers */ 2167 2166 if (reg == 0) 2168 - data->temp_src[1]++; 2167 + data->temp_src[1] = 1; 2169 2168 else if (reg >= 2 && reg <= 5) 2170 - data->temp_src[1] += 2; 2169 + data->temp_src[1] = reg + 2; 2171 2170 else /* should never happen */ 2172 2171 data->have_temp &= ~(1 << 1); 2173 2172 reg = w83627ehf_read_value(data, 0x4a); ··· 2494 2493 2495 2494 exit_remove: 2496 2495 w83627ehf_device_remove_files(dev); 2497 - kfree(data); 2498 - platform_set_drvdata(pdev, NULL); 2499 2496 exit_release: 2497 + platform_set_drvdata(pdev, NULL); 2500 2498 release_region(res->start, IOREGION_LENGTH); 2501 2499 exit: 2502 2500 return err; ··· 2509 2509 w83627ehf_device_remove_files(&pdev->dev); 2510 2510 release_region(data->addr, IOREGION_LENGTH); 2511 2511 platform_set_drvdata(pdev, NULL); 2512 - kfree(data); 2513 2512 2514 2513 return 0; 2515 2514 }

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