Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'pci-v3.19-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:
"These are fixes for:
- a resource management problem that causes a Radeon "Fatal error
during GPU init" on machines where the BIOS programmed an invalid
Root Port window. This was a regression in v3.16.
- an Atheros AR93xx device that doesn't handle PCI bus resets
correctly. This was a regression in v3.14.
- an out-of-date email address"
* tag 'pci-v3.19-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
MAINTAINERS: Update Richard Zhu's email address
sparc/PCI: Clip bridge windows to fit in upstream windows
powerpc/PCI: Clip bridge windows to fit in upstream windows
parisc/PCI: Clip bridge windows to fit in upstream windows
mn10300/PCI: Clip bridge windows to fit in upstream windows
microblaze/PCI: Clip bridge windows to fit in upstream windows
ia64/PCI: Clip bridge windows to fit in upstream windows
frv/PCI: Clip bridge windows to fit in upstream windows
alpha/PCI: Clip bridge windows to fit in upstream windows
x86/PCI: Clip bridge windows to fit in upstream windows
PCI: Add pci_claim_bridge_resource() to clip window if necessary
PCI: Add pci_bus_clip_resource() to clip to fit upstream window
PCI: Pass bridge device, not bus, when updating bridge windows
PCI: Mark Atheros AR93xx to avoid bus reset
PCI: Add flag for devices where we can't use bus reset
+230
-89
+1
-1
MAINTAINERS
+1
-1
MAINTAINERS
···
7274
7274
F: drivers/pci/host/*layerscape*
7275
7275
7276
7276
PCI DRIVER FOR IMX6
7277
-
M: Richard Zhu <r65037@freescale.com>
7277
+
M: Richard Zhu <Richard.Zhu@freescale.com>
7278
7278
M: Lucas Stach <l.stach@pengutronix.de>
7279
7279
L: linux-pci@vger.kernel.org
7280
7280
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+6
-2
arch/alpha/kernel/pci.c
+6
-2
arch/alpha/kernel/pci.c
···
285
285
if (r->parent || !r->start || !r->flags)
286
286
continue;
287
287
if (pci_has_flag(PCI_PROBE_ONLY) ||
288
-
(r->flags & IORESOURCE_PCI_FIXED))
289
-
pci_claim_resource(dev, i);
288
+
(r->flags & IORESOURCE_PCI_FIXED)) {
289
+
if (pci_claim_resource(dev, i) == 0)
290
+
continue;
291
+
292
+
pci_claim_bridge_resource(dev, i);
293
+
}
290
294
}
291
295
}
292
296
+1
-1
arch/frv/mb93090-mb00/pci-frv.c
+1
-1
arch/frv/mb93090-mb00/pci-frv.c
+26
-32
arch/ia64/pci/pci.c
+26
-32
arch/ia64/pci/pci.c
···
487
487
return 0;
488
488
}
489
489
490
-
static int is_valid_resource(struct pci_dev *dev, int idx)
491
-
{
492
-
unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
493
-
struct resource *devr = &dev->resource[idx], *busr;
494
-
495
-
if (!dev->bus)
496
-
return 0;
497
-
498
-
pci_bus_for_each_resource(dev->bus, busr, i) {
499
-
if (!busr || ((busr->flags ^ devr->flags) & type_mask))
500
-
continue;
501
-
if ((devr->start) && (devr->start >= busr->start) &&
502
-
(devr->end <= busr->end))
503
-
return 1;
504
-
}
505
-
return 0;
506
-
}
507
-
508
-
static void pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
509
-
{
510
-
int i;
511
-
512
-
for (i = start; i < limit; i++) {
513
-
if (!dev->resource[i].flags)
514
-
continue;
515
-
if ((is_valid_resource(dev, i)))
516
-
pci_claim_resource(dev, i);
517
-
}
518
-
}
519
-
520
490
void pcibios_fixup_device_resources(struct pci_dev *dev)
521
491
{
522
-
pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES);
492
+
int idx;
493
+
494
+
if (!dev->bus)
495
+
return;
496
+
497
+
for (idx = 0; idx < PCI_BRIDGE_RESOURCES; idx++) {
498
+
struct resource *r = &dev->resource[idx];
499
+
500
+
if (!r->flags || r->parent || !r->start)
501
+
continue;
502
+
503
+
pci_claim_resource(dev, idx);
504
+
}
523
505
}
524
506
EXPORT_SYMBOL_GPL(pcibios_fixup_device_resources);
525
507
526
508
static void pcibios_fixup_bridge_resources(struct pci_dev *dev)
527
509
{
528
-
pcibios_fixup_resources(dev, PCI_BRIDGE_RESOURCES, PCI_NUM_RESOURCES);
510
+
int idx;
511
+
512
+
if (!dev->bus)
513
+
return;
514
+
515
+
for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
516
+
struct resource *r = &dev->resource[idx];
517
+
518
+
if (!r->flags || r->parent || !r->start)
519
+
continue;
520
+
521
+
pci_claim_bridge_resource(dev, idx);
522
+
}
529
523
}
530
524
531
525
/*
+12
-1
arch/microblaze/pci/pci-common.c
+12
-1
arch/microblaze/pci/pci-common.c
···
1026
1026
pr, (pr && pr->name) ? pr->name : "nil");
1027
1027
1028
1028
if (pr && !(pr->flags & IORESOURCE_UNSET)) {
1029
+
struct pci_dev *dev = bus->self;
1030
+
1029
1031
if (request_resource(pr, res) == 0)
1030
1032
continue;
1031
1033
/*
···
1037
1035
*/
1038
1036
if (reparent_resources(pr, res) == 0)
1039
1037
continue;
1038
+
1039
+
if (dev && i < PCI_BRIDGE_RESOURCE_NUM &&
1040
+
pci_claim_bridge_resource(dev,
1041
+
i + PCI_BRIDGE_RESOURCES) == 0)
1042
+
continue;
1043
+
1040
1044
}
1041
1045
pr_warn("PCI: Cannot allocate resource region ");
1042
1046
pr_cont("%d of PCI bridge %d, will remap\n", i, bus->number);
···
1235
1227
(unsigned long long)r->end,
1236
1228
(unsigned int)r->flags);
1237
1229
1238
-
pci_claim_resource(dev, i);
1230
+
if (pci_claim_resource(dev, i) == 0)
1231
+
continue;
1232
+
1233
+
pci_claim_bridge_resource(dev, i);
1239
1234
}
1240
1235
}
1241
1236
+1
-1
arch/mn10300/unit-asb2305/pci-asb2305.c
+1
-1
arch/mn10300/unit-asb2305/pci-asb2305.c
+24
-29
arch/mn10300/unit-asb2305/pci.c
+24
-29
arch/mn10300/unit-asb2305/pci.c
···
281
281
return -ENODEV;
282
282
}
283
283
284
-
static int is_valid_resource(struct pci_dev *dev, int idx)
285
-
{
286
-
unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
287
-
struct resource *devr = &dev->resource[idx], *busr;
288
-
289
-
if (dev->bus) {
290
-
pci_bus_for_each_resource(dev->bus, busr, i) {
291
-
if (!busr || (busr->flags ^ devr->flags) & type_mask)
292
-
continue;
293
-
294
-
if (devr->start &&
295
-
devr->start >= busr->start &&
296
-
devr->end <= busr->end)
297
-
return 1;
298
-
}
299
-
}
300
-
301
-
return 0;
302
-
}
303
-
304
284
static void pcibios_fixup_device_resources(struct pci_dev *dev)
305
285
{
306
-
int limit, i;
286
+
int idx;
307
287
308
-
if (dev->bus->number != 0)
288
+
if (!dev->bus)
309
289
return;
310
290
311
-
limit = (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) ?
312
-
PCI_BRIDGE_RESOURCES : PCI_NUM_RESOURCES;
291
+
for (idx = 0; idx < PCI_BRIDGE_RESOURCES; idx++) {
292
+
struct resource *r = &dev->resource[idx];
313
293
314
-
for (i = 0; i < limit; i++) {
315
-
if (!dev->resource[i].flags)
294
+
if (!r->flags || r->parent || !r->start)
316
295
continue;
317
296
318
-
if (is_valid_resource(dev, i))
319
-
pci_claim_resource(dev, i);
297
+
pci_claim_resource(dev, idx);
298
+
}
299
+
}
300
+
301
+
static void pcibios_fixup_bridge_resources(struct pci_dev *dev)
302
+
{
303
+
int idx;
304
+
305
+
if (!dev->bus)
306
+
return;
307
+
308
+
for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
309
+
struct resource *r = &dev->resource[idx];
310
+
311
+
if (!r->flags || r->parent || !r->start)
312
+
continue;
313
+
314
+
pci_claim_bridge_resource(dev, idx);
320
315
}
321
316
}
322
317
···
325
330
326
331
if (bus->self) {
327
332
pci_read_bridge_bases(bus);
328
-
pcibios_fixup_device_resources(bus->self);
333
+
pcibios_fixup_bridge_resources(bus->self);
329
334
}
330
335
331
336
list_for_each_entry(dev, &bus->devices, bus_list)
+11
-1
arch/powerpc/kernel/pci-common.c
+11
-1
arch/powerpc/kernel/pci-common.c
···
1184
1184
pr, (pr && pr->name) ? pr->name : "nil");
1185
1185
1186
1186
if (pr && !(pr->flags & IORESOURCE_UNSET)) {
1187
+
struct pci_dev *dev = bus->self;
1188
+
1187
1189
if (request_resource(pr, res) == 0)
1188
1190
continue;
1189
1191
/*
···
1194
1192
* bridge resource and try again.
1195
1193
*/
1196
1194
if (reparent_resources(pr, res) == 0)
1195
+
continue;
1196
+
1197
+
if (dev && i < PCI_BRIDGE_RESOURCE_NUM &&
1198
+
pci_claim_bridge_resource(dev,
1199
+
i + PCI_BRIDGE_RESOURCES) == 0)
1197
1200
continue;
1198
1201
}
1199
1202
pr_warning("PCI: Cannot allocate resource region "
···
1408
1401
(unsigned long long)r->end,
1409
1402
(unsigned int)r->flags);
1410
1403
1411
-
pci_claim_resource(dev, i);
1404
+
if (pci_claim_resource(dev, i) == 0)
1405
+
continue;
1406
+
1407
+
pci_claim_bridge_resource(dev, i);
1412
1408
}
1413
1409
}
1414
1410
+4
-1
arch/sparc/kernel/pci.c
+4
-1
arch/sparc/kernel/pci.c
+1
-1
arch/x86/pci/i386.c
+1
-1
arch/x86/pci/i386.c
···
216
216
continue;
217
217
if (r->parent) /* Already allocated */
218
218
continue;
219
-
if (!r->start || pci_claim_resource(dev, idx) < 0) {
219
+
if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) {
220
220
/*
221
221
* Something is wrong with the region.
222
222
* Invalidate the resource to prevent
+2
-3
drivers/parisc/lba_pci.c
+2
-3
drivers/parisc/lba_pci.c
···
694
694
int i;
695
695
/* PCI-PCI Bridge */
696
696
pci_read_bridge_bases(bus);
697
-
for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
698
-
pci_claim_resource(bus->self, i);
699
-
}
697
+
for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++)
698
+
pci_claim_bridge_resource(bus->self, i);
700
699
} else {
701
700
/* Host-PCI Bridge */
702
701
int err;
+43
drivers/pci/bus.c
+43
drivers/pci/bus.c
···
228
228
}
229
229
EXPORT_SYMBOL(pci_bus_alloc_resource);
230
230
231
+
/*
232
+
* The @idx resource of @dev should be a PCI-PCI bridge window. If this
233
+
* resource fits inside a window of an upstream bridge, do nothing. If it
234
+
* overlaps an upstream window but extends outside it, clip the resource so
235
+
* it fits completely inside.
236
+
*/
237
+
bool pci_bus_clip_resource(struct pci_dev *dev, int idx)
238
+
{
239
+
struct pci_bus *bus = dev->bus;
240
+
struct resource *res = &dev->resource[idx];
241
+
struct resource orig_res = *res;
242
+
struct resource *r;
243
+
int i;
244
+
245
+
pci_bus_for_each_resource(bus, r, i) {
246
+
resource_size_t start, end;
247
+
248
+
if (!r)
249
+
continue;
250
+
251
+
if (resource_type(res) != resource_type(r))
252
+
continue;
253
+
254
+
start = max(r->start, res->start);
255
+
end = min(r->end, res->end);
256
+
257
+
if (start > end)
258
+
continue; /* no overlap */
259
+
260
+
if (res->start == start && res->end == end)
261
+
return false; /* no change */
262
+
263
+
res->start = start;
264
+
res->end = end;
265
+
dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n",
266
+
&orig_res, res);
267
+
268
+
return true;
269
+
}
270
+
271
+
return false;
272
+
}
273
+
231
274
void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
232
275
233
276
/**
+36
-4
drivers/pci/pci.c
+36
-4
drivers/pci/pci.c
···
3271
3271
{
3272
3272
struct pci_dev *pdev;
3273
3273
3274
-
if (pci_is_root_bus(dev->bus) || dev->subordinate || !dev->bus->self)
3274
+
if (pci_is_root_bus(dev->bus) || dev->subordinate ||
3275
+
!dev->bus->self || dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET)
3275
3276
return -ENOTTY;
3276
3277
3277
3278
list_for_each_entry(pdev, &dev->bus->devices, bus_list)
···
3306
3305
{
3307
3306
struct pci_dev *pdev;
3308
3307
3309
-
if (dev->subordinate || !dev->slot)
3308
+
if (dev->subordinate || !dev->slot ||
3309
+
dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET)
3310
3310
return -ENOTTY;
3311
3311
3312
3312
list_for_each_entry(pdev, &dev->bus->devices, bus_list)
···
3559
3557
}
3560
3558
EXPORT_SYMBOL_GPL(pci_try_reset_function);
3561
3559
3560
+
/* Do any devices on or below this bus prevent a bus reset? */
3561
+
static bool pci_bus_resetable(struct pci_bus *bus)
3562
+
{
3563
+
struct pci_dev *dev;
3564
+
3565
+
list_for_each_entry(dev, &bus->devices, bus_list) {
3566
+
if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET ||
3567
+
(dev->subordinate && !pci_bus_resetable(dev->subordinate)))
3568
+
return false;
3569
+
}
3570
+
3571
+
return true;
3572
+
}
3573
+
3562
3574
/* Lock devices from the top of the tree down */
3563
3575
static void pci_bus_lock(struct pci_bus *bus)
3564
3576
{
···
3621
3605
pci_dev_unlock(dev);
3622
3606
}
3623
3607
return 0;
3608
+
}
3609
+
3610
+
/* Do any devices on or below this slot prevent a bus reset? */
3611
+
static bool pci_slot_resetable(struct pci_slot *slot)
3612
+
{
3613
+
struct pci_dev *dev;
3614
+
3615
+
list_for_each_entry(dev, &slot->bus->devices, bus_list) {
3616
+
if (!dev->slot || dev->slot != slot)
3617
+
continue;
3618
+
if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET ||
3619
+
(dev->subordinate && !pci_bus_resetable(dev->subordinate)))
3620
+
return false;
3621
+
}
3622
+
3623
+
return true;
3624
3624
}
3625
3625
3626
3626
/* Lock devices from the top of the tree down */
···
3760
3728
{
3761
3729
int rc;
3762
3730
3763
-
if (!slot)
3731
+
if (!slot || !pci_slot_resetable(slot))
3764
3732
return -ENOTTY;
3765
3733
3766
3734
if (!probe)
···
3852
3820
3853
3821
static int pci_bus_reset(struct pci_bus *bus, int probe)
3854
3822
{
3855
-
if (!bus->self)
3823
+
if (!bus->self || !pci_bus_resetable(bus))
3856
3824
return -ENOTTY;
3857
3825
3858
3826
if (probe)
+1
drivers/pci/pci.h
+1
drivers/pci/pci.h
+14
drivers/pci/quirks.c
+14
drivers/pci/quirks.c
···
3028
3028
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MELLANOX, PCI_ANY_ID,
3029
3029
quirk_broken_intx_masking);
3030
3030
3031
+
static void quirk_no_bus_reset(struct pci_dev *dev)
3032
+
{
3033
+
dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;
3034
+
}
3035
+
3036
+
/*
3037
+
* Atheros AR93xx chips do not behave after a bus reset. The device will
3038
+
* throw a Link Down error on AER-capable systems and regardless of AER,
3039
+
* config space of the device is never accessible again and typically
3040
+
* causes the system to hang or reset when access is attempted.
3041
+
* http://www.spinics.net/lists/linux-pci/msg34797.html
3042
+
*/
3043
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset);
3044
+
3031
3045
#ifdef CONFIG_ACPI
3032
3046
/*
3033
3047
* Apple: Shutdown Cactus Ridge Thunderbolt controller.
+44
-12
drivers/pci/setup-bus.c
+44
-12
drivers/pci/setup-bus.c
···
530
530
config space writes, so it's quite possible that an I/O window of
531
531
the bridge will have some undesirable address (e.g. 0) after the
532
532
first write. Ditto 64-bit prefetchable MMIO. */
533
-
static void pci_setup_bridge_io(struct pci_bus *bus)
533
+
static void pci_setup_bridge_io(struct pci_dev *bridge)
534
534
{
535
-
struct pci_dev *bridge = bus->self;
536
535
struct resource *res;
537
536
struct pci_bus_region region;
538
537
unsigned long io_mask;
···
544
545
io_mask = PCI_IO_1K_RANGE_MASK;
545
546
546
547
/* Set up the top and bottom of the PCI I/O segment for this bus. */
547
-
res = bus->resource[0];
548
+
res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
548
549
pcibios_resource_to_bus(bridge->bus, ®ion, res);
549
550
if (res->flags & IORESOURCE_IO) {
550
551
pci_read_config_word(bridge, PCI_IO_BASE, &l);
···
567
568
pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
568
569
}
569
570
570
-
static void pci_setup_bridge_mmio(struct pci_bus *bus)
571
+
static void pci_setup_bridge_mmio(struct pci_dev *bridge)
571
572
{
572
-
struct pci_dev *bridge = bus->self;
573
573
struct resource *res;
574
574
struct pci_bus_region region;
575
575
u32 l;
576
576
577
577
/* Set up the top and bottom of the PCI Memory segment for this bus. */
578
-
res = bus->resource[1];
578
+
res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
579
579
pcibios_resource_to_bus(bridge->bus, ®ion, res);
580
580
if (res->flags & IORESOURCE_MEM) {
581
581
l = (region.start >> 16) & 0xfff0;
···
586
588
pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
587
589
}
588
590
589
-
static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
591
+
static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)
590
592
{
591
-
struct pci_dev *bridge = bus->self;
592
593
struct resource *res;
593
594
struct pci_bus_region region;
594
595
u32 l, bu, lu;
···
599
602
600
603
/* Set up PREF base/limit. */
601
604
bu = lu = 0;
602
-
res = bus->resource[2];
605
+
res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
603
606
pcibios_resource_to_bus(bridge->bus, ®ion, res);
604
607
if (res->flags & IORESOURCE_PREFETCH) {
605
608
l = (region.start >> 16) & 0xfff0;
···
627
630
&bus->busn_res);
628
631
629
632
if (type & IORESOURCE_IO)
630
-
pci_setup_bridge_io(bus);
633
+
pci_setup_bridge_io(bridge);
631
634
632
635
if (type & IORESOURCE_MEM)
633
-
pci_setup_bridge_mmio(bus);
636
+
pci_setup_bridge_mmio(bridge);
634
637
635
638
if (type & IORESOURCE_PREFETCH)
636
-
pci_setup_bridge_mmio_pref(bus);
639
+
pci_setup_bridge_mmio_pref(bridge);
637
640
638
641
pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
639
642
}
···
644
647
IORESOURCE_PREFETCH;
645
648
646
649
__pci_setup_bridge(bus, type);
650
+
}
651
+
652
+
653
+
int pci_claim_bridge_resource(struct pci_dev *bridge, int i)
654
+
{
655
+
if (i < PCI_BRIDGE_RESOURCES || i > PCI_BRIDGE_RESOURCE_END)
656
+
return 0;
657
+
658
+
if (pci_claim_resource(bridge, i) == 0)
659
+
return 0; /* claimed the window */
660
+
661
+
if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)
662
+
return 0;
663
+
664
+
if (!pci_bus_clip_resource(bridge, i))
665
+
return -EINVAL; /* clipping didn't change anything */
666
+
667
+
switch (i - PCI_BRIDGE_RESOURCES) {
668
+
case 0:
669
+
pci_setup_bridge_io(bridge);
670
+
break;
671
+
case 1:
672
+
pci_setup_bridge_mmio(bridge);
673
+
break;
674
+
case 2:
675
+
pci_setup_bridge_mmio_pref(bridge);
676
+
break;
677
+
default:
678
+
return -EINVAL;
679
+
}
680
+
681
+
if (pci_claim_resource(bridge, i) == 0)
682
+
return 0; /* claimed a smaller window */
683
+
684
+
return -EINVAL;
647
685
}
648
686
649
687
/* Check whether the bridge supports optional I/O and
+3
include/linux/pci.h
+3
include/linux/pci.h
···
175
175
PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4),
176
176
/* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */
177
177
PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5),
178
+
/* Do not use bus resets for device */
179
+
PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6),
178
180
};
179
181
180
182
enum pci_irq_reroute_variant {
···
1067
1065
void pci_bus_assign_resources(const struct pci_bus *bus);
1068
1066
void pci_bus_size_bridges(struct pci_bus *bus);
1069
1067
int pci_claim_resource(struct pci_dev *, int);
1068
+
int pci_claim_bridge_resource(struct pci_dev *bridge, int i);
1070
1069
void pci_assign_unassigned_resources(void);
1071
1070
void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
1072
1071
void pci_assign_unassigned_bus_resources(struct pci_bus *bus);