ASoC: MediaTek MT8195/86 Cleanups · tjh.dev/kernel@5782f01

+34 -65

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

··· 3030 3030 { AUDIO_TOP_CON1, 0xfffffff8 }, 3031 3031 }; 3032 3032 3033 - static int mt8195_afe_init_registers(struct mtk_base_afe *afe) 3034 - { 3035 - return regmap_multi_reg_write(afe->regmap, 3036 - mt8195_afe_reg_defaults, 3037 - ARRAY_SIZE(mt8195_afe_reg_defaults)); 3038 - } 3039 - 3040 - static void mt8195_afe_parse_of(struct mtk_base_afe *afe, 3041 - struct device_node *np) 3042 - { 3043 - #if IS_ENABLED(CONFIG_SND_SOC_MT6359) 3044 - struct mt8195_afe_private *afe_priv = afe->platform_priv; 3045 - 3046 - afe_priv->topckgen = syscon_regmap_lookup_by_phandle(afe->dev->of_node, 3047 - "mediatek,topckgen"); 3048 - if (IS_ERR(afe_priv->topckgen)) { 3049 - dev_info(afe->dev, "%s() Cannot find topckgen controller: %ld\n", 3050 - __func__, PTR_ERR(afe_priv->topckgen)); 3051 - } 3052 - #endif 3053 - } 3054 - 3055 3033 static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev) 3056 3034 { 3057 3035 struct mtk_base_afe *afe; ··· 3040 3062 struct snd_soc_component *component; 3041 3063 3042 3064 ret = of_reserved_mem_device_init(dev); 3043 - if (ret) { 3044 - dev_err(dev, "failed to assign memory region: %d\n", ret); 3045 - return ret; 3046 - } 3065 + if (ret) 3066 + return dev_err_probe(dev, ret, "failed to assign memory region\n"); 3047 3067 3048 3068 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(33)); 3049 3069 if (ret) ··· 3065 3089 3066 3090 /* initial audio related clock */ 3067 3091 ret = mt8195_afe_init_clock(afe); 3068 - if (ret) { 3069 - dev_err(dev, "init clock error\n"); 3070 - return ret; 3071 - } 3092 + if (ret) 3093 + return dev_err_probe(dev, ret, "init clock error\n"); 3072 3094 3073 3095 /* reset controller to reset audio regs before regmap cache */ 3074 3096 rstc = devm_reset_control_get_exclusive(dev, "audiosys"); 3075 - if (IS_ERR(rstc)) { 3076 - ret = PTR_ERR(rstc); 3077 - dev_err(dev, "could not get audiosys reset:%d\n", ret); 3078 - return ret; 3079 - } 3097 + if (IS_ERR(rstc)) 3098 + return dev_err_probe(dev, PTR_ERR(rstc), "could not get audiosys reset\n"); 3080 3099 3081 3100 ret = reset_control_reset(rstc); 3082 - if (ret) { 3083 - dev_err(dev, "failed to trigger audio reset:%d\n", ret); 3084 - return ret; 3085 - } 3101 + if (ret) 3102 + return dev_err_probe(dev, ret, "failed to trigger audio reset\n"); 3086 3103 3087 3104 spin_lock_init(&afe_priv->afe_ctrl_lock); 3088 3105 ··· 3112 3143 3113 3144 ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler, 3114 3145 IRQF_TRIGGER_NONE, "asys-isr", (void *)afe); 3115 - if (ret) { 3116 - dev_err(dev, "could not request_irq for asys-isr\n"); 3117 - return ret; 3118 - } 3146 + if (ret) 3147 + return dev_err_probe(dev, ret, "could not request_irq for asys-isr\n"); 3119 3148 3120 3149 /* init sub_dais */ 3121 3150 INIT_LIST_HEAD(&afe->sub_dais); 3122 3151 3123 3152 for (i = 0; i < ARRAY_SIZE(dai_register_cbs); i++) { 3124 3153 ret = dai_register_cbs[i](afe); 3125 - if (ret) { 3126 - dev_warn(dev, "dai register i %d fail, ret %d\n", 3127 - i, ret); 3128 - return ret; 3129 - } 3154 + if (ret) 3155 + return dev_err_probe(dev, ret, "dai cb%i register fail\n", i); 3130 3156 } 3131 3157 3132 3158 /* init dai_driver and component_driver */ 3133 3159 ret = mtk_afe_combine_sub_dai(afe); 3134 - if (ret) { 3135 - dev_warn(dev, "mtk_afe_combine_sub_dai fail, ret %d\n", 3136 - ret); 3137 - return ret; 3138 - } 3160 + if (ret) 3161 + return dev_err_probe(dev, ret, "mtk_afe_combine_sub_dai fail\n"); 3139 3162 3140 3163 afe->mtk_afe_hardware = &mt8195_afe_hardware; 3141 3164 afe->memif_fs = mt8195_memif_fs; ··· 3138 3177 3139 3178 platform_set_drvdata(pdev, afe); 3140 3179 3141 - mt8195_afe_parse_of(afe, pdev->dev.of_node); 3142 - 3143 - pm_runtime_enable(dev); 3144 - if (!pm_runtime_enabled(dev)) { 3145 - ret = mt8195_afe_runtime_resume(dev); 3146 - if (ret) 3147 - return ret; 3148 - } 3180 + afe_priv->topckgen = syscon_regmap_lookup_by_phandle(dev->of_node, "mediatek,topckgen"); 3181 + if (IS_ERR(afe_priv->topckgen)) 3182 + dev_dbg(afe->dev, "Cannot find topckgen controller: %ld\n", 3183 + PTR_ERR(afe_priv->topckgen)); 3149 3184 3150 3185 /* enable clock for regcache get default value from hw */ 3151 3186 afe_priv->pm_runtime_bypass_reg_ctl = true; 3152 - pm_runtime_get_sync(dev); 3187 + 3188 + ret = devm_pm_runtime_enable(dev); 3189 + if (ret) 3190 + return ret; 3191 + 3192 + ret = pm_runtime_resume_and_get(dev); 3193 + if (ret) 3194 + return dev_err_probe(dev, ret, "Failed to resume device\n"); 3153 3195 3154 3196 afe->regmap = devm_regmap_init_mmio(&pdev->dev, afe->base_addr, 3155 3197 &mt8195_afe_regmap_config); ··· 3200 3236 goto err_pm_put; 3201 3237 } 3202 3238 3203 - mt8195_afe_init_registers(afe); 3239 + ret = regmap_multi_reg_write(afe->regmap, mt8195_afe_reg_defaults, 3240 + ARRAY_SIZE(mt8195_afe_reg_defaults)); 3241 + if (ret) 3242 + goto err_pm_put; 3204 3243 3205 - pm_runtime_put_sync(dev); 3244 + ret = pm_runtime_put_sync(dev); 3245 + if (ret) 3246 + return dev_err_probe(dev, ret, "Failed to suspend device\n"); 3247 + 3206 3248 afe_priv->pm_runtime_bypass_reg_ctl = false; 3207 3249 3208 3250 regcache_cache_only(afe->regmap, true); ··· 3218 3248 3219 3249 err_pm_put: 3220 3250 pm_runtime_put_sync(dev); 3221 - pm_runtime_disable(dev); 3222 3251 3223 3252 return ret; 3224 3253 }

+1 -35

sound/soc/sof/mediatek/mt8186/mt8186.c

··· 48 48 return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ); 49 49 } 50 50 51 - static void mt8186_get_reply(struct snd_sof_dev *sdev) 52 - { 53 - struct snd_sof_ipc_msg *msg = sdev->msg; 54 - struct sof_ipc_reply reply; 55 - int ret = 0; 56 - 57 - if (!msg) { 58 - dev_warn(sdev->dev, "unexpected ipc interrupt\n"); 59 - return; 60 - } 61 - 62 - /* get reply */ 63 - sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply)); 64 - if (reply.error < 0) { 65 - memcpy(msg->reply_data, &reply, sizeof(reply)); 66 - ret = reply.error; 67 - } else { 68 - /* reply has correct size? */ 69 - if (reply.hdr.size != msg->reply_size) { 70 - dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n", 71 - msg->reply_size, reply.hdr.size); 72 - ret = -EINVAL; 73 - } 74 - 75 - /* read the message */ 76 - if (msg->reply_size > 0) 77 - sof_mailbox_read(sdev, sdev->host_box.offset, 78 - msg->reply_data, msg->reply_size); 79 - } 80 - 81 - msg->reply_error = ret; 82 - } 83 - 84 51 static void mt8186_dsp_handle_reply(struct mtk_adsp_ipc *ipc) 85 52 { 86 53 struct adsp_priv *priv = mtk_adsp_ipc_get_data(ipc); 87 54 unsigned long flags; 88 55 89 56 spin_lock_irqsave(&priv->sdev->ipc_lock, flags); 90 - mt8186_get_reply(priv->sdev); 91 - snd_sof_ipc_reply(priv->sdev, 0); 57 + snd_sof_ipc_process_reply(priv->sdev, 0); 92 58 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); 93 59 } 94 60

+1 -35

sound/soc/sof/mediatek/mt8195/mt8195.c

··· 49 49 return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ); 50 50 } 51 51 52 - static void mt8195_get_reply(struct snd_sof_dev *sdev) 53 - { 54 - struct snd_sof_ipc_msg *msg = sdev->msg; 55 - struct sof_ipc_reply reply; 56 - int ret = 0; 57 - 58 - if (!msg) { 59 - dev_warn(sdev->dev, "unexpected ipc interrupt\n"); 60 - return; 61 - } 62 - 63 - /* get reply */ 64 - sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply)); 65 - if (reply.error < 0) { 66 - memcpy(msg->reply_data, &reply, sizeof(reply)); 67 - ret = reply.error; 68 - } else { 69 - /* reply has correct size? */ 70 - if (reply.hdr.size != msg->reply_size) { 71 - dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n", 72 - msg->reply_size, reply.hdr.size); 73 - ret = -EINVAL; 74 - } 75 - 76 - /* read the message */ 77 - if (msg->reply_size > 0) 78 - sof_mailbox_read(sdev, sdev->host_box.offset, 79 - msg->reply_data, msg->reply_size); 80 - } 81 - 82 - msg->reply_error = ret; 83 - } 84 - 85 52 static void mt8195_dsp_handle_reply(struct mtk_adsp_ipc *ipc) 86 53 { 87 54 struct adsp_priv *priv = mtk_adsp_ipc_get_data(ipc); 88 55 unsigned long flags; 89 56 90 57 spin_lock_irqsave(&priv->sdev->ipc_lock, flags); 91 - mt8195_get_reply(priv->sdev); 92 - snd_sof_ipc_reply(priv->sdev, 0); 58 + snd_sof_ipc_process_reply(priv->sdev, 0); 93 59 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); 94 60 } 95 61

Configure Feed

Configure Feed