Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

drm/amd/display: move remaining FPU code to dml folder

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;
pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;
these two operations in dcn32/dcn32_resource.c still need to use FPU,
This will cause compilation to fail on ARM64 platforms because
-mgeneral-regs-only is enabled by default to disable the hardware FPU.
Therefore, imitate the dcn31_zero_pipe_dcc_fraction function in
dml/dcn31/dcn31_fpu.c, declare the dcn32_zero_pipe_dcc_fraction function
in dcn32_fpu.c, and move above two operations into this function.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Ao Zhong <hacc1225@gmail.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Ao Zhong and committed by
Alex Deucher
58ddbecb 64a9f19a

+14 -2
+3 -2
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
··· 1918 1918 timing = &pipe->stream->timing; 1919 1919 1920 1920 pipes[pipe_cnt].pipe.src.gpuvm = true; 1921 - pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; 1922 - pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; 1921 + DC_FP_START(); 1922 + dcn32_zero_pipe_dcc_fraction(pipes, pipe_cnt); 1923 + DC_FP_END(); 1923 1924 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; 1924 1925 pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256; // according to spreadsheet 1925 1926 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;
+8
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
··· 2506 2506 } 2507 2507 } 2508 2508 2509 + void dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, 2510 + int pipe_cnt) 2511 + { 2512 + dc_assert_fp_enabled(); 2513 + 2514 + pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; 2515 + pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; 2516 + }
+3
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h
··· 73 73 74 74 void dcn32_patch_dpm_table(struct clk_bw_params *bw_params); 75 75 76 + void dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, 77 + int pipe_cnt); 78 + 76 79 #endif