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arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection

This patch replaces EMMC/SDHI macros with SW_SD0_DEV_SEL DIP-Switch
macro for eMMC/SDHI device selection.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220204143132.3608-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Biju Das and committed by
Geert Uytterhoeven
5c65ad12 46da6327

+4 -12
+2 -12
arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
··· 8 8 #include <dt-bindings/gpio/gpio.h> 9 9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10 10 11 - /* SW1[2] should be at OFF position to enable 64 GB eMMC */ 12 - #define EMMC 1 13 - 14 - /* 15 - * To enable uSD card on CN3, 16 - * SW1[2] should be at ON position. 17 - * Disable eMMC by setting "#define EMMC 0" above. 18 - */ 19 - #define SDHI (!EMMC) 20 - 21 11 / { 22 12 aliases { 23 13 ethernet0 = &eth0; ··· 175 185 }; 176 186 }; 177 187 178 - #if SDHI 188 + #if (!SW_SD0_DEV_SEL) 179 189 &sdhi0 { 180 190 pinctrl-0 = <&sdhi0_pins>; 181 191 pinctrl-1 = <&sdhi0_pins_uhs>; ··· 190 200 }; 191 201 #endif 192 202 193 - #if EMMC 203 + #if SW_SD0_DEV_SEL 194 204 &sdhi0 { 195 205 pinctrl-0 = <&sdhi0_emmc_pins>; 196 206 pinctrl-1 = <&sdhi0_emmc_pins>;
+2
arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
··· 18 18 * Please change below macros according to SW1 setting 19 19 */ 20 20 21 + #define SW_SD0_DEV_SEL 1 22 + 21 23 #define SW_SCIF_CAN 0 22 24 #if (SW_SCIF_CAN) 23 25 /* Due to HW routing, SW_RSPI_CAN is always 0 when SW_SCIF_CAN is set to 1 */