tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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cxl/pci: Remove duplicated implementation of waiting for memory_info_valid

commit ce17ad0d5498 ("cxl: Wait Memory_Info_Valid before access memory
related info") added another implementation, which is
cxl_dvsec_mem_range_valid(), of waiting for memory_info_valid without
realizing it duplicated wait_for_valid(). Remove wait_for_valid() and
retain cxl_dvsec_mem_range_valid() as the former is hardcoded to check
only the Memory_Info_Valid bit of DVSEC range 1, while the latter allows
for selection between DVSEC range 1 or 2 via parameter.

Suggested-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20240828084231.1378789-3-yanfei.xu@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

authored by

Yanfei Xu and committed by
Dave Jiang 5c6e3d5a 55e26869

+9 -40
+5 -36
drivers/cxl/core/pci.c
··· 211 211 } 212 212 EXPORT_SYMBOL_NS_GPL(cxl_await_media_ready, CXL); 213 213 214 - static int wait_for_valid(struct pci_dev *pdev, int d) 215 - { 216 - u32 val; 217 - int rc; 218 - 219 - /* 220 - * Memory_Info_Valid: When set, indicates that the CXL Range 1 Size high 221 - * and Size Low registers are valid. Must be set within 1 second of 222 - * deassertion of reset to CXL device. Likely it is already set by the 223 - * time this runs, but otherwise give a 1.5 second timeout in case of 224 - * clock skew. 225 - */ 226 - rc = pci_read_config_dword(pdev, d + CXL_DVSEC_RANGE_SIZE_LOW(0), &val); 227 - if (rc) 228 - return rc; 229 - 230 - if (val & CXL_DVSEC_MEM_INFO_VALID) 231 - return 0; 232 - 233 - msleep(1500); 234 - 235 - rc = pci_read_config_dword(pdev, d + CXL_DVSEC_RANGE_SIZE_LOW(0), &val); 236 - if (rc) 237 - return rc; 238 - 239 - if (val & CXL_DVSEC_MEM_INFO_VALID) 240 - return 0; 241 - 242 - return -ETIMEDOUT; 243 - } 244 - 245 214 static int cxl_set_mem_enable(struct cxl_dev_state *cxlds, u16 val) 246 215 { 247 216 struct pci_dev *pdev = to_pci_dev(cxlds->dev); ··· 291 322 return devm_add_action_or_reset(host, disable_hdm, cxlhdm); 292 323 } 293 324 294 - int cxl_dvsec_rr_decode(struct device *dev, int d, 325 + int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port, 295 326 struct cxl_endpoint_dvsec_info *info) 296 327 { 297 328 struct pci_dev *pdev = to_pci_dev(dev); 329 + struct cxl_dev_state *cxlds = pci_get_drvdata(pdev); 298 330 int hdm_count, rc, i, ranges = 0; 331 + int d = cxlds->cxl_dvsec; 299 332 u16 cap, ctrl; 300 333 301 334 if (!d) { ··· 324 353 if (!hdm_count || hdm_count > 2) 325 354 return -EINVAL; 326 355 327 - rc = wait_for_valid(pdev, d); 328 - if (rc) { 329 - dev_dbg(dev, "Failure awaiting MEM_INFO_VALID (%d)\n", rc); 356 + rc = cxl_dvsec_mem_range_valid(cxlds, 0); 357 + if (rc) 330 358 return rc; 331 - } 332 359 333 360 /* 334 361 * The current DVSEC values are moot if the memory capability is
+1 -1
drivers/cxl/cxl.h
··· 811 811 int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm, 812 812 struct cxl_endpoint_dvsec_info *info); 813 813 int devm_cxl_add_passthrough_decoder(struct cxl_port *port); 814 - int cxl_dvsec_rr_decode(struct device *dev, int dvsec, 814 + int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port, 815 815 struct cxl_endpoint_dvsec_info *info); 816 816 817 817 bool is_cxl_region(struct device *dev);
+1 -1
drivers/cxl/port.c
··· 98 98 struct cxl_port *root; 99 99 int rc; 100 100 101 - rc = cxl_dvsec_rr_decode(cxlds->dev, cxlds->cxl_dvsec, &info); 101 + rc = cxl_dvsec_rr_decode(cxlds->dev, port, &info); 102 102 if (rc < 0) 103 103 return rc; 104 104
+2 -2
tools/testing/cxl/test/mock.c
··· 228 228 } 229 229 EXPORT_SYMBOL_NS_GPL(__wrap_cxl_hdm_decode_init, CXL); 230 230 231 - int __wrap_cxl_dvsec_rr_decode(struct device *dev, int dvsec, 231 + int __wrap_cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port, 232 232 struct cxl_endpoint_dvsec_info *info) 233 233 { 234 234 int rc = 0, index; ··· 237 237 if (ops && ops->is_mock_dev(dev)) 238 238 rc = 0; 239 239 else 240 - rc = cxl_dvsec_rr_decode(dev, dvsec, info); 240 + rc = cxl_dvsec_rr_decode(dev, port, info); 241 241 put_cxl_mock_ops(index); 242 242 243 243 return rc;