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drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

As we move towards using a shorter, optimized guardband, we need to adjust
how the delayed vblank start is computed.

Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
intel_vrr_always_use_vrr_tg() is true. Also update the
pipe_mode->crtc_vblank_start which is derived from
adjusted_mode->crtc_vblank_start in intel_crtc_compute_pipe_mode().

To maintain consistency between the computed and readout paths, update
the readout logic in intel_vrr_get_config() to overwrite crtc_vblank_start
with the same value (vtotal - guardband) on platforms with always-on
VRR TG.

This also paves way for guardband optimization, by handling the movement of
the crtc_vblank_start for platforms that have VRR TG always active.

v2: Drop the helper and add the adjustment directly to
intel_vrr_compute_guardband(). (Ville)
v3: Use adjusted_mode.crtc_vtotal instead of vmin and include the readout
logic to keep the compute and readout paths in sync. (Ville)
v4: Also set pipe_mode->crtc_vblank_start as its derived from
adjusted_mode. (Ville)
v5: Add a comment about rationale behind updating
pipe_mode->crtc_vblank_start. (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20251016055415.2101347-10-ankit.k.nautiyal@intel.com

+26 -1
+26 -1
drivers/gpu/drm/i915/display/intel_vrr.c
··· 436 436 void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state) 437 437 { 438 438 struct intel_display *display = to_intel_display(crtc_state); 439 - const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 439 + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 440 + struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; 440 441 441 442 if (!intel_vrr_possible(crtc_state)) 442 443 return; 443 444 444 445 crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay, 445 446 intel_vrr_max_guardband(crtc_state)); 447 + 448 + if (intel_vrr_always_use_vrr_tg(display)) { 449 + adjusted_mode->crtc_vblank_start = 450 + adjusted_mode->crtc_vtotal - crtc_state->vrr.guardband; 451 + /* 452 + * pipe_mode has already been derived from the 453 + * original adjusted_mode, keep the two in sync. 454 + */ 455 + pipe_mode->crtc_vblank_start = 456 + adjusted_mode->crtc_vblank_start; 457 + } 446 458 447 459 if (DISPLAY_VER(display) < 13) 448 460 crtc_state->vrr.pipeline_full = ··· 833 821 */ 834 822 if (crtc_state->vrr.enable) 835 823 crtc_state->mode_flags |= I915_MODE_FLAG_VRR; 824 + 825 + /* 826 + * For platforms that always use the VRR timing generator, we overwrite 827 + * crtc_vblank_start with vtotal - guardband to reflect the delayed 828 + * vblank start. This works for both default and optimized guardband values. 829 + * On other platforms, we keep the original value from 830 + * intel_get_transcoder_timings() and apply adjustments only in VRR-specific 831 + * paths as needed. 832 + */ 833 + if (intel_vrr_always_use_vrr_tg(display)) 834 + crtc_state->hw.adjusted_mode.crtc_vblank_start = 835 + crtc_state->hw.adjusted_mode.crtc_vtotal - 836 + crtc_state->vrr.guardband; 836 837 } 837 838 838 839 int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state)