tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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amdgpu/pm: Add new hwmgr API function "emit_clock_levels"

Extend commit 7f36948c92b2 ("amdgpu/pm: Implement new API function "emit" that accepts buffer base and write offset")
Add new hwmgr API function "emit_clock_levels"
- add member emit_clock_levels to pp_hwmgr_func
- Implemented pp_dpm_emit_clock_levels
- add pp_dpm_emit_clock_levels to pp_dpm_funcs

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Darren Powell and committed by
Alex Deucher 5d8539d2 8f8cc3fb

+19
+17
drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
··· 671 671 return hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask); 672 672 } 673 673 674 + static int pp_dpm_emit_clock_levels(void *handle, 675 + enum pp_clock_type type, 676 + char *buf, 677 + int *offset) 678 + { 679 + struct pp_hwmgr *hwmgr = handle; 680 + 681 + if (!hwmgr || !hwmgr->pm_en) 682 + return -EOPNOTSUPP; 683 + 684 + if (!hwmgr->hwmgr_func->emit_clock_levels) 685 + return -ENOENT; 686 + 687 + return hwmgr->hwmgr_func->emit_clock_levels(hwmgr, type, buf, offset); 688 + } 689 + 674 690 static int pp_dpm_print_clock_levels(void *handle, 675 691 enum pp_clock_type type, char *buf) 676 692 { ··· 1551 1535 .get_pp_table = pp_dpm_get_pp_table, 1552 1536 .set_pp_table = pp_dpm_set_pp_table, 1553 1537 .force_clock_level = pp_dpm_force_clock_level, 1538 + .emit_clock_levels = pp_dpm_emit_clock_levels, 1554 1539 .print_clock_levels = pp_dpm_print_clock_levels, 1555 1540 .get_sclk_od = pp_dpm_get_sclk_od, 1556 1541 .set_sclk_od = pp_dpm_set_sclk_od,
+2
drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
··· 313 313 int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks); 314 314 int (*power_off_asic)(struct pp_hwmgr *hwmgr); 315 315 int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask); 316 + int (*emit_clock_levels)(struct pp_hwmgr *hwmgr, 317 + enum pp_clock_type type, char *buf, int *offset); 316 318 int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf); 317 319 int (*powergate_gfx)(struct pp_hwmgr *hwmgr, bool enable); 318 320 int (*get_sclk_od)(struct pp_hwmgr *hwmgr);